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path: root/lib/Target/PowerPC/PPCISelPattern.cpp
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2005-08-02This hunk accidentally got dropped. Patch by Jim LaskeyChris Lattner
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22595 91177308-0d34-0410-b5e6-96231b3b80d8
2005-08-02Update to use the new MathExtras.h support for log2 computation.Chris Lattner
Patch contributed by Jim Laskey! git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22594 91177308-0d34-0410-b5e6-96231b3b80d8
2005-08-02add a pass name to make debugging dumps nicerChris Lattner
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22588 91177308-0d34-0410-b5e6-96231b3b80d8
2005-07-28Eliminate an extra copy from R1 that Nate noticed on function calls thatChris Lattner
have to write arguments to the stack git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22536 91177308-0d34-0410-b5e6-96231b3b80d8
2005-07-28Specify the correct number of operandsChris Lattner
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22535 91177308-0d34-0410-b5e6-96231b3b80d8
2005-07-28Fold constant adds into loads and stores to frame indices.Nate Begeman
For the following code: double %ext(int %A.0__, long %A.1__) { %A_addr = alloca %typedef.DComplex ; <%typedef.DComplex*> [#uses=2] %tmp.1 = cast %typedef.DComplex* %A_addr to int* ; <int*> [#uses=1] store int %A.0__, int* %tmp.1 %tmp.2 = getelementptr %typedef.DComplex* %A_addr, int 0, uint 1 ; <double*> [#uses=2] %tmp.3 = cast double* %tmp.2 to long* ; <long*> [#uses=1] store long %A.1__, long* %tmp.3 %tmp.5 = load double* %tmp.2 ; <double> [#uses=1] ret double %tmp.5 } We now generate: _ext: .LBB_ext_0: ; stw r3, -12(r1) stw r4, -8(r1) stw r5, -4(r1) lfd f1, -8(r1) blr Instead of: _ext: .LBB_ext_0: ; stw r3, -12(r1) addi r2, r1, -12 stw r4, 4(r2) stw r5, 8(r2) lfd f1, 4(r2) blr This also fires hundreds of times on MultiSource. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22533 91177308-0d34-0410-b5e6-96231b3b80d8
2005-07-27Fix some commentsNate Begeman
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22530 91177308-0d34-0410-b5e6-96231b3b80d8
2005-07-27Eliminate all remaining tabs and trailing spaces.Jeff Cohen
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22523 91177308-0d34-0410-b5e6-96231b3b80d8
2005-07-25Fix an optimization put in for accessing static globals. This obviatesNate Begeman
the need to build PIC. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22512 91177308-0d34-0410-b5e6-96231b3b80d8
2005-07-22PowerPC no-pic code is not quite ready for prime-timeChris Lattner
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22507 91177308-0d34-0410-b5e6-96231b3b80d8
2005-07-21Support building non-PICNate Begeman
Remove the LoadHiAddr pseudo-instruction. Optimization of stores to and loads from statics. Force JIT to use new non-PIC codepaths. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22494 91177308-0d34-0410-b5e6-96231b3b80d8
2005-07-20Generate mfocrf when targeting g5. Generate fsqrt/fsqrts when targetin g5.Nate Begeman
8-byte align doubles. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22486 91177308-0d34-0410-b5e6-96231b3b80d8
2005-07-19Integrate SelectFPExpr into SelectExpr. This gets PPC32 closer to beingNate Begeman
automatically generated from a target description. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22470 91177308-0d34-0410-b5e6-96231b3b80d8
2005-07-10Change *EXTLOAD to use an VTSDNode operand instead of being an MVTSDNode.Chris Lattner
This is the last MVTSDNode. This allows us to eliminate a bunch of special case code for handling MVTSDNodes. Also, remove some uses of dyn_cast that should really be cast (which is cheaper in a release build). git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22368 91177308-0d34-0410-b5e6-96231b3b80d8
2005-07-10Change TRUNCSTORE to use a VTSDNode operand instead of being an MVTSTDNodeChris Lattner
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22366 91177308-0d34-0410-b5e6-96231b3b80d8
2005-07-05Make several cleanups to Andrews varargs change:Chris Lattner
1. Pass Value*'s into lowering methods so that the proper pointers can be added to load/stores from the valist 2. Intrinsics that return void should only return a token chain, not a token chain/retval pair. 3. Rename LowerVAArgNext -> LowerVAArg, because VANext is long gone. 4. Now that we have Value*'s available in the lowering methods, pass them into any load/stores from the valist that are emitted git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22339 91177308-0d34-0410-b5e6-96231b3b80d8
2005-07-05Fix PowerPC varargsChris Lattner
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22335 91177308-0d34-0410-b5e6-96231b3b80d8
2005-07-01Varargs is apparently currently broken on PPC. This hacks it so that itChris Lattner
is at least overloading the right virtual methods. The implementations are currently wrong though. This fixes Ptrdist/bc, but not other programs (e.g. siod). git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22326 91177308-0d34-0410-b5e6-96231b3b80d8
2005-06-15Commit fix for generating conditional branch pseudo instructions thatNate Begeman
avoids dereferencing the end() iterator when selecting the fallthrough block. This requires an ilist change. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22212 91177308-0d34-0410-b5e6-96231b3b80d8
2005-06-14Commit a small improvement that is already in the x86 and ia64 backends toNate Begeman
not generate unnecessary register copies. This improves compile time by 2-5% depending on the test. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22210 91177308-0d34-0410-b5e6-96231b3b80d8
2005-06-08Handle some more real world cases of rlwimi. These don't come up thatNate Begeman
regularly in "normal" code, but for things like software graphics, they make a big difference. For the following code: unsigned short Trans16Bit(unsigned srcA,unsigned srcB,unsigned alpha) { unsigned tmpA,tmpB,mixed; tmpA = ((srcA & 0x03E0) << 15) | (srcA & 0x7C1F); tmpB = ((srcB & 0x03E0) << 15) | (srcB & 0x7C1F); mixed = (tmpA * alpha) + (tmpB * (32 - alpha)); return ((mixed >> 5) & 0x7C1F) | ((mixed >> 20) & 0x03E0); } We now generate: _Trans16Bit: .LBB_Trans16Bit_0: ; entry andi. r2, r4, 31775 rlwimi r2, r4, 15, 7, 11 subfic r4, r5, 32 mullw r2, r2, r4 andi. r4, r3, 31775 rlwimi r4, r3, 15, 7, 11 mullw r3, r4, r5 add r2, r2, r3 srwi r3, r2, 5 andi. r3, r3, 31775 rlwimi r3, r2, 12, 22, 26 blr Instead of: _Trans16Bit: .LBB_Trans16Bit_0: ; entry slwi r2, r4, 15 rlwinm r2, r2, 0, 7, 11 andi. r4, r4, 31775 or r2, r2, r4 subfic r4, r5, 32 mullw r2, r2, r4 slwi r4, r3, 15 rlwinm r4, r4, 0, 7, 11 andi. r3, r3, 31775 or r3, r4, r3 mullw r3, r3, r5 add r2, r2, r3 srwi r3, r2, 5 andi. r3, r3, 31775 srwi r2, r2, 20 rlwimi r3, r2, 0, 22, 26 blr git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22201 91177308-0d34-0410-b5e6-96231b3b80d8
2005-05-15Fix andrews changes to fit in 80 columnsChris Lattner
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22064 91177308-0d34-0410-b5e6-96231b3b80d8
2005-05-13treat TAILCALL nodes identically to CALL nodesChris Lattner
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21977 91177308-0d34-0410-b5e6-96231b3b80d8
2005-05-13Add an isTailCall flag to LowerCallToChris Lattner
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21958 91177308-0d34-0410-b5e6-96231b3b80d8
2005-05-13Realize that we don't support fmod directly, fixing ↵Chris Lattner
CodeGen/Generic/print-arith-fp.ll git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21939 91177308-0d34-0410-b5e6-96231b3b80d8
2005-05-12rename the ADJCALLSTACKDOWN/ADJCALLSTACKUP nodes to be CALLSEQ_START/BEGIN.Chris Lattner
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21915 91177308-0d34-0410-b5e6-96231b3b80d8
2005-05-12Pass in Calling Convention to use into LowerCallToChris Lattner
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21899 91177308-0d34-0410-b5e6-96231b3b80d8
2005-05-12These targets don't like setccChris Lattner
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21884 91177308-0d34-0410-b5e6-96231b3b80d8
2005-05-11Necessary changes to codegen cttz efficiently on PowerPCNate Begeman
1. Teach LegalizeDAG how to better legalize CTTZ if the target doesn't have CTPOP, but does have CTLZ 2. Teach PPC32 how to do sub x, const -> add x, -const for valid consts 3. Teach PPC32 how to do and (xor a, -1) b -> andc b, a 4. Teach PPC32 that ISD::CTLZ -> PPC::CNTLZW git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21880 91177308-0d34-0410-b5e6-96231b3b80d8
2005-05-09fold and (shl X, C1), C2 -> rlwinm when possible. Many other cases are ↵Chris Lattner
possible, include and (srl) and the inverses (shl and) etc. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21820 91177308-0d34-0410-b5e6-96231b3b80d8
2005-05-04fix typoAndrew Lenharth
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21693 91177308-0d34-0410-b5e6-96231b3b80d8
2005-05-03Implement count leading zeros (ctlz), count trailing zeros (cttz), and countAndrew Lenharth
population (ctpop). Generic lowering is implemented, however only promotion is implemented for SelectionDAG at the moment. More coming soon. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21676 91177308-0d34-0410-b5e6-96231b3b80d8
2005-04-30This target doesn't support the FSIN/FCOS/FSQRT nodes yetChris Lattner
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21633 91177308-0d34-0410-b5e6-96231b3b80d8
2005-04-27Implement Value* tracking for loads and stores in the selection DAG. This ↵Andrew Lenharth
enables one to use alias analysis in the backends. (TRUNK)Stores and (EXT|ZEXT|SEXT)Loads have an extra SDOperand which is a SrcValueSDNode which contains the Value*. Note that if the operation is introduced by the backend, it will still have the operand, but the value* will be null. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21599 91177308-0d34-0410-b5e6-96231b3b80d8
2005-04-22Convert tabs to spacesMisha Brukman
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21452 91177308-0d34-0410-b5e6-96231b3b80d8
2005-04-21Remove trailing whitespaceMisha Brukman
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21425 91177308-0d34-0410-b5e6-96231b3b80d8
2005-04-21Match another form of eqvChris Lattner
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21413 91177308-0d34-0410-b5e6-96231b3b80d8
2005-04-18Next round of PPC CR optimizations. For the following code:Nate Begeman
int %bar(float %a, float %b, float %c, float %d) { entry: %tmp.1 = setlt float %a, %d %tmp.2 = setlt float %b, %d %or = or bool %tmp.1, %tmp.2 %tmp.3 = setgt float %c, %d %tmp.4 = or bool %or, %tmp.3 %tmp.5 = and bool %tmp.4, true %retval = cast bool %tmp.5 to int ret int %retval } We now emit: _bar: .LBB_bar_0: ; entry fcmpu cr0, f1, f4 fcmpu cr1, f2, f4 cror 0, 0, 4 fcmpu cr1, f3, f4 cror 28, 0, 5 mfcr r2 rlwinm r3, r2, 29, 31, 31 blr Instead of: _bar: .LBB_bar_0: ; entry fcmpu cr7, f1, f4 mfcr r2 rlwinm r2, r2, 29, 31, 31 fcmpu cr7, f2, f4 mfcr r3 rlwinm r3, r3, 29, 31, 31 or r2, r2, r3 fcmpu cr7, f3, f4 mfcr r3 rlwinm r3, r3, 30, 31, 31 or r3, r2, r3 blr git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21321 91177308-0d34-0410-b5e6-96231b3b80d8
2005-04-18Change codegen for setcc to read the bit directly out of the conditionNate Begeman
register. Added support in the .td file for the g5-specific variant of cr -> gpr moves that executes faster, but we currently don't generate it. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21314 91177308-0d34-0410-b5e6-96231b3b80d8
2005-04-15Make pattern isel default for ppcNate Begeman
Add new ppc beta option related to using condition registers Make pattern isel control flag (-enable-pattern-isel) global and tristate 0 == off 1 == on 2 == target default git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21309 91177308-0d34-0410-b5e6-96231b3b80d8
2005-04-14Implement multi-way branches through logical ops on condition registers.Nate Begeman
This can generate considerably shorter code, reducing the size of crafty by almost 1%. Also fix the printing of mcrf. The code is currently disabled until it gets a bit more testing, but should work as-is. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21298 91177308-0d34-0410-b5e6-96231b3b80d8
2005-04-13Start allocating condition registers. Almost all explicit uses of CR0 areNate Begeman
now gone. Next step is to get rid of the remaining ones and then start allocating bools to CRs where appropriate. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21294 91177308-0d34-0410-b5e6-96231b3b80d8
2005-04-13Implement the fold shift X, zext(Y) -> shift X, Y at the target level,Nate Begeman
where it is safe to do so. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21293 91177308-0d34-0410-b5e6-96231b3b80d8
2005-04-13Disbale the broken fold of shift + sz[ext] for nowNate Begeman
Move the transform for select (a < 0) ? b : 0 into the dag from ppc isel Enable the dag to fold and (setcc, 1) -> setcc for targets where setcc always produces zero or one. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21291 91177308-0d34-0410-b5e6-96231b3b80d8
2005-04-13remove one more occurance of this that snuck inChris Lattner
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21271 91177308-0d34-0410-b5e6-96231b3b80d8
2005-04-13Elimate handling of ZERO_EXTEND_INREG. This causes the PPC backend to emitChris Lattner
andi instructions instead of rlwinm instructions for zero extend, but they seem like they would take the same time. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21268 91177308-0d34-0410-b5e6-96231b3b80d8
2005-04-12Fold shift by size larger than type size to undefNate Begeman
Make llvm undef values generate ISD::UNDEF nodes git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21261 91177308-0d34-0410-b5e6-96231b3b80d8
2005-04-12Implement setcc op, -1 sequencesNate Begeman
Remove dead setcc op, 0 sequences Coming later: generalization of op, imm git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21260 91177308-0d34-0410-b5e6-96231b3b80d8
2005-04-12Implement bitfield clearsNate Begeman
Implement divide by negative power of two git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21240 91177308-0d34-0410-b5e6-96231b3b80d8
2005-04-11Add recording variants of ISD::AND and ISD::OR. This kills almost 1000Nate Begeman
(1.5%) instructions in 186.crafty git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21222 91177308-0d34-0410-b5e6-96231b3b80d8
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