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authorChris Lattner <sabre@nondot.org>2005-07-05 19:58:54 +0000
committerChris Lattner <sabre@nondot.org>2005-07-05 19:58:54 +0000
commite0fe225e8912b6308e3e1db442ba7b96d9f09ff3 (patch)
tree011ab0567e3a8ac8cf8596629cb85143f30be0ad /lib/Target/PowerPC/PPCISelPattern.cpp
parente64e72b794cfa385372436b3c88460aeee0acbf6 (diff)
Make several cleanups to Andrews varargs change:
1. Pass Value*'s into lowering methods so that the proper pointers can be added to load/stores from the valist 2. Intrinsics that return void should only return a token chain, not a token chain/retval pair. 3. Rename LowerVAArgNext -> LowerVAArg, because VANext is long gone. 4. Now that we have Value*'s available in the lowering methods, pass them into any load/stores from the valist that are emitted git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22339 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/Target/PowerPC/PPCISelPattern.cpp')
-rw-r--r--lib/Target/PowerPC/PPCISelPattern.cpp36
1 files changed, 17 insertions, 19 deletions
diff --git a/lib/Target/PowerPC/PPCISelPattern.cpp b/lib/Target/PowerPC/PPCISelPattern.cpp
index 00990023c1..b29b11f182 100644
--- a/lib/Target/PowerPC/PPCISelPattern.cpp
+++ b/lib/Target/PowerPC/PPCISelPattern.cpp
@@ -97,13 +97,13 @@ namespace {
bool isTailCall, SDOperand Callee, ArgListTy &Args,
SelectionDAG &DAG);
- virtual std::pair<SDOperand, SDOperand>
- LowerVAStart(SDOperand Chain, SelectionDAG &DAG, SDOperand Dest);
-
+ virtual SDOperand LowerVAStart(SDOperand Chain, SDOperand VAListP,
+ Value *VAListV, SelectionDAG &DAG);
+
virtual std::pair<SDOperand,SDOperand>
- LowerVAArgNext(SDOperand Chain, SDOperand VAList,
- const Type *ArgTy, SelectionDAG &DAG);
-
+ LowerVAArg(SDOperand Chain, SDOperand VAListP, Value *VAListV,
+ const Type *ArgTy, SelectionDAG &DAG);
+
virtual std::pair<SDOperand, SDOperand>
LowerFrameReturnAddress(bool isFrameAddr, SDOperand Chain, unsigned Depth,
SelectionDAG &DAG);
@@ -463,26 +463,24 @@ PPC32TargetLowering::LowerCallTo(SDOperand Chain,
return std::make_pair(TheCall, Chain);
}
-std::pair<SDOperand, SDOperand>
-PPC32TargetLowering::LowerVAStart(SDOperand Chain, SelectionDAG &DAG,
- SDOperand Dest) {
+SDOperand PPC32TargetLowering::LowerVAStart(SDOperand Chain, SDOperand VAListP,
+ Value *VAListV, SelectionDAG &DAG) {
// vastart just stores the address of the VarArgsFrameIndex slot into the
// memory location argument.
SDOperand FR = DAG.getFrameIndex(VarArgsFrameIndex, MVT::i32);
- SDOperand Result = DAG.getNode(ISD::STORE, MVT::Other, Chain, FR, Dest,
- DAG.getSrcValue(NULL));
- return std::make_pair(Result, Result);
+ return DAG.getNode(ISD::STORE, MVT::Other, Chain, FR, VAListP,
+ DAG.getSrcValue(VAListV));
}
-std::pair<SDOperand,SDOperand> PPC32TargetLowering::
-LowerVAArgNext(SDOperand Chain, SDOperand VAArgOp,
- const Type *ArgTy, SelectionDAG &DAG) {
+std::pair<SDOperand,SDOperand>
+PPC32TargetLowering::LowerVAArg(SDOperand Chain,
+ SDOperand VAListP, Value *VAListV,
+ const Type *ArgTy, SelectionDAG &DAG) {
MVT::ValueType ArgVT = getValueType(ArgTy);
SDOperand VAList =
- DAG.getLoad(MVT::i32, Chain, VAArgOp, DAG.getSrcValue(NULL));
- SDOperand Result = DAG.getLoad(ArgVT, VAList.getValue(1), VAList,
- DAG.getSrcValue(NULL));
+ DAG.getLoad(MVT::i32, Chain, VAListP, DAG.getSrcValue(VAListV));
+ SDOperand Result = DAG.getLoad(ArgVT, Chain, VAList, DAG.getSrcValue(NULL));
unsigned Amt;
if (ArgVT == MVT::i32 || ArgVT == MVT::f32)
Amt = 4;
@@ -494,7 +492,7 @@ LowerVAArgNext(SDOperand Chain, SDOperand VAArgOp,
VAList = DAG.getNode(ISD::ADD, VAList.getValueType(), VAList,
DAG.getConstant(Amt, VAList.getValueType()));
Chain = DAG.getNode(ISD::STORE, MVT::Other, Chain,
- VAList, VAArgOp, DAG.getSrcValue(NULL));
+ VAList, VAListP, DAG.getSrcValue(VAListV));
return std::make_pair(Result, Chain);
}