diff options
| author | Chris Lattner <sabre@nondot.org> | 2005-07-22 22:58:34 +0000 |
|---|---|---|
| committer | Chris Lattner <sabre@nondot.org> | 2005-07-22 22:58:34 +0000 |
| commit | aa68f7fa0920bd7eaf61e1f9a838f8aeb4f61b2a (patch) | |
| tree | 47ed3d69ba4cf4612396c07f91ee4557f239cd5a /lib/Target/PowerPC/PPCISelPattern.cpp | |
| parent | ab25eda801bf4a344e96c66861893c8310d128c4 (diff) | |
PowerPC no-pic code is not quite ready for prime-time
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22507 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/Target/PowerPC/PPCISelPattern.cpp')
| -rw-r--r-- | lib/Target/PowerPC/PPCISelPattern.cpp | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/lib/Target/PowerPC/PPCISelPattern.cpp b/lib/Target/PowerPC/PPCISelPattern.cpp index 09ccd6ae97..4cbb585e82 100644 --- a/lib/Target/PowerPC/PPCISelPattern.cpp +++ b/lib/Target/PowerPC/PPCISelPattern.cpp @@ -45,6 +45,7 @@ namespace { PPC32TargetLowering(TargetMachine &TM) : TargetLowering(TM) { // Fold away setcc operations if possible. setSetCCIsExpensive(); + PICEnabled = true; // Set up the register classes. addRegisterClass(MVT::i32, PPC32::GPRCRegisterClass); |