llvm - http://llvm.org

Age	Commit message (Expand)	Author
2010-11-03	Teach ARM Target to use the tblgen support for generating an MC'ized	Jim Grosbach
2010-11-03	trailing whitespace	Jim Grosbach
2010-11-03	Put the PC encoding in the correct bit position.	Bill Wendling
2010-11-03	The MC code couldn't handle ARM LDR instructions with negative offsets:	Bill Wendling
2010-11-02	Obsessive formatting changes. No functionality impact.	Bill Wendling
2010-11-02	Omit unused parameter name.	Bill Wendling
2010-11-02	Simplify the EncodeInstruction method now that a lot of the special case stuff	Bill Wendling
2010-11-02	Rename getAddrModeImm12OpValue to getAddrModeImmOpValue and expand it to work	Bill Wendling
2010-11-02	Rename encoder methods to match naming convention.	Owen Anderson
2010-11-02	Add correct encodings for the rest of the vld instructions that we generate.	Owen Anderson
2010-11-02	Add correct NEON encodings for vld2, vld3, and vld4 basic variants.	Owen Anderson
2010-11-02	Add aesthetic break.	Owen Anderson
2010-11-02	Add correct NEON encodings for the "multiple single elements" form of vld.	Owen Anderson
2010-11-01	Explicitly check for non-consant reference in an LDRi12 instruction. Add FIXME	Jim Grosbach
2010-11-01	Remove unused function.	Jim Grosbach
2010-10-30	Avoid re-evaluating MI.getNumOperands() every iteration of the loop.	Jim Grosbach
2010-10-30	Encode the register list operands for ARM mode LDM/STM instructions.	Jim Grosbach
2010-10-29	trailing whitespace	Jim Grosbach
2010-10-29	s/getNEONVcvtImm32/getNEONVcvtImm32OpValue/ to be consistent with other operand	Jim Grosbach
2010-10-28	PLD, PLDW, PLI encodings, plus refactor their use of addrmode2.	Jim Grosbach
2010-10-27	Provide correct encodings for NEON vcvt, which has its own special immediate ...	Owen Anderson
2010-10-26	First part of refactoring ARM addrmode2 (load/store) instructions to be more	Jim Grosbach
2010-10-21	ARM Binary encoding information for BFC/BFI instructions.	Jim Grosbach
2010-10-21	Move the encoding logic for Q registers into getMachineOpValue().	Owen Anderson
2010-10-15	ARM mode encoding information for UBFX and SBFX instructions.	Jim Grosbach
2010-10-14	Add support for vmov.f64/.f32 encoding. There's a bit of a hack going on	Bill Wendling
2010-10-13	Add ARM mode encoding for [SU]XT[BH] and [SU]XTA[BH] instructions.	Jim Grosbach
2010-10-12	Add the rest of the ARM so_reg encoding options (register shifted register)	Jim Grosbach
2010-10-12	Move the ARM so_imm encoding into a custom operand encoder and remove the	Jim Grosbach
2010-10-12	Add custom encoder for the 's' bit denoting whether an ARM arithmetic	Jim Grosbach
2010-10-12	Add MOVi ARM encoding.	Jim Grosbach
2010-10-12	Nuke unused wrapper function.	Jim Grosbach
2010-10-12	Add encoding information for the remainder of the generic arithmetic	Jim Grosbach
2010-10-11	MC machine encoding for simple aritmetic instructions that use a shifted	Jim Grosbach
2010-10-08	Implement a few more binary encoding bits. Still very early stage proof-of-	Jim Grosbach
2010-10-08	Reapply 116059, this time without the fatfingered pasto at the top.	Jim Grosbach
2010-10-08	Reverting 116059. Bots are unhappy with it.	Jim Grosbach
2010-10-08	'const'ify getMachineOpValue() and associated helpers.	Jim Grosbach
2010-10-08	Enable binary encoding of some simple instructions.	Jim Grosbach
2010-10-08	Make <target>CodeEmitter::getBinaryCodeForInstr() a const method.	Jim Grosbach
2010-10-07	Trivial MC code emitter shell. No instruction forms actually handled yet.	Jim Grosbach
2010-10-07	Include the auto-generated bits for machine encoding.	Jim Grosbach
2010-10-07	ARM instruction don't have instruction prefixes, so remove the helper functions	Jim Grosbach
2010-09-18	Fix build.	Michael J. Spencer
2010-09-17	Add skeleton infrastructure for the ARMMCCodeEmitter class. Patch by Jason Kim!	Jim Grosbach