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AgeCommit message (Expand)Author
2013-05-03R600: Clean up comments in Processors.tdTom Stellard
2013-05-03Add support for reading ARM ELF build attributes.Amara Emerson
2013-05-03X86: Add target description for btver2; make autodetection logic aware of AVX.Benjamin Kramer
2013-05-03Unbreaking the non-x86 build bots by protecting the AVX test code properly.Aaron Ballman
2013-05-03Correctly testing for AVX support in x86 based off code from Hosts.cpp.Aaron Ballman
2013-05-03Fix missing include in Hexagon code for Release+AssertsReid Kleckner
2013-05-03In MC asm parsing, account for the possibility of whitespace withinJohn McCall
2013-05-02[mips] Handle reading, writing or copying of ccond field of DSP controlAkira Hatanaka
2013-05-02reverting r180953Jyotsna Verma
2013-05-02R600: Signed literals are 64bits wideVincent Lejeune
2013-05-02R600: If previous bundle is dot4, PV valid chan is always XVincent Lejeune
2013-05-02R600: Improve asmPrint of ALU clauseVincent Lejeune
2013-05-02R600: Prettier asmPrint of AluVincent Lejeune
2013-05-02Hexagon: Add multiclass/encoding bits for the New-Value Jump instructions.Jyotsna Verma
2013-05-02Hexagon - Add peephole optimizations for zero extends.Pranav Bhandarkar
2013-05-02[mips] Fix the head Mips16RegisterInfo.cpp commentRichard Sandiford
2013-05-02Hexagon: Honor __builtin_expect by using branch probabilities.Jyotsna Verma
2013-05-02R600: Use new tablegen syntax for patternsTom Stellard
2013-05-02R600/SI: remove nonsense select patternTom Stellard
2013-05-0280-col fixup.Michael Liao
2013-05-02Avoid duplicating logic on frame register selecting when lowering eh_returnMichael Liao
2013-05-02Avoid duplicating logic on frame register selecting when lowering frameaddrMichael Liao
2013-05-01[mips] Rename class and functions. Simplify code.Akira Hatanaka
2013-05-01This exposes more MCJIT options via the C API:Filip Pizlo
2013-05-01Hexagon: Use multiclass for Jump instructions.Jyotsna Verma
2013-05-01Hexagon: Clear isKill flag on the predicate register inJyotsna Verma
2013-05-01This patch breaks up Wrap.h so that it does not have to include all of Filip Pizlo
2013-05-01Put VMOVPQIto64rr in the VRPDI class.Rafael Espindola
2013-04-30[mips] Fix handling of instructions which copy to/from accumulator registers.Akira Hatanaka
2013-04-30[mips] Instruction selection patterns for DSP-ASE vector select and compareAkira Hatanaka
2013-04-30[mips] Simplify code.Akira Hatanaka
2013-04-30[mips] Clear isCommutable bit of instructions which are not commutable.Akira Hatanaka
2013-04-30Text files should not be marked executable.Rafael Espindola
2013-04-30s tightens up the encoding description for ARM post-indexed ldr instructions....Mihai Popa
2013-04-30Refactoring patch.Stepan Dyatkovskiy
2013-04-30R600: Always use texture cache for compute shadersVincent Lejeune
2013-04-30R600: use native for aluVincent Lejeune
2013-04-30R600: Packetize instructionsVincent Lejeune
2013-04-30R600: Rework Scheduling to handle difference between VLIW4 and VLIW5 chipsVincent Lejeune
2013-04-30R600: Add a Bank Swizzle operandVincent Lejeune
2013-04-30R600: Take inner dependency into tex/vtx clausesVincent Lejeune
2013-04-30R600: Turn TEX/VTX into native instructionsVincent Lejeune
2013-04-30R600: Add FetchInst bit to instruction defs to denote vertex/tex instructionsVincent Lejeune
2013-04-30R600: Add some new processor variantsVincent Lejeune
2013-04-30R600: Clean up instruction class definitionsVincent Lejeune
2013-04-30R600: config section now reports use of killgtVincent Lejeune
2013-04-29R600: Use correct CF_END instruction on Northern Island GPUsTom Stellard
2013-04-29R600: Fix encoding of CF_END_{EG, R600} instructionsTom Stellard
2013-04-28AArch64 InstrFormats:Jia Liu
2013-04-27Make all darwin ppc stubs local.Rafael Espindola