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path: root/lib/Target/ARM/ARMLoadStoreOptimizer.cpp
AgeCommit message (Expand)Author
2010-11-18Missed the _RET versions of LDMIA.Bill Wendling
2010-11-17Add missing opcodes now that this function's used in more than one place.Bill Wendling
2010-11-17Revert r119109 for now. It's breaking 176.gcc.Evan Cheng
2010-11-17The machine instruction no longer encodes the submode as a separate operand. WeBill Wendling
2010-11-16Encode the multi-load/store instructions with their respective modes ('ia',Bill Wendling
2010-11-15Make sure ARM multi load / store pass copies memoperands when forming ldrd / ...Evan Cheng
2010-10-27Refactor ARM STR/STRB instruction patterns into STR{B}i12 and STR{B}rs, likeJim Grosbach
2010-10-27One more spot where the new arm mode LDR instruction representationJim Grosbach
2010-10-26First part of refactoring ARM addrmode2 (load/store) instructions to be moreJim Grosbach
2010-10-26Grammar.Jim Grosbach
2010-10-22Transfer implicit ops when forming load multiple and return instructions.Evan Cheng
2010-09-29Increase ARM APCS preferred alignment for i64 and f64 from 32 bits to 64 bits.Bob Wilson
2010-09-15move getRegisterNumbering() to out of ARMBaseRegisterInfo into the helperJim Grosbach
2010-09-10Calculate the number of VLDM/VSTM registers by subtracting the number ofBob Wilson
2010-09-10Fix merging base-updates for VLDM/VSTM: Before I switched these instructionsBob Wilson
2010-08-30Remember to clear the shadow kill flag at the same time as clearing the realJakob Stoklund Olesen
2010-08-27When merging Thumb2 loads/stores, do not give up when the offset is one ofBob Wilson
2010-08-27Change ARM VFP VLDM/VSTM instructions to use addressing mode #4, just likeBob Wilson
2010-08-27Unsigned value cannot be < 0.Bob Wilson
2010-08-06Reapply r110396, with fixes to appease the Linux buildbot gods.Owen Anderson
2010-08-06Revert r110396 to fix buildbots.Owen Anderson
2010-08-05Don't use PassInfo* as a type identifier for passes. Instead, use the addres...Owen Anderson
2010-06-29When no memoperands are present, assume unaligned, volatile.Jakob Stoklund Olesen
2010-06-22Use pre-increment instead of post-increment when the result is not used.Dan Gohman
2010-06-21Fix PR7421: bug in kill transferring logic. It was ignoring loads / stores wh...Evan Cheng
2010-06-15Make sure to skip dbg_value instructions when finding an insertion point forJim Grosbach
2010-06-09be slightly more subtle about skipping dbg_value instructions; otherwise, if aJim Grosbach
2010-06-08fix copy/paste/modify think-oJim Grosbach
2010-06-04Another fix to prevent debug info from affecting codegen. rdar://7797940Jim Grosbach
2010-06-04more dbg_value adjustments so debug info doesn't affect codegenJim Grosbach
2010-06-04fix typoJim Grosbach
2010-06-03Teach the ARM load-store optimizer to deal with dbg_value instructions.Jim Grosbach
2010-06-02Clean up 80 column violations. No functional change.Jim Grosbach
2010-04-15Add more const qualifiers for LLVM IR pointers in CodeGen.Dan Gohman
2010-03-26vldm/vstm can only do up to 16 double-word registers at a time.Jim Grosbach
2010-03-20pr6652: Use LDM to restore PC to the return address on ARMv4.Bob Wilson
2010-03-16Remove redundant writeback flag in ARM addressing mode 5.Bob Wilson
2010-03-16Remove the writeback flag from ARM's address mode 4. Now that we have separateBob Wilson
2010-03-16Wrap a long line and add some parens to be consistent.Bob Wilson
2010-03-13Change ARM ld/st multiple instructions to have variant instructions forBob Wilson
2010-03-13Combine the code to build VLDM and VSTM instructions, since they areBob Wilson
2010-03-12Tidy up. No functional changes.Bob Wilson
2010-03-04pr6480: Don't try producing ld/st-multiple instructions when the address isBob Wilson
2010-02-24Stay away from str <undef> in ARMLoadStoreOpt. This pass does not understandJakob Stoklund Olesen
2010-02-12Load / store multiple instructions cannot load / store sp. Sorry, can't come ...Evan Cheng
2010-01-14Don't fold insufficiently aligned ldr/str into ldm/stm instructions.Jakob Stoklund Olesen
2009-12-23Move kill flags when the same register occurs more than once in a sequence.Jakob Stoklund Olesen
2009-12-23Handle undef operands properly.Jakob Stoklund Olesen
2009-12-23Make insert position available to MergeOpsUpdate.Jakob Stoklund Olesen
2009-12-23Perform kill flag calculations in new method. No functional changes.Jakob Stoklund Olesen