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| author | Bob Wilson <bob.wilson@apple.com> | 2010-03-16 00:31:15 +0000 |
|---|---|---|
| committer | Bob Wilson <bob.wilson@apple.com> | 2010-03-16 00:31:15 +0000 |
| commit | 8d95e0be13079339c2b84f245fb1665953e2bc77 (patch) | |
| tree | 5f45eb05edcc1e6790ef24419a109bd3ce0aec2d /lib/Target/ARM/ARMLoadStoreOptimizer.cpp | |
| parent | 999aee24c7b7511575146b9950bb85830fab0378 (diff) | |
Wrap a long line and add some parens to be consistent.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@98596 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/Target/ARM/ARMLoadStoreOptimizer.cpp')
| -rw-r--r-- | lib/Target/ARM/ARMLoadStoreOptimizer.cpp | 5 |
1 files changed, 3 insertions, 2 deletions
diff --git a/lib/Target/ARM/ARMLoadStoreOptimizer.cpp b/lib/Target/ARM/ARMLoadStoreOptimizer.cpp index 77dd466761..8fbcf45dfd 100644 --- a/lib/Target/ARM/ARMLoadStoreOptimizer.cpp +++ b/lib/Target/ARM/ARMLoadStoreOptimizer.cpp @@ -243,8 +243,9 @@ ARMLoadStoreOpt::MergeOps(MachineBasicBlock &MBB, BaseKill = true; // New base is always killed right its use. } - bool isDPR = Opcode == ARM::VLDRD || Opcode == ARM::VSTRD; - bool isDef = isi32Load(Opcode) || Opcode == ARM::VLDRS || Opcode == ARM::VLDRD; + bool isDPR = (Opcode == ARM::VLDRD || Opcode == ARM::VSTRD); + bool isDef = (isi32Load(Opcode) || Opcode == ARM::VLDRS || + Opcode == ARM::VLDRD); Opcode = getLoadStoreMultipleOpcode(Opcode); MachineInstrBuilder MIB = (isAM4) ? BuildMI(MBB, MBBI, dl, TII->get(Opcode)) |