Age | Commit message (Expand) | Author |
2010-11-18 | Missed the _RET versions of LDMIA. | Bill Wendling |
2010-11-17 | Add missing opcodes now that this function's used in more than one place. | Bill Wendling |
2010-11-17 | Revert r119109 for now. It's breaking 176.gcc. | Evan Cheng |
2010-11-17 | The machine instruction no longer encodes the submode as a separate operand. We | Bill Wendling |
2010-11-16 | Encode the multi-load/store instructions with their respective modes ('ia', | Bill Wendling |
2010-11-15 | Make sure ARM multi load / store pass copies memoperands when forming ldrd / ... | Evan Cheng |
2010-10-27 | Refactor ARM STR/STRB instruction patterns into STR{B}i12 and STR{B}rs, like | Jim Grosbach |
2010-10-27 | One more spot where the new arm mode LDR instruction representation | Jim Grosbach |
2010-10-26 | First part of refactoring ARM addrmode2 (load/store) instructions to be more | Jim Grosbach |
2010-10-26 | Grammar. | Jim Grosbach |
2010-10-22 | Transfer implicit ops when forming load multiple and return instructions. | Evan Cheng |
2010-09-29 | Increase ARM APCS preferred alignment for i64 and f64 from 32 bits to 64 bits. | Bob Wilson |
2010-09-15 | move getRegisterNumbering() to out of ARMBaseRegisterInfo into the helper | Jim Grosbach |
2010-09-10 | Calculate the number of VLDM/VSTM registers by subtracting the number of | Bob Wilson |
2010-09-10 | Fix merging base-updates for VLDM/VSTM: Before I switched these instructions | Bob Wilson |
2010-08-30 | Remember to clear the shadow kill flag at the same time as clearing the real | Jakob Stoklund Olesen |
2010-08-27 | When merging Thumb2 loads/stores, do not give up when the offset is one of | Bob Wilson |
2010-08-27 | Change ARM VFP VLDM/VSTM instructions to use addressing mode #4, just like | Bob Wilson |
2010-08-27 | Unsigned value cannot be < 0. | Bob Wilson |
2010-08-06 | Reapply r110396, with fixes to appease the Linux buildbot gods. | Owen Anderson |
2010-08-06 | Revert r110396 to fix buildbots. | Owen Anderson |
2010-08-05 | Don't use PassInfo* as a type identifier for passes. Instead, use the addres... | Owen Anderson |
2010-06-29 | When no memoperands are present, assume unaligned, volatile. | Jakob Stoklund Olesen |
2010-06-22 | Use pre-increment instead of post-increment when the result is not used. | Dan Gohman |
2010-06-21 | Fix PR7421: bug in kill transferring logic. It was ignoring loads / stores wh... | Evan Cheng |
2010-06-15 | Make sure to skip dbg_value instructions when finding an insertion point for | Jim Grosbach |
2010-06-09 | be slightly more subtle about skipping dbg_value instructions; otherwise, if a | Jim Grosbach |
2010-06-08 | fix copy/paste/modify think-o | Jim Grosbach |
2010-06-04 | Another fix to prevent debug info from affecting codegen. rdar://7797940 | Jim Grosbach |
2010-06-04 | more dbg_value adjustments so debug info doesn't affect codegen | Jim Grosbach |
2010-06-04 | fix typo | Jim Grosbach |
2010-06-03 | Teach the ARM load-store optimizer to deal with dbg_value instructions. | Jim Grosbach |
2010-06-02 | Clean up 80 column violations. No functional change. | Jim Grosbach |
2010-04-15 | Add more const qualifiers for LLVM IR pointers in CodeGen. | Dan Gohman |
2010-03-26 | vldm/vstm can only do up to 16 double-word registers at a time. | Jim Grosbach |
2010-03-20 | pr6652: Use LDM to restore PC to the return address on ARMv4. | Bob Wilson |
2010-03-16 | Remove redundant writeback flag in ARM addressing mode 5. | Bob Wilson |
2010-03-16 | Remove the writeback flag from ARM's address mode 4. Now that we have separate | Bob Wilson |
2010-03-16 | Wrap a long line and add some parens to be consistent. | Bob Wilson |
2010-03-13 | Change ARM ld/st multiple instructions to have variant instructions for | Bob Wilson |
2010-03-13 | Combine the code to build VLDM and VSTM instructions, since they are | Bob Wilson |
2010-03-12 | Tidy up. No functional changes. | Bob Wilson |
2010-03-04 | pr6480: Don't try producing ld/st-multiple instructions when the address is | Bob Wilson |
2010-02-24 | Stay away from str <undef> in ARMLoadStoreOpt. This pass does not understand | Jakob Stoklund Olesen |
2010-02-12 | Load / store multiple instructions cannot load / store sp. Sorry, can't come ... | Evan Cheng |
2010-01-14 | Don't fold insufficiently aligned ldr/str into ldm/stm instructions. | Jakob Stoklund Olesen |
2009-12-23 | Move kill flags when the same register occurs more than once in a sequence. | Jakob Stoklund Olesen |
2009-12-23 | Handle undef operands properly. | Jakob Stoklund Olesen |
2009-12-23 | Make insert position available to MergeOpsUpdate. | Jakob Stoklund Olesen |
2009-12-23 | Perform kill flag calculations in new method. No functional changes. | Jakob Stoklund Olesen |