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2020-03-16Flash driver for STM32G0xx and STM32G4xxAndreas Bolsch
Flash module of STM32G0/G4 family is quite similar to the one of STM32L4, so only minor changes are required, in particular adaption of flash loader to Cortex-M0. Register addresses passed to flash loader to simplify integration of L5. Added re-probe after option byte load. Added flash size override via cfg file. WRPxxR mask now based on max. number of pages instead of fixed 0xFF, as G4 devices fill up unused bits with '1'. Sizes in stm32l4_probe changed to multiples of 1kB. Tested with Nucleo-G071RB, G030J6, Nucleo-G431RB and Nucleo-G474RE. Gap handling in G4 Cat. 3 dual bank mode tested with STM32G473RB. This handling isn't optimal as the bank size includes the size of the gap. WB not tested. Change-Id: I24df7c065afeb71c11c7e96de4aa9fdb91845593 Signed-off-by: Andreas Bolsch <hyphen0break@gmail.com> Reviewed-on: http://openocd.zylin.com/4807 Tested-by: jenkins Reviewed-by: Tarek BOCHKATI <tarek.bouchkati@gmail.com> Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2020-03-10flash/stm32h7x: fix bank sizes for devices with trimmed flashTarek BOCHKATI
STM32H7yxxI: dual independent 1 MByte banks STM32H7yxxG: dual independent 512 Kbyte banks STM32H7yxxB: single 128 Kbyte bank where y = [4/5] or [A/B] references: (documents are available in www.st.com) - STM32H7[4/5]x[G/I] : DS12110 Rev 7 >> 3.3.1 Embedded Flash memory - STM32H750xB : RM0433 Rev 6 >> Table 11. Flash memory organization on STM32H750xB devices - STM32H7[A/B]x[B/G/I] : RM0455 Rev 3 >> 4.3.4 Flash memory architecture and usage Change-Id: Ic9346964ef2554abf47f5832e25adfdc77bd323e Signed-off-by: Tarek BOCHKATI <tarek.bouchkati@gmail.com> Reviewed-on: http://openocd.zylin.com/5442 Tested-by: jenkins Reviewed-by: Christopher Head <chead@zaber.com>
2020-03-07flash/nor: update support for TI MSP432 devicesEdward Fewell
Added fixes for issues found in additional code reviews. Fixed host Endianness issues with using buffer reads and writes instead of the *_u32 variants. Changed code that tried to ID banks by hardcode bank_number values to use instead the bank base address. This fixes problems using configurations with multiple devices. Note that this replaces Change 4786 which has been abandoned because of extensive changes to the code to stop IDing banks by name. And I think I really messed up a rebase/merge on the document file. Tested on MSP432P401R, MSP432P4111, and MSP432E401Y Launchpads. Change-Id: Id05798b3aa78ae5cbe725ee762a164d673ee5767 Signed-off-by: Edward Fewell <efewell@ti.com> Reviewed-on: http://openocd.zylin.com/5481 Tested-by: jenkins Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2020-03-07bluenrg-x: simplyfied the driverluca vinci
Adopted only fast algorithm for flash programming: - write_word and write_byte methods have been removed. - start and end write alignments have been defined. Moved flash controller registers offsets in a common file shared with the flash algorithm. - the flash base address is passed to the flash algorithm as a parameter. Removed unused functions Change-Id: I80aeab3994e477044bbcf02e66d9525dae0cb491 Signed-off-by: luca vinci <luca.vinci@st.com> Reviewed-on: http://openocd.zylin.com/5393 Tested-by: jenkins Reviewed-by: Tomas Vanek <vanekt@fbl.cz> Reviewed-by: Michele Sardo <msmttchr@gmail.com>
2020-03-07bluenrg-x: added support for BlueNRG-LP deviceluca vinci
Extended bluenrg-x flash driver with BlueNRG-LP flash controller. Changes include: - register set for the flash controller - made software structure prone to support more easily future devices - updated target config file Change-Id: I2e2dc70db32cf98c62e3a43f2e44a4600a25ac5b Signed-off-by: luca vinci <luca.vinci@st.com> Reviewed-on: http://openocd.zylin.com/5343 Tested-by: jenkins Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2020-03-07helper/binarybuffer: fix clang static analyzer warningsTomas Vanek
Writing bits to an uninitialized buffer generated false warnings. Zero buffers before setting them by buf_set_u32|64() (do it only if bit-by-bit copy loop is used, zeroed buffer is not necessary if a fast path write is used) Change-Id: I2f7f8ddb45b0cbd08d3e249534fc51f4b5cc6694 Signed-off-by: Tomas Vanek <vanekt@fbl.cz> Reviewed-on: http://openocd.zylin.com/5383 Tested-by: jenkins Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
2020-03-07flash/nor/numicro: use flash infrastructure to align writeTomas Vanek
The aligning code generated a clang static analyzer warning and imposed huge memory leak. This part of code was removed and flash infrastructure to alignment is used instead. Not tested on hw! Change-Id: I7c71da87547e71d595a7e7071ae5adcc1cecc827 Signed-off-by: Tomas Vanek <vanekt@fbl.cz> Reviewed-on: http://openocd.zylin.com/5367 Tested-by: jenkins Reviewed-by: Oleksij Rempel <linux@rempel-privat.de>
2020-03-07flash/nor/fm4,tms470: fix clang static analyzer warningsTomas Vanek
Change-Id: I18c1501918d40453fea6aeeb6f035e46d41fc524 Signed-off-by: Tomas Vanek <vanekt@fbl.cz> Reviewed-on: http://openocd.zylin.com/5366 Tested-by: jenkins Reviewed-by: Oleksij Rempel <linux@rempel-privat.de>
2020-03-07src/flash/nor/at91sam3|4l|7: fix clang static analyzer warningsTomas Vanek
Change-Id: I5cd2b2ebb2bd1980bdd1632b5c35bda9718a1089 Signed-off-by: Tomas Vanek <vanekt@fbl.cz> Reviewed-on: http://openocd.zylin.com/5365 Tested-by: jenkins Reviewed-by: Oleksij Rempel <linux@rempel-privat.de>
2020-03-07flash/nor/stm32f1x: Group and cleanup device listMarc Schink
Group device list based on the device family and add clear device family names. Change-Id: I7a2dab1d1c0c8d141df02656c1964cb2c3fcbcd1 Signed-off-by: Marc Schink <dev@zapb.de> Reviewed-on: http://openocd.zylin.com/5423 Tested-by: jenkins Reviewed-by: Tarek BOCHKATI <tarek.bouchkati@gmail.com> Reviewed-by: Tomas Vanek <vanekt@fbl.cz> Reviewed-by: Oleksij Rempel <linux@rempel-privat.de>
2020-03-02flash/stm32h7x: add support of STM32H7Ax/H7Bx devicesTarek BOCHKATI
this new device has the following features: - single core cortex-M7 - 2MB flash - dual bank - page size 8k - write protection grouped by 4 sectors - write block size 128 bits (16 bytes) the bit definition of FLASH_CR is different than STM32H74x, that's why we introduced a helper to compute the FLASH_CR value Change-Id: I4da10cde8dd215b1b0f2645f0efdba9d198038d1 Signed-off-by: Tarek BOCHKATI <tarek.bouchkati@gmail.com> Reviewed-on: http://openocd.zylin.com/5441 Tested-by: jenkins Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2020-03-02Add support for SAMD21E17D deviceMichael Stoll
Change-Id: Id0a533f8899b20cc87e3a9143383ddf279c86301 Signed-off-by: Michael Stoll <michael.stoll@meadow-robotics.com> Reviewed-on: http://openocd.zylin.com/5458 Tested-by: jenkins Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2020-02-24coding style: fix space around pointer's asteriskAntonio Borneo
The script checkpatch available in new Linux kernel offers an experimental feature for automatically fix the code in place. While still experimental, the feature works quite well for simple fixes, like spacing. This patch has been created automatically with the script under review for inclusion in OpenOCD, using the command find src/ -type f -exec ./tools/scripts/checkpatch.pl \ -q --types POINTER_LOCATION --fix-inplace -f {} \; then manually reviewed. OpenOCD coding style does not mention the space around pointer's asterisk, so no check is enforced. This patch only makes the style uniform across the files. The patch only changes amount and position of whitespace, thus the following commands show empty diff git diff -w git log -w -p git log -w --stat Change-Id: Iefb4998e69bebdfe0d1ae65cadfc8d2c4f166d13 Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com> Reviewed-on: http://openocd.zylin.com/5197 Tested-by: jenkins
2020-02-24flash/nor/stm32l4x: Minor code cleanupsMarc Schink
Change-Id: I3053bbe888ac1f0a0593ef51bf9ca564f1cc27ec Signed-off-by: Marc Schink <dev@zapb.de> Reviewed-on: http://openocd.zylin.com/5449 Tested-by: jenkins Reviewed-by: Tarek BOCHKATI <tarek.bouchkati@gmail.com> Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
2020-02-24flash/nor/stm32h7x: Minor code cleanupsMarc Schink
Change-Id: Ia212b1877abeda27f507de29a3aee2b171c1b8c6 Signed-off-by: Marc Schink <dev@zapb.de> Reviewed-on: http://openocd.zylin.com/5448 Tested-by: jenkins Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com> Reviewed-by: Christopher Head <chead@zaber.com>
2020-02-23flash/nor/tcl.c: add filld command to write double-word with 64-bit valueTarek BOCHKATI
Change-Id: I2eeda7af7d855ed1284083d025994f8fa9531969 Signed-off-by: Tarek BOCHKATI <tarek.bouchkati@gmail.com> Reviewed-on: http://openocd.zylin.com/5443 Tested-by: jenkins Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2020-02-23flash/nor/stm32l4x: lock flash after errorTomas Vanek
Also add locking after option write, it was missing at all. Change-Id: I0227c6a74866f0fe8e40aa58616f0b3115ad5af0 Signed-off-by: Tomas Vanek <vanekt@fbl.cz> Reviewed-on: http://openocd.zylin.com/5361 Tested-by: jenkins Reviewed-by: Andreas Bolsch <hyphen0break@gmail.com> Reviewed-by: Tarek BOCHKATI <tarek.bouchkati@gmail.com>
2020-02-23flash/stm32h7x: use alignment infrastructureChristopher Head
Report the 32-byte alignemnt requirement via the bank structure rather than enforcing it ad-hoc in the write routine. This allows people to do non-32-byte-aligned writes if they want, with the infrastructure fixing up the addresses passed to the low-level driver. Change-Id: I2c4f532f2000435954a900224dbc9f2c30d1cc94 Signed-off-by: Christopher Head <chead@zaber.com> Reviewed-on: http://openocd.zylin.com/5388 Reviewed-by: Tarek BOCHKATI <tarek.bouchkati@gmail.com> Tested-by: jenkins Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2020-02-23flash/nor/stm32f1x: Some small code cleanupsMarc Schink
Change-Id: I1fc08b96b179a1376af233b713ae50d6ad7867a0 Signed-off-by: Marc Schink <dev@zapb.de> Reviewed-on: http://openocd.zylin.com/5404 Tested-by: jenkins Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
2020-02-23flash/nor/stm32h7x: check OPTCHANGEERRChristopher Head
Without this, a failed attempt to change option bytes will silently appear to succeed but without actually changing the option bytes (confusingly, the option bytes will still read back as if they had been changed until a reboot as well!). Change-Id: Id529c6c384a8a16be75f5702310670d99d8fac79 Signed-off-by: Christopher Head <chead@zaber.com> Reviewed-on: http://openocd.zylin.com/5418 Tested-by: jenkins Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
2020-02-23flash/nor/stm32h7x: fix incorrect array indexingChristopher Head
Change-Id: Iec2246df284953d1442dfefdad8e70041690dfe2 Signed-off-by: Christopher Head <chead@zaber.com> Reviewed-on: http://openocd.zylin.com/5417 Tested-by: jenkins Reviewed-by: Tarek BOCHKATI <tarek.bouchkati@gmail.com> Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
2020-02-15coding style: use ARRAY_SIZE() when possibleAntonio Borneo
We have the macro ARRAY_SIZE() already available. Use it! Issue identified by checkpatch script from Linux kernel v5.1 using the command find src/ -type f -exec ./tools/scripts/checkpatch.pl \ -q --types ARRAY_SIZE -f {} \; Change-Id: Ic7da9b710edf118eacb08f9e222f34208c580842 Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com> Reviewed-on: http://openocd.zylin.com/5198 Tested-by: jenkins Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2020-02-15flash/nor/stm32lx: Minor code cleanupsMarc Schink
Change-Id: I6440a4eb1f65a2f8ae2914b38f21a59955e85e0d Signed-off-by: Marc Schink <dev@zapb.de> Reviewed-on: http://openocd.zylin.com/5438 Tested-by: jenkins Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
2020-02-13flash/stm32lx: mention explicitly that this driver covers STM32 L0 and L1Tarek BOCHKATI
this is to avoid confusion with STM32 L4, L4+ and L5 families also: - a warning message is changed to error - stm32l0x and stm32l1x aliases has been created to permit the usage of either names Change-Id: If3f16d2a3b7d1369959aa7407da37a9076ea91d7 Signed-off-by: Tarek BOCHKATI <tarek.bouchkati@gmail.com> Reviewed-on: http://openocd.zylin.com/5437 Reviewed-by: Marc Schink <dev@zapb.de> Tested-by: jenkins Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2020-02-08efm32: add EFR32ZG13P and EFR32ZG14P partsFrank Hunleth
This adds the EFR32 Zen Gecko Family parts. The device family values are found in table 4.7.11 of https://www.silabs.com/documents/public/reference-manuals/efr32xg14-rm.pdf. Change-Id: I3858b7ba815784b1150e2214a2833e8ff7d249e1 Signed-off-by: Frank Hunleth <fhunleth@troodon-software.com> Reviewed-on: http://openocd.zylin.com/5364 Tested-by: jenkins Reviewed-by: Marc Schink <dev@zapb.de>
2020-02-06flash/nor: Add Renesas RPC HF driverMarek Vasut
Add driver for the RPC block in HF mode on Renesas R-Car Gen3 SoCs. This driver allows operating the on-SIP HF memory. Note that HF is CFI compliant flash, but it is not memory mapped, hence the need to replace all the memory accessors and read/write functions. The write function is entirely replaced to increase performance and is Spansion/AMD specific, since there is no known SIP with other HF from another vendor. Add the following two lines to board TCL file to bind the driver on R-Car Gen3 SoC using HyperFlash: set _FLASHNAME $_CHIPNAME.flash flash bank $_FLASHNAME rpchf 0x08000000 0x4000000 2 2 $_CHIPNAME.a57.0 Change-Id: Ie18729d017eeb46e1363333ffe002d010dfc5ead Signed-off-by: Marek Vasut <marek.vasut@gmail.com> Reviewed-on: http://openocd.zylin.com/5149 Tested-by: jenkins Reviewed-by: Oleksij Rempel <linux@rempel-privat.de>
2020-02-06flash/nor: Export various functions from the CFI coreMarek Vasut
Export various functions needed by other driver, specifically the upcoming Renesas RPC HF driver. No functional change. Change-Id: I551258979a7221288fb4f4382f857db5cfe0b0de Signed-off-by: Marek Vasut <marek.vasut@gmail.com> Reviewed-on: http://openocd.zylin.com/5148 Tested-by: jenkins Reviewed-by: Oleksij Rempel <linux@rempel-privat.de>
2020-01-27flash/nor/stm32l4x: fix minor errors in flash write/async algoTomas Vanek
Fix comment of tested errors in asm src. List all relevant errors in FLASH_ERROR mask: FLASH_PROGERR was missing and any trial to re-program already programmed double word ended up in the error bit held uncleared and flash write permanetly repeating the error message until reset. Lock the bank also after unsuccesfull write_block run. Set async target algo block size to size of double word. Remove warning in case of write_block success. In case of error use LOG_ERROR instead of warning. Change-Id: Ibf6d5e306a4c2eaa43de67d636b4902c737f02f3 Signed-off-by: Tomas Vanek <vanekt@fbl.cz> Reviewed-on: http://openocd.zylin.com/5360 Tested-by: jenkins Reviewed-by: Tarek BOCHKATI <tarek.bouchkati@gmail.com>
2020-01-27flash/nor/stm32l4x: use flash infrastructure to align writeTomas Vanek
The original code paded the write chunk with random bytes by overrunning the buffer. An user can easily regard the random bytes to be a programming error. Change-Id: Ib0f47b5bc406bc6a7c32f3d929bf324a17c7c1e1 Signed-off-by: Tomas Vanek <vanekt@fbl.cz> Reviewed-on: http://openocd.zylin.com/5359 Tested-by: jenkins Reviewed-by: Tarek BOCHKATI <tarek.bouchkati@gmail.com>
2020-01-27flash/nor/nrf5: Fix build error on OSXMarek Vasut
The chip->hwid is uint32_t , fix the print format. This was detected by TravisCI on OSX, where this triggers a build error. Change-Id: I776a7bb50e396c8fccc24500dec4750190da7982 Signed-off-by: Marek Vasut <marek.vasut@gmail.com> Reviewed-on: http://openocd.zylin.com/5401 Tested-by: jenkins Reviewed-by: Tomas Vanek <vanekt@fbl.cz> Reviewed-by: Ilya Kharin <akscram@gmail.com>
2020-01-22flash/nor/sh_qspi: Add SH QSPI driverMarek Vasut
Add driver for the SH QSPI controller. This SPI controller is often connected to the boot SPI NOR flash on R-Car Gen2 platforms. Add the following two lines to board TCL file to bind the driver on R-Car Gen2 SoC and make SRAM work area available: flash bank flash0 sh_qspi 0xe6b10000 0 0 0 ${_TARGETNAME}0 cs0 ${_TARGETNAME}0 configure -work-area-phys 0xe6300000 -work-area-virt 0xe6300000 -work-area-size 0x10000 -work-area-backup 0 To install mainline U-Boot on the board, use the following procedure: proc update_uboot {} { # SPL flash erase_sector 0 0x0 0x0 flash write_bank 0 /u-boot/spl/u-boot-spl.bin 0x0 # U-Boot flash erase_sector 0 0x5 0x6 flash write_bank 0 /u-boot/u-boot.img 0x140000 } Change-Id: Ief22f61e93bcabae37f6e371156dece6c4be3459 Signed-off-by: Marek Vasut <marek.vasut@gmail.com> --- V2: - Add Makefile and linker script for the SH QSPI IO algorithm - Include the algorithm code instead of hard-coding it Reviewed-on: http://openocd.zylin.com/5143 Tested-by: jenkins Reviewed-by: Oleksij Rempel <linux@rempel-privat.de>
2020-01-16flash/nor: Rename flash_address() to cfi_flash_address()Marek Vasut
This is a preparatory change, align the function name with the rest of the API, no functional change. Change-Id: I6a810d2a54edcd13ad9a87d24a7334802c41623b Signed-off-by: Marek Vasut <marek.vasut@gmail.com> Reviewed-on: http://openocd.zylin.com/5391 Tested-by: jenkins Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2020-01-16flash/nor: Rename get_cfi_info() to cfi_get_info()Marek Vasut
This is a preparatory change, align the function name with the rest of the API, no functional change. Change-Id: Ib967520f027b03eb1792b36ede52335df8e23941 Signed-off-by: Marek Vasut <marek.vasut@gmail.com> Reviewed-on: http://openocd.zylin.com/5390 Tested-by: jenkins Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2020-01-16flash/nor: Allow CFI memory read/write functions be overridenMarek Vasut
Add possibility to supply custom CFI memory accessors via cfi_info and override the default memory-mapped ones. Change-Id: I1b6bc1db69fc33e8cdef96c41742c40e6d8917e9 Signed-off-by: Marek Vasut <marek.vasut@gmail.com> Reviewed-on: http://openocd.zylin.com/5147 Tested-by: jenkins Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2020-01-16flash/nor: Drop size argument of cfi_target_{read,write}_memory()Marek Vasut
The size argument is always set to bank->bus_width and bank pointer is now passed into cfi_target_{read,write}_memory(), so the size can be accessed through the bank pointer inside the function instead of being explicitly passed in. Change-Id: I0abc1cc3bf513281c10cb5de7a21cb0e75cb7676 Signed-off-by: Marek Vasut <marek.vasut@gmail.com> Reviewed-on: http://openocd.zylin.com/5389 Tested-by: jenkins Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2020-01-16flash/nor: Pass flash_bank to memory accessorsMarek Vasut
Replace passing in struct target with passing in struct flash_bank, so that the later can contain function pointers to custom per-driver memory accessor functions. Change-Id: Id2573a6d5f1a73ed9c4f73c53592a9a335a11c99 Signed-off-by: Marek Vasut <marek.vasut@gmail.com> Reviewed-on: http://openocd.zylin.com/5146 Tested-by: jenkins Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2020-01-16flash/nor/stm32l4x: add support of STM32L4P5/L4Q5x devicesTarek BOCHKATI
STM32L4P/Q devices have: - similar flash layout as STM32L4R/S devices - 1024K of flash memory (some parts have 512K only) tested on NUCLEO-L4P5ZG using board/st_nucleo_l4.cfg Change-Id: I77047351bc7dcd7c76d0f31a77be73005104a06f Signed-off-by: Tarek BOCHKATI <tarek.bouchkati@gmail.com> Reviewed-on: http://openocd.zylin.com/5392 Tested-by: jenkins Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2020-01-16flash/nor: add support of STM32WB on top STM32L4 flash driverTarek BOCHKATI
Change-Id: I9fb6700085d817d35a691f6484193f67939a4e0f Signed-off-by: Laurent LEMELE <laurent.lemele@st.com> Signed-off-by: Tarek BOCHKATI <tarek.bouchkati@gmail.com> Reviewed-on: http://openocd.zylin.com/4933 Tested-by: jenkins Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2020-01-16flash/nor: add support of STM32L41/L42xxTarek BOCHKATI
tested using STM32L412KB Change-Id: I1e2ae93d8c740db219f0fb579940de7f2fffac15 Signed-off-by: Tarek BOCHKATI <tarek.bouchkati@gmail.com> Reviewed-on: http://openocd.zylin.com/4934 Tested-by: jenkins Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2020-01-16flash/nor/stm32l4x : add structure containers to hold devices' informationTarek BOCHKATI
This rework is inspired from the 'flash/nor/stm32h7x.c' This rework will ease the support of new devices on top of this driver: for example: STM32WB have different flash base and size addresses Notes: - stm32l4_probe modified in order to charge the correct part_info from the defined stm32l4_parts according to the device id - stm32l4_flash_bank.bank2_start is replaced by .part_info->bank1_sectors - STM32_FLASH_BASE is removed , part_info->flash_regs_base will be used instead based on that flash register addresses are changed to offsets, >> stm32l4_get_flash_reg was modified accordingly - stm32l4_read_option and stm32l4_write_option was modified to accept an offset instead of an absolute address, luckily this is the commands' argument by default - stm32l4_mass_erase modifications : - use MER2 only on top of dual bank devices - wait for BUSY bit before starting the mass erase Change-Id: Ib35bfc3cbadc76bbeaaaba9005b82077b9e1e744 Signed-off-by: Tarek BOCHKATI <tarek.bouchkati@gmail.com> Reviewed-on: http://openocd.zylin.com/4932 Tested-by: jenkins Reviewed-by: Tomas Vanek <vanekt@fbl.cz> Reviewed-by: Andreas Bolsch <hyphen0break@gmail.com>
2020-01-05flash/nor: Factor out CFI memory read/write functionsMarek Vasut
Create separate memory read/write functions which facilitate access to the CFI NOR, so that they can be replaced by controller-specific functions if necessary. This would become necessary when implementing support for e.g. HyperFlash controllers, which do not directly map the HyperFlash into the address space. Change-Id: I1bba1edfd397cb37bfedb43efe2dd03feb26a375 Signed-off-by: Marek Vasut <marek.vasut@gmail.com> Reviewed-on: http://openocd.zylin.com/5145 Tested-by: jenkins Reviewed-by: Paul Fertser <fercerpav@gmail.com>
2020-01-05flash/nor: Factor out cfi_spansion_unlock_seq()Marek Vasut
Factor out the spansion unlock sequence to deduplicate the code. Change-Id: Id78522e9a2f0e701870ef816772289d08257476a Signed-off-by: Marek Vasut <marek.vasut@gmail.com> Reviewed-on: http://openocd.zylin.com/5144 Tested-by: jenkins Reviewed-by: Paul Fertser <fercerpav@gmail.com>
2020-01-03flash/nor/stm32f2x: Support value line chips with trimmed flashKeir Fraser
The current code assumes an STM32's flash bank is laid-out in either of two configurations: - 4 x 16kB + 1 x 64kB + n x 128kB - 4 x 32kB + 1 x 128kB + n x 256kB This is quite ad-hoc but works fine in practice, as long as there are at least 5 sectors (if n=0). Unfortunately, some newer STM32s are shipping with only 64 kB of flash (4 x 16kB sectors). This patch still assumes the same sector layout, but only keeps adding sectors to the bank if the bank's capacity has not been reached. This prevents openocd from crashing on some newer STM32s. Change-Id: If00e5d7a328d11b399babc0bb2111e3ad8a3217e Signed-off-by: Romain Goyet <romain.goyet@numworks.com> Signed-off-by: Keir Fraser <keir.xen@gmail.com> Reviewed-on: http://openocd.zylin.com/4926 Tested-by: jenkins Reviewed-by: Andreas Bolsch <hyphen0break@gmail.com> Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2020-01-02flash/nor/stm32f1x: fix options reading from locked chipOleksandr Redchuk
In commit cea40152f82f52bfc718c7bda9fa4a9d70bf9cfd option bytes reading was changed to direct access to option bytes area. While there are no problems with stm32f0xx and stm32f3xx chips, option block (0x1ffff800..0x1ffff80F) is unreadable from locked stm32f10x chips. As a result, stm32f1x unlock command writes dirty values to user options, user data and write protection bits. Option bytes reading reverted from direct access to option bytes area to reading currently loaded bytes from FLASH_OBR/FLASH_WRPR registers. Tested on stm32f100, stm32f103, stm32f107 as well as on stm32f030 and stm32f303. Change-Id: Iad476351ffdaca5ace12e02272dacea7f3d08f52 Signed-off-by: Oleksandr Redchuk <real@real.kiev.ua> Reviewed-on: http://openocd.zylin.com/4940 Tested-by: jenkins Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2020-01-02flash/nor/kinetis: fix clang static analyzer warningsTomas Vanek
Use assert to remove "Dereference of null pointer" warnings. Change-Id: Ie204c234a71758e6470351e1d9f22da3dd887f56 Signed-off-by: Tomas Vanek <vanekt@fbl.cz> Reviewed-on: http://openocd.zylin.com/5357 Tested-by: jenkins Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
2020-01-02flash/nor/stm32h7: (minor) use proper variable names and enhance loggingTarek BOCHKATI
-fsize_base should be fsize_addr as it is the address of FLASH_SIZE register -flash_base should be flash_regs_base to avoid confusion with flash block start -add LOG_ERROR to functions stm32x_[read|write]_flash_reg(...) Change-Id: I86f035314bcd616fc0bdf445692d945a85c15481 Signed-off-by: Tarek BOCHKATI <tarek.bouchkati@gmail.com> Reviewed-on: http://openocd.zylin.com/5362 Tested-by: jenkins Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2019-12-17flash/nor/stm32f2x: fix clang static analyzer warningTomas Vanek
Using a signed variable as a parameter of FLASH_SNB() macro generated "warning: The result of the left shift is undefined because the left operand is negative" Change-Id: I8b3fe840f9308962460906097df6ddd848c07b25 Signed-off-by: Tomas Vanek <vanekt@fbl.cz> Reviewed-on: http://openocd.zylin.com/5356 Tested-by: jenkins Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
2019-12-12flash/nor/nrf5: remove check for protected sectorTomas Vanek
The new "Access control list" flash protection scheme used in nRF52840 is not yet supported. Do not prevent sector erase if protection state is unknown. Change-Id: Iae9a869a54ffbdc888fb3ec478dafb5c942d9ea0 Signed-off-by: Tomas Vanek <vanekt@fbl.cz> Reviewed-on: http://openocd.zylin.com/5348 Tested-by: jenkins
2019-12-07target/stm32h7x: add support of dual core variant of STM32H7Tarek BOCHKATI
STM32H7x7 and STM32H7x5 devices contains two cores : CM7 + CM4 The second core creation is only done when * DUAL_CORE variable is set to true * non HLA interface is used A second check for the second core existence is done in cpu1 examine-end Once the second core is detected it gets examined. Furthermore, the script provides a configurable CTI usage in order to halt the cores simultaneously. Tested on Rev X and V devices. PS: the indentation was a mix of spaces and tabs, all changed to tabs. Change-Id: Iad9c30826965ddb9be5dee628bc2e63f953bbcb8 Signed-off-by: Tarek BOCHKATI <tarek.bouchkati@gmail.com> Reviewed-on: http://openocd.zylin.com/5130 Tested-by: jenkins Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2019-11-27flash/nor/stm32h7x: remove options cache and some driver enhancementsTarek BOCHKATI
functions managing option bytes cache (stm32x_read/write_options) have bee removed, and a new functions to modify a single option byte have been introduced (stm32x_write/modify_option). by the way, some helpers have been introduced to access flash registers: - stm32x_read_flash_reg(bank, offset, *value): int - stm32x_write_flash_reg(bank, offset, value): int and a new commands to read and write a single flash option register: - stm32h7x option_read <bank> <option_reg offset> - stm32h7x option_write <bank> <option_reg offset> <value> [mask] also lock and unlock handlers' have been reduced by using the same routine (stm32x_set_rdp) and have been optimized to not write options unless there is a change in RDP level. finally, several functions have been fixed to lock flash / options in case of failure. Change-Id: I75057949ab9f5b4e0f602bafb76f9f80d53a522b Signed-off-by: Tarek BOCHKATI <tarek.bouchkati@gmail.com> Reviewed-on: http://openocd.zylin.com/5293 Tested-by: jenkins Reviewed-by: Christopher Head <chead@zaber.com> Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
generated by cgit v1.2.3-18-g5258 (git 2.32.0) at 2025-04-21 18:46:43 +0000