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path: root/lib/Target/X86/X86Subtarget.cpp
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2010-05-27FastISel doesn't yet handle callee-pop functions.Dan Gohman
To support this, move IsCalleePop from X86ISelLowering to X86Subtarget. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104866 91177308-0d34-0410-b5e6-96231b3b80d8
2010-04-28Enable i16 to i32 promotion by default.Evan Cheng
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@102493 91177308-0d34-0410-b5e6-96231b3b80d8
2010-04-21isel (i32 anyext i16) as insert_subreg when 16-bit ops are being promoted.Evan Cheng
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@101979 91177308-0d34-0410-b5e6-96231b3b80d8
2010-04-02Separate out the AES-NI instructions from the SSE4.2 instructions. AddEric Christopher
a new subtarget option for AES and check for the support. Add "westmere" line of processors and add AES-NI support to the core i7. Add a couple of TODOs for information I couldn't verify. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@100231 91177308-0d34-0410-b5e6-96231b3b80d8
2010-04-01Nehalem unaligned memory access is fast.Evan Cheng
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@100089 91177308-0d34-0410-b5e6-96231b3b80d8
2010-03-18Turning off post-ra scheduling for x86. It isn't a consistent win.Evan Cheng
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@98810 91177308-0d34-0410-b5e6-96231b3b80d8
2010-03-14no really, all 64-bit cpu's have cmov support. This shouldChris Lattner
fix the rest of the buildbot failures on non-x86 hosts. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@98522 91177308-0d34-0410-b5e6-96231b3b80d8
2010-01-27Kill ModuleProvider and ghost linkage by inverting the relationship betweenJeffrey Yasskin
Modules and ModuleProviders. Because the "ModuleProvider" simply materializes GlobalValues now, and doesn't provide modules, it's renamed to "GVMaterializer". Code that used to need a ModuleProvider to materialize Functions can now materialize the Functions directly. Functions no longer use a magic linkage to record that they're materializable; they simply ask the GVMaterializer. Because the C ABI must never change, we can't remove LLVMModuleProviderRef or the functions that refer to it. Instead, because Module now exposes the same functionality ModuleProvider used to, we store a Module* in any LLVMModuleProviderRef and translate in the wrapper methods. The bindings to other languages still use the ModuleProvider concept. It would probably be worth some time to update them to follow the C++ more closely, but I don't intend to do it. Fixes http://llvm.org/PR5737 and http://llvm.org/PR5735. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@94686 91177308-0d34-0410-b5e6-96231b3b80d8
2010-01-11Implement a feature (-vector-unaligned-mem) to allow targets toDavid Greene
ignore alignment requirements for SIMD memory operands. This is useful on architectures like the AMD 10h that do not trap on unaligned references if a status bit is twiddled at startup time. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@93151 91177308-0d34-0410-b5e6-96231b3b80d8
2010-01-05Change errs() to dbgs().David Greene
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@92648 91177308-0d34-0410-b5e6-96231b3b80d8
2009-12-22Remove target attribute break-sse-dep. Instead, do not fold load into sse ↵Evan Cheng
partial update instructions unless optimizing for size. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@91910 91177308-0d34-0410-b5e6-96231b3b80d8
2009-12-18On recent Intel u-arch's, folding loads into some unary SSE instructions canEvan Cheng
be non-optimal. To be precise, we should avoid folding loads if the instructions only update part of the destination register, and the non-updated part is not needed. e.g. cvtss2sd, sqrtss. Unfolding the load from these instructions breaks the partial register dependency and it can improve performance. e.g. movss (%rdi), %xmm0 cvtss2sd %xmm0, %xmm0 instead of cvtss2sd (%rdi), %xmm0 An alternative method to break dependency is to clear the register first. e.g. xorps %xmm0, %xmm0 cvtss2sd (%rdi), %xmm0 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@91672 91177308-0d34-0410-b5e6-96231b3b80d8
2009-12-07Don't enable the post-RA scheduler on x86 except at -O3. In itsDan Gohman
current form, it is too expensive in compile time. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@90781 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-20Target-independent support for TargetFlags on BlockAddress operands,Dan Gohman
and support for blockaddresses in x86-32 PIC mode. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@89506 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-14Add llvm::sys::getHostCPUName, for detecting the LLVM name for the host CPU.Daniel Dunbar
- This is an initial step towards -march=native support in Clang, and towards eliminating host dependencies in the targets. See PR5389. - Patch by Roman Divacky! git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@88768 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-13Allow target to specify regclass for which antideps will only be broken ↵David Goodwin
along the critical path. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@88682 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-10Fixed to address code review. No functional changes.David Goodwin
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@86634 91177308-0d34-0410-b5e6-96231b3b80d8
2009-10-15Remove X86Subtarget::IsLinux. It's no longer being used.Evan Cheng
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@84200 91177308-0d34-0410-b5e6-96231b3b80d8
2009-09-03Reference to hidden symbols do not have to go through non-lazy pointer in ↵Evan Cheng
non-pic mode. rdar://7187172. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@80904 91177308-0d34-0410-b5e6-96231b3b80d8
2009-09-03Make these functions static and local.Daniel Dunbar
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@80892 91177308-0d34-0410-b5e6-96231b3b80d8
2009-09-03X86JITInfo::getLazyResolverFunction() should not read cpu id to determine ↵Evan Cheng
whether sse is available. Just use consult subtarget. No functionality changes. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@80880 91177308-0d34-0410-b5e6-96231b3b80d8
2009-09-02Add support for modeling whether or not the processor has support forChris Lattner
conditional moves as a subtarget feature. This is the easy part of PR4841. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@80763 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-28Short-term workaround for frame-related weirdness on win64.Anton Korobeynikov
Some other minor win64 fixes as well. Patch by Michael Beck! git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@80370 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-11change the -x86-asm-syntax=intel/att flag to be in X86TAI Chris Lattner
instead of X86 Subtarget. This elimianates dependencies on X86Subtarget from X86TAI. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78746 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-05Remove some dead code.Daniel Dunbar
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78219 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-03- s/DOUT/DEBUG(errs()/gBill Wendling
- Tidy up some headers. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@77929 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-02Normalize Subtarget constructors to take a target triple string instead ofDaniel Dunbar
Module*. Also, dropped uses of TargetMachine where unnecessary. The only target which still takes a TargetMachine& is Mips, I would appreciate it if someone would normalize this to match other targets. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@77918 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-19Fix some minor MSVC compiler warnings.Daniel Dunbar
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76356 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-16GV with ghost linkage (module being lazily streamed in in JIT lazy ↵Evan Cheng
compilation mode) do not require extra load from stub. This fixes ExecutionEngine/2005-12-02-TailCallBug.ll. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76121 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-10fix indentationChris Lattner
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75277 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-10remove the now-dead TM argument to these methods.Chris Lattner
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75276 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-10make PIC vs DynamicNoPIC be explicit in PICStyles.Chris Lattner
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75275 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-10some minor simplifications.Chris Lattner
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75274 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-10add a couple of predicates to test for "stub style pic in PIC mode" and ↵Chris Lattner
"stub style pic in dynamic-no-pic" mode. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75273 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-10simplify fast isel by using ClassifyGlobalReference. ThisChris Lattner
elimiantes the last use of GVRequiresExtraLoad, so delete it. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75244 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-10eliminate GVRequiresRegister, replacing it with predicates we Chris Lattner
need for other purposes. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75243 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-10move some classification logic around. Now GVRequiresExtraLoadChris Lattner
is just a trivial wrapper around "ClassifyGlobalReference", which stole a ton of logic from LowerGlobalAddress. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75237 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-10GVRequiresExtraLoad is now never used for calls, simplify it based on this.Chris Lattner
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75232 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-10actually, just eliminate PCRelGVRequiresExtraLoad. It makes the codeChris Lattner
more complex and slow than just directly testing what we care about. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75231 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-10There is only one case where GVRequiresExtraLoad returns true for calls:Chris Lattner
split its handling out to PCRelGVRequiresExtraLoad, and simplify code based on this. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75230 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-10the "isDirectCall" operand of GVRequiresRegister is always false, eliminate it.Chris Lattner
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75229 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-09simplify some code based on the fact that picstyles != none are only valid Chris Lattner
in pic or dynamic-no-pic mode. Also, x86-64 never used picstylegot. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75101 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-09Reduce indentation in GVRequiresExtraLoad. Return true for windowsChris Lattner
with DLLImport symbols even when in -static mode. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75093 91177308-0d34-0410-b5e6-96231b3b80d8
2009-06-26Add feature flags for AVX and FMA and fix some SSE4A feature flagDavid Greene
initialization problems. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74350 91177308-0d34-0410-b5e6-96231b3b80d8
2009-06-08The attached patches implement most of the ARM AAPCS-VFP hard floatAnton Korobeynikov
ABI. The missing piece is support for putting "homogeneous aggregates" into registers. Patch by Sandeep Patel! git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@73095 91177308-0d34-0410-b5e6-96231b3b80d8
2009-05-26Update CPU capabilities for AMD machinesStefanus Du Toit
- added processors k8-sse3, opteron-sse3, athlon64-sse3, amdfam10, and barcelona with appropriate sse3/4a levels - added FeatureSSE4A for amdfam10 processors in X86Subtarget: - added hasSSE4A - updated AutoDetectSubtargetFeatures to detect SSE4A - updated GetCurrentX86CPU to detect family 15 with sse3 as k8-sse3 and family 10h as amdfam10 New processor names match those used by gcc. Patch by Paul Redmond! git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@72434 91177308-0d34-0410-b5e6-96231b3b80d8
2009-05-20Try again. Allow call to immediate address for ELF or when in static ↵Evan Cheng
relocation mode. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@72160 91177308-0d34-0410-b5e6-96231b3b80d8
2009-04-25add support for detecting process features on win64, patch byChris Lattner
Nicolas Capens! git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@70057 91177308-0d34-0410-b5e6-96231b3b80d8
2009-03-07Introduce new linkage types linkonce_odr, weak_odr, common_odrDuncan Sands
and extern_weak_odr. These are the same as the non-odr versions, except that they indicate that the global will only be overridden by an *equivalent* global. In C, a function with weak linkage can be overridden by a function which behaves completely differently. This means that IP passes have to skip weak functions, since any deductions made from the function definition might be wrong, since the definition could be replaced by something completely different at link time. This is not allowed in C++, thanks to the ODR (One-Definition-Rule): if a function is replaced by another at link-time, then the new function must be the same as the original function. If a language knows that a function or other global can only be overridden by an equivalent global, it can give it the weak_odr linkage type, and the optimizers will understand that it is alright to make deductions based on the function body. The code generators on the other hand map weak and weak_odr linkage to the same thing. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@66339 91177308-0d34-0410-b5e6-96231b3b80d8
2009-02-28Added another darwin subtargetMon P Wang
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@65662 91177308-0d34-0410-b5e6-96231b3b80d8
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