There is only one case where GVRequiresExtraLoad returns true for calls:

split its handling out to PCRelGVRequiresExtraLoad, and simplify code
based on this.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75230 91177308-0d34-0410-b5e6-96231b3b80d8

1 files changed, 15 insertions, 2 deletions

diff --git a/lib/Target/X86/X86Subtarget.cpp b/lib/Target/X86/X86Subtarget.cpp
index 7d1f972b4e..6eb0235e15 100644
--- a/lib/Target/X86/X86Subtarget.cpp
+++ b/lib/Target/X86/X86Subtarget.cpp
@@ -38,8 +38,8 @@ AsmWriterFlavor("x86-asm-syntax", cl::init(X86Subtarget::Unset),
 /// symbols are indirect, loading the value at address GV rather then the
 /// value of GV itself. This means that the GlobalAddress must be in the base
 /// or index register of the address, not the GV offset field.
-bool X86Subtarget::GVRequiresExtraLoad(const GlobalValue* GV,
-                                       const TargetMachine& TM,
+bool X86Subtarget::GVRequiresExtraLoad(const GlobalValue *GV,
+                                       const TargetMachine &TM,
                                        bool isDirectCall) const {
   // Windows targets only require an extra load for DLLImport linkage values,
   // and they need these regardless of whether we're in PIC mode or not.
@@ -72,6 +72,19 @@ bool X86Subtarget::GVRequiresExtraLoad(const GlobalValue* GV,
   return false;
 }
 
+/// PCRelGVRequiresExtraLoad - True if accessing the GV from a PC-relative
+/// operand like a call target requires an extra load.
+bool X86Subtarget::PCRelGVRequiresExtraLoad(const GlobalValue *GV,
+                                            const TargetMachine &TM) const {
+  // Windows targets only require an extra load for DLLImport linkage values,
+  // and they need these regardless of whether we're in PIC mode or not.
+  if (isTargetCygMing() || isTargetWindows())
+    return GV->hasDLLImportLinkage();
+
+  return false;
+}
+
+
 /// True if accessing the GV requires a register.  This is a superset of the
 /// cases where GVRequiresExtraLoad is true.  Some variations of PIC require
 /// a register, but not an extra load.