Try again. Allow call to immediate address for ELF or when in static relocation mode.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@72160 91177308-0d34-0410-b5e6-96231b3b80d8

1 files changed, 10 insertions, 2 deletions

diff --git a/lib/Target/X86/X86Subtarget.cpp b/lib/Target/X86/X86Subtarget.cpp
index df1f7db85f..d54ccb37e3 100644
--- a/lib/Target/X86/X86Subtarget.cpp
+++ b/lib/Target/X86/X86Subtarget.cpp
@@ -74,8 +74,8 @@ bool X86Subtarget::GVRequiresExtraLoad(const GlobalValue* GV,
 /// cases where GVRequiresExtraLoad is true.  Some variations of PIC require
 /// a register, but not an extra load.
 bool X86Subtarget::GVRequiresRegister(const GlobalValue *GV,
-                                       const TargetMachine& TM,
-                                       bool isDirectCall) const
+                                      const TargetMachine& TM,
+                                      bool isDirectCall) const
 {
   if (GVRequiresExtraLoad(GV, TM, isDirectCall))
     return true;
@@ -99,6 +99,14 @@ const char *X86Subtarget::getBZeroEntry() const {
   return 0;
 }
 
+/// IsLegalToCallImmediateAddr - Return true if the subtarget allows calls
+/// to immediate address.
+bool X86Subtarget::IsLegalToCallImmediateAddr(const TargetMachine &TM) const {
+  if (Is64Bit)
+    return false;
+  return isTargetELF() || TM.getRelocationModel() == Reloc::Static;
+}
+
 /// getSpecialAddressLatency - For targets where it is beneficial to
 /// backschedule instructions that compute addresses, return a value
 /// indicating the number of scheduling cycles of backscheduling that