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AgeCommit message (Expand)Author
2010-06-17Thumb1 and any pre-v6 ARM target should use the libcall expansion ofJim Grosbach
2010-06-17simplify code a bit and add a more explanatory assert for cases thatJim Grosbach
2010-06-16format and 80-column cleanupJim Grosbach
2010-06-16Don't attempt preserving conservative kill flags. We were doing it wrong.Jakob Stoklund Olesen
2010-06-16Remove the hidden "neon-reg-sequence" option. The reg sequences are workingBob Wilson
2010-06-16Make post-ra scheduling, anti-dep breaking, and register scavenger (conservat...Evan Cheng
2010-06-15Add file missing from previous commit.Dale Johannesen
2010-06-15Next round of tail call changes. Register used in a tailDale Johannesen
2010-06-15Add basic support for NEON modified immediates besides VMOV.Bob Wilson
2010-06-15Add <cstddef> include to get ptrdiff_t, for gcc-4.6; patch by Dimitry Andric.Daniel Dunbar
2010-06-15VMOVQQ and VMOVQQQQ are pseudo instructions and not predicable.Bob Wilson
2010-06-15Make sure to skip dbg_value instructions when finding an insertion point forJim Grosbach
2010-06-14Rename functions referring to VMOV immediates to refer to NEON "modifiedBob Wilson
2010-06-11Add a missing bitcast. This code used to only handle conversions betweenBob Wilson
2010-06-11Add instruction encoding for the Neon VMOV immediate instruction. This changesBob Wilson
2010-06-10Delete code that's not safe.Evan Cheng
2010-06-09be slightly more subtle about skipping dbg_value instructions; otherwise, if aJim Grosbach
2010-06-09Allow target to place 2-address pass inserted copies in better spots. Thumb2 ...Evan Cheng
2010-06-09Typo.Evan Cheng
2010-06-09Thumb2 IT blocks are fairly expensive. When there are multiple selects usingEvan Cheng
2010-06-08fix copy/paste/modify think-oJim Grosbach
2010-06-08Reapply r105521, this time appending "LLU" to 64 bitBruno Cardoso Lopes
2010-06-08fix typoJim Grosbach
2010-06-08Fix up a comment.Bob Wilson
2010-06-07Further changes for Neon vector shuffles:Bob Wilson
2010-06-07Handle dbg_value instructions (i.e., skip them) when generating IT blocks.Jim Grosbach
2010-06-05revert r105521, which is breaking the buildbots with stuff like this:Chris Lattner
2010-06-05Initial AVX support for some instructions. No patterns matchedBruno Cardoso Lopes
2010-06-05Improvements to tail call code. No functional effectDale Johannesen
2010-06-04More thoroughly disable tails calls by default.Dale Johannesen
2010-06-04Another fix to prevent debug info from affecting codegen. rdar://7797940Jim Grosbach
2010-06-04more dbg_value adjustments so debug info doesn't affect codegenJim Grosbach
2010-06-04fix typoJim Grosbach
2010-06-04For NEON vectors with 32- or 64-bit elements, select BUILD_VECTORs andBob Wilson
2010-06-03Teach the ARM load-store optimizer to deal with dbg_value instructions.Jim Grosbach
2010-06-03Early implementation of tail call for ARM.Dale Johannesen
2010-06-02Slightly change the meaning of the reMaterialize target hook when the originalJakob Stoklund Olesen
2010-06-02Clean up 80 column violations. No functional change.Jim Grosbach
2010-06-02Remove the TargetRegisterClass member from CalleeSavedInfoRafael Espindola
2010-06-02Rename canCombinedSubRegIndex method to something more grammatically correctBob Wilson
2010-06-02Replace ARM's getCalleeSavedRegClasses with a simpler solutionRafael Espindola
2010-05-29Some A9 load/store cleanupsAnton Korobeynikov
2010-05-29Some rough approximations for load/stores on A9Anton Korobeynikov
2010-05-29NEON/VFP stuff can be issued only via Pipe1 on A9Anton Korobeynikov
2010-05-29Add some integer instruction itineraries for A9Anton Korobeynikov
2010-05-28Schedule high latency instructions for latency reduction even if they are not...Evan Cheng
2010-05-28correct retattrJim Grosbach
2010-05-28Cosmetic cleanup. No functional change.Jim Grosbach
2010-05-28make sure accesses to set up the jmpbuf don't get moved after it by the sched...Jim Grosbach
2010-05-28Add the cc_out operand for t2RSBrs instructions. I missed this when I changedBob Wilson
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