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AgeCommit message (Expand)Author
2010-06-26It's now possible to run code placement pass for ARM.Evan Cheng
2010-06-26Renumber NEON instruction formats to be consecutive.Bob Wilson
2010-06-25Rename ARM instruction formats NEONGetLnFrm, NEONSetLnFrm and NEONDupFrm toBob Wilson
2010-06-25Remove unused NEONFrm and ThumbMiscFrm ARM instruction formats.Bob Wilson
2010-06-25Thumb2ITBlockPass: Fix a possible dereference of an invalid iterator. This wasDaniel Dunbar
2010-06-25Change if-conversion block size limit checks to add some flexibility.Evan Cheng
2010-06-25Add support for encoding 3-register NEON instructions, and fixBob Wilson
2010-06-25The hasMemory argument is irrelevant to how the argumentDale Johannesen
2010-06-25Add support for encoding 2-register NEON instructions.Bob Wilson
2010-06-25Fix indentation.Bob Wilson
2010-06-25IT instructions are considered to be scheduling hazards, but are scheduledJim Grosbach
2010-06-25Add missing ARM and Thumb data layout info for vector types.Bob Wilson
2010-06-25Reduce indentation.Bob Wilson
2010-06-24Oops. IT block formation pass needs to be run at any optimization level.Evan Cheng
2010-06-24Always allow Thumb-2 SXTB, SXTH, UXTB, and UXTH. Fixes PR7324.Eli Friedman
2010-06-24PR7458: Try commuting Thumb2 instruction operands to put them into 2-addressBob Wilson
2010-06-23We are missing opportunites to use ldm. Take code like this:Bill Wendling
2010-06-23Do not do tail calls to external symbols. If theDale Johannesen
2010-06-23When using libcall expansions for the atomic intrinsics, the explicitJim Grosbach
2010-06-22Thumb1 functions using @llvm.returnaddress were not saving the incoming LR.Bob Wilson
2010-06-22Use pre-increment instead of post-increment when the result is not used.Dan Gohman
2010-06-22Tail merging pass shall not break up IT blocks. rdar://8115404Evan Cheng
2010-06-21sign_extend_inreg needs to be expanded for pre-v6 Thumb as well as ARM.Bob Wilson
2010-06-21LEApcrelJT shouldn't be marked as neverHasSideEffects, as we don't want itJim Grosbach
2010-06-21Fix PR7421: bug in kill transferring logic. It was ignoring loads / stores wh...Evan Cheng
2010-06-21Fix PR 7433. Silly typo in non-Darwin ARM tail callDale Johannesen
2010-06-21early exit for dbg_value instructionsJim Grosbach
2010-06-20Fix a crash caused by dereference of MBB.end(). rdar://8110842Evan Cheng
2010-06-19Remove a fixme comment that is no longer relevant.Bob Wilson
2010-06-19Fix error message to match function name.Bob Wilson
2010-06-19Ignore dbg_value's.Evan Cheng
2010-06-19Disable sibcall optimization for Thumb1 for now since Thumb1RegisterInfo::emi...Evan Cheng
2010-06-19Indentation and remove dead code.Evan Cheng
2010-06-19Silence compiler warnings.Dan Gohman
2010-06-18Move ARM if-conversion before post-ra scheduling.Evan Cheng
2010-06-18Update cmake list.Evan Cheng
2010-06-18Thumb2 hazard recognizer.Evan Cheng
2010-06-18Allow ARM if-converter to be run after post allocation scheduling.Evan Cheng
2010-06-18back-end libcall handling for ATOMIC_SWAP (__sync_lock_test_and_set)Jim Grosbach
2010-06-18Enable Expand handling of atomics for subtargets that can't do them inline.Jim Grosbach
2010-06-18Rewrite chained if's as switches and replace assertions with llvm_unreachableBob Wilson
2010-06-18Fix ARM/Thumb reversal in previous attempt.Dale Johannesen
2010-06-18When using ADDri to get the address of a stack object, 255 is a conservativeJakob Stoklund Olesen
2010-06-18An attempt to fix the problem Anton reported withDale Johannesen
2010-06-18Enable tail calls on ARM by default, with someDale Johannesen
2010-06-18Start TargetRegisterClass indices at 0 instead of 1, so thatDan Gohman
2010-06-18Last round of changes for ARM tail calls.Dale Johannesen
2010-06-18Treat the ARM inline asm {cc} constraint as a physreg (%CPSR), just like X86Jakob Stoklund Olesen
2010-06-18Eliminate unnecessary uses of getZExtValue().Dan Gohman
2010-06-17Add a DebugLoc parameter to TargetInstrInfo::InsertBranch(). ThisStuart Hastings