aboutsummaryrefslogtreecommitdiff
path: root/lib/Target/ARM
AgeCommit message (Expand)Author
2010-05-27Update the saved stack pointer in the sjlj function context following eitherJim Grosbach
2010-05-27Use report_fatal_error, not llvm_unreachable.Evan Cheng
2010-05-27back out 104862/104869. Can reuse stacksave after all. Very cool.Jim Grosbach
2010-05-27llvm can't correctly support 'H', 'Q' and 'R' modifiers. Just mark it an error.Evan Cheng
2010-05-27Fix some bad fall-throughs in a switch statement. Both the 'Q' and 'R' casesBob Wilson
2010-05-27add ISD::STACKADDR to get the current stack pointer. Will be used by sjlj EHJim Grosbach
2010-05-26Give SubRegIndex names to all ARM subregisters. This will be required byJakob Stoklund Olesen
2010-05-26Adjust eh.sjlj.setjmp to properly have a chain and to have an opcode entry inJim Grosbach
2010-05-26Replace the SubRegSet tablegen class with a less error-prone mechanism.Jakob Stoklund Olesen
2010-05-26Coding style change (Adding 1 missing space.)Shih-wei Liao
2010-05-26Adding the missing implementation for ARM::SBFX and ARM::UBFX.Shih-wei Liao
2010-05-26fix off by 1 (insn) error in eh.sjlj.setjmp thumb code sequence.Jim Grosbach
2010-05-26Revert "Replace the SubRegSet tablegen class with a less error-prone mechanism."Jakob Stoklund Olesen
2010-05-26Replace the SubRegSet tablegen class with a less error-prone mechanism.Jakob Stoklund Olesen
2010-05-26Adding the missing implementation of Bitfield's "clear" and "insert".Shih-wei Liao
2010-05-26To handle s* registers in emitVFPLoadStoreMultipleInstruction().Shih-wei Liao
2010-05-25Remove NumberHack entirely.Jakob Stoklund Olesen
2010-05-25Add missing implementation to the materialization of VFP misc. instructions (...Zonr Chang
2010-05-25Add support to MOVimm32 using movt/movw for ARM JITZonr Chang
2010-05-25Allow t2MOVsrl_flag and t2MOVsra_flag instructions to be predicated.Bob Wilson
2010-05-25Fix up instruction classes for Thumb2 RSB instructions to be consistent withBob Wilson
2010-05-25Clean up indentation.Bob Wilson
2010-05-25Use enums instead of literals in the ARM backend.Jakob Stoklund Olesen
2010-05-24Switch SubRegSet to using symbolic SubRegIndicesJakob Stoklund Olesen
2010-05-24Allow Thumb2 MVN instructions to set condition codes. The immediate operandBob Wilson
2010-05-24Lose the dummiesJakob Stoklund Olesen
2010-05-24Replace the tablegen RegisterClass field SubRegClassList with an alist-like dataJakob Stoklund Olesen
2010-05-24Clean up some extra whitespace.Bob Wilson
2010-05-24Thumb2 RSBS instructions were being printed without the 'S' suffix.Bob Wilson
2010-05-24LR is in GPR, not tGPR even in Thumb1 mode.Evan Cheng
2010-05-24Fix a few places that depended on the numeric value of subreg indices.Jakob Stoklund Olesen
2010-05-24Switch ARMRegisterInfo.td to use SubRegIndex and eliminate the parallel enumsJakob Stoklund Olesen
2010-05-23VDUP doesn't support vectors with 64-bit elements.Bob Wilson
2010-05-22Implement @llvm.returnaddress. rdar://8015977.Evan Cheng
2010-05-22Implement eh.sjlj.longjmp for ARM. Clean up the intrinsic a bit.Jim Grosbach
2010-05-22Recognize more BUILD_VECTORs and VECTOR_SHUFFLEs that can be implemented byBob Wilson
2010-05-21Change ARM scheduling default to list-hybrid if the target supports floating ...Evan Cheng
2010-05-20Allow targets more controls on what nodes are scheduled by reg pressure, what...Evan Cheng
2010-05-20Handle Neon v2f64 and v2i64 vector shuffles as register copies.Bob Wilson
2010-05-19Code refactoring: pull SchedPreference enum from TargetLowering.h to TargetMa...Evan Cheng
2010-05-19t2LEApcrel and tLEApcrel are re-materializable. This makes it possible to hoi...Evan Cheng
2010-05-19Use 'adr' for LEApcrel and LEApcrel. Mark LEApcrel re-materializable.Evan Cheng
2010-05-19Mark pattern-less mayLoad / mayStore instructions neverHasSideEffects. These ...Evan Cheng
2010-05-19Target instruction selection should copy memoperands.Evan Cheng
2010-05-19Mark a few more pattern-less instructions with neverHasSideEffects. This is e...Evan Cheng
2010-05-18Sink dag combine's post index load / store code that swap base ptr and index ...Evan Cheng
2010-05-17ARMBaseRegisterInfo::estimateRSStackSizeLimit() could return prematurely with aJakob Stoklund Olesen
2010-05-17vmov of immediates are trivially re-materializable.Evan Cheng
2010-05-17Fix a regression in 464.h264 for thumb1 and thumb2 nightly tests.Bob Wilson
2010-05-17Turn on -neon-reg-sequence by default.Evan Cheng
generated by cgit v1.2.3-70-g09d2 (git 2.46.0) at 2026-03-07 09:07:55 +0000