| Age | Commit message (Expand) | Author |
|---|
| 2012-08-13 | Do not optimize (or (and X,Y), Z) into BFI and other sequences if the AND ISD... | Nadav Rotem |
| 2012-08-12 | Revert 161581: Patch to implement UMLAL/SMLAL instructions for the ARM | Arnold Schwaighofer |
| 2012-08-12 | Change addTypeForNeon to use MVT instead of EVT so all the calls to getSimple... | Craig Topper |
| 2012-08-09 | Patch to implement UMLAL/SMLAL instructions for the ARM architecture | Arnold Schwaighofer |
| 2012-08-03 | Fall back to selection DAG isel for calls to builtin functions. | Bob Wilson |
| 2012-08-03 | Add support for the ARM GHC calling convention, this patch was in 3.0, | Eric Christopher |
| 2012-07-25 | ARM: Don't assume an SDNode is a constant. | Jim Grosbach |
| 2012-07-18 | Fix ARMTargetLowering::isLegalAddImmediate to consider thumb encodings. | Andrew Trick |
| 2012-07-18 | whitespace | Andrew Trick |
| 2012-06-18 | ARM: use NOEN loads and stores if possible when handling struct byval. | Manman Ren |
| 2012-06-15 | ARM: optimization for sub+abs. | Manman Ren |
| 2012-06-11 | Re-enable the CMN instruction. | Bill Wendling |
| 2012-06-01 | ARM: properly handle alignment for struct byval. | Manman Ren |
| 2012-06-01 | ARM: support struct byval in llvm | Manman Ren |
| 2012-05-25 | Change interface for TargetLowering::LowerCallTo and TargetLowering::LowerCall | Justin Holewinski |
| 2012-05-20 | Use the right register class for LDRrs. | Jakob Stoklund Olesen |
| 2012-05-05 | Add a new target hook "predictableSelectIsExpensive". | Benjamin Kramer |
| 2012-05-04 | Pacify GCC's -Wreturn-type | Matt Beaumont-Gay |
| 2012-05-04 | Make ARM and Mips use TargetMachine::getTLSModel() | Hans Wennborg |
| 2012-04-30 | Don't introduce illegal types when creating vmull operations. <rdar://11324364> | Bob Wilson |
| 2012-04-20 | Convert more uses of XXXRegisterClass to &XXXRegClass. No functional change s... | Craig Topper |
| 2012-04-10 | Handle llvm.fma.* intrinsics. rdar://10914096 | Evan Cheng |
| 2012-04-10 | Fix a long standing tail call optimization bug. When a libcall is emitted | Evan Cheng |
| 2012-04-09 | When performing a truncating store, it's possible to rearrange the data | Chad Rosier |
| 2012-04-09 | Update comments and remove unnecessary isVolatile() check. | Chad Rosier |
| 2012-04-06 | Tidy up. 80 columns. | Jim Grosbach |
| 2012-04-06 | There is no portable std::abs overload for int64_t, use the llvm::abs64 | Chandler Carruth |
| 2012-04-06 | Allow negative immediates in ARM and Thumb2 compares. | Jakob Stoklund Olesen |
| 2012-04-04 | Always compute all the bits in ComputeMaskedBits. | Rafael Espindola |
| 2012-03-30 | ARM target should allow codegenprep to duplicate ret instructions to enable t... | Evan Cheng |
| 2012-03-29 | Try using vmov.i32 to materialize FP32 constants that can't be materialized by | Lang Hames |
| 2012-03-27 | Remove unnecessary llvm:: qualifications | Craig Topper |
| 2012-03-26 | Prune includes and replace uses of ARMRegisterInfo.h with ARMBaeRegisterInfo.h | Craig Topper |
| 2012-03-25 | Replace uses of ARMBaseInstrInfo and ARMTargetMachine with the Base versions. | Craig Topper |
| 2012-03-19 | Perform mul combine when multiplying wiht negative constants. | Anton Korobeynikov |
| 2012-03-17 | Reorder includes to match coding standards. Fix an issue or two exposed by that. | Craig Topper |
| 2012-03-15 | Use vmov.f32 to materialize f32 consts on ARM. This relaxes constraints on | Lang Hames |
| 2012-03-11 | Convert more static tables of registers used by calling convention to uint16_... | Craig Topper |
| 2012-03-04 | Use uint16_t to store registers in callee saved register tables to reduce siz... | Craig Topper |
| 2012-03-01 | Neuter the optimization I implemented with r107852 and r108258 which turn some | Evan Cheng |
| 2012-02-28 | Re-commit r151623 with fix. Only issue special no-return calls if it's a dire... | Evan Cheng |
| 2012-02-28 | Revert r151623 "Some ARM implementaions, e.g. A-series, does return stack pre... | Daniel Dunbar |
| 2012-02-28 | Some ARM implementaions, e.g. A-series, does return stack prediction. That is, | Evan Cheng |
| 2012-02-24 | Switch ARM target to register masks. | Jakob Stoklund Olesen |
| 2012-02-24 | When emitting a cmp with 0 for a lowered select, mask out the high | Dan Gohman |
| 2012-02-23 | Canonicalize (srl (bswap x), 16) to (rotr (bswap x), 16) if the high 16 bits | Evan Cheng |
| 2012-02-23 | Optimize a couple of common patterns involving conditional moves where the false | Evan Cheng |
| 2012-02-22 | Make all pointers to TargetRegisterClass const since they are all pointers to... | Craig Topper |
| 2012-02-21 | Proper support for a bastardized darwin-eabi hybird ABI. | Evan Cheng |
| 2012-02-20 | Improve generated code for extending loads and some trunc stores on ARM. | James Molloy |
