diff options
Diffstat (limited to 'arch/blackfin/kernel')
54 files changed, 10552 insertions, 6384 deletions
diff --git a/arch/blackfin/kernel/.gitignore b/arch/blackfin/kernel/.gitignore new file mode 100644 index 00000000000..c5f676c3c22 --- /dev/null +++ b/arch/blackfin/kernel/.gitignore @@ -0,0 +1 @@ +vmlinux.lds diff --git a/arch/blackfin/kernel/Makefile b/arch/blackfin/kernel/Makefile index 318b9b692a4..703dc7cf2ec 100644 --- a/arch/blackfin/kernel/Makefile +++ b/arch/blackfin/kernel/Makefile @@ -2,16 +2,42 @@ # arch/blackfin/kernel/Makefile # -extra-y := init_task.o vmlinux.lds +extra-y := vmlinux.lds obj-y := \ entry.o process.o bfin_ksyms.o ptrace.o setup.o signal.o \ - sys_bfin.o time.o traps.o irqchip.o dma-mapping.o flat.o \ - fixed_code.o reboot.o bfin_gpio.o + sys_bfin.o traps.o irqchip.o dma-mapping.o flat.o \ + fixed_code.o reboot.o bfin_dma.o \ + exception.o dumpstack.o +ifeq ($(CONFIG_GENERIC_CLOCKEVENTS),y) + obj-y += time-ts.o +else + obj-y += time.o +endif + +obj-$(CONFIG_GPIO_ADI) += bfin_gpio.o +obj-$(CONFIG_DYNAMIC_FTRACE) += ftrace.o +obj-$(CONFIG_FUNCTION_TRACER) += ftrace-entry.o +obj-$(CONFIG_FUNCTION_GRAPH_TRACER) += ftrace.o +CFLAGS_REMOVE_ftrace.o = -pg + +obj-$(CONFIG_IPIPE) += ipipe.o obj-$(CONFIG_BFIN_GPTIMERS) += gptimers.o +obj-$(CONFIG_CPLB_INFO) += cplbinfo.o obj-$(CONFIG_MODULES) += module.o -obj-$(CONFIG_BFIN_DMA_5XX) += bfin_dma_5xx.o -obj-$(CONFIG_DUAL_CORE_TEST_MODULE) += dualcore_test.o obj-$(CONFIG_KGDB) += kgdb.o +obj-$(CONFIG_KGDB_TESTS) += kgdb_test.o +obj-$(CONFIG_NMI_WATCHDOG) += nmi.o obj-$(CONFIG_EARLY_PRINTK) += early_printk.o +obj-$(CONFIG_EARLY_PRINTK) += shadow_console.o +obj-$(CONFIG_STACKTRACE) += stacktrace.o +obj-$(CONFIG_DEBUG_VERBOSE) += trace.o +obj-$(CONFIG_BFIN_PSEUDODBG_INSNS) += pseudodbg.o +obj-$(CONFIG_PERF_EVENTS) += perf_event.o + +# the kgdb test puts code into L2 and without linker +# relaxation, we need to force long calls to/from it +CFLAGS_kgdb_test.o := -mlong-calls + +obj-$(CONFIG_DEBUG_MMRS) += debug-mmrs.o diff --git a/arch/blackfin/kernel/asm-offsets.c b/arch/blackfin/kernel/asm-offsets.c index b56b2741cde..37fcae95021 100644 --- a/arch/blackfin/kernel/asm-offsets.c +++ b/arch/blackfin/kernel/asm-offsets.c @@ -1,30 +1,9 @@ /* - * File: arch/blackfin/kernel/asm-offsets.c - * Based on: - * Author: + * generate definitions needed by assembly language modules * - * Created: - * Description: generate definitions needed by assembly language modules. + * Copyright 2004-2009 Analog Devices Inc. * - * Modified: - * Copyright 2004-2006 Analog Devices Inc. - * - * Bugs: Enter bugs at http://blackfin.uclinux.org/ - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, see the file COPYING, or write - * to the Free Software Foundation, Inc., - * 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA + * Licensed under the GPL-2 or later */ #include <linux/stddef.h> @@ -34,8 +13,8 @@ #include <linux/hardirq.h> #include <linux/irq.h> #include <linux/thread_info.h> - -#define DEFINE(sym, val) asm volatile("\n->" #sym " %0 " #val : : "i" (val)) +#include <linux/kbuild.h> +#include <asm/pda.h> int main(void) { @@ -64,6 +43,7 @@ int main(void) DEFINE(KERNEL_STACK_SIZE, THREAD_SIZE); /* offsets into the pt_regs */ + DEFINE(PT_ORIG_R0, offsetof(struct pt_regs, orig_r0)); DEFINE(PT_ORIG_P0, offsetof(struct pt_regs, orig_p0)); DEFINE(PT_ORIG_PC, offsetof(struct pt_regs, orig_pc)); DEFINE(PT_R0, offsetof(struct pt_regs, r0)); @@ -131,5 +111,48 @@ int main(void) DEFINE(SIGSEGV, SIGSEGV); DEFINE(SIGTRAP, SIGTRAP); + /* PDA management (in L1 scratchpad) */ + DEFINE(PDA_SYSCFG, offsetof(struct blackfin_pda, syscfg)); +#ifdef CONFIG_SMP + DEFINE(PDA_IRQFLAGS, offsetof(struct blackfin_pda, imask)); +#endif + DEFINE(PDA_IPDT, offsetof(struct blackfin_pda, ipdt)); + DEFINE(PDA_IPDT_SWAPCOUNT, offsetof(struct blackfin_pda, ipdt_swapcount)); + DEFINE(PDA_DPDT, offsetof(struct blackfin_pda, dpdt)); + DEFINE(PDA_DPDT_SWAPCOUNT, offsetof(struct blackfin_pda, dpdt_swapcount)); + DEFINE(PDA_EXIPTR, offsetof(struct blackfin_pda, ex_iptr)); + DEFINE(PDA_EXOPTR, offsetof(struct blackfin_pda, ex_optr)); + DEFINE(PDA_EXBUF, offsetof(struct blackfin_pda, ex_buf)); + DEFINE(PDA_EXIMASK, offsetof(struct blackfin_pda, ex_imask)); + DEFINE(PDA_EXSTACK, offsetof(struct blackfin_pda, ex_stack)); + DEFINE(PDA_EXIPEND, offsetof(struct blackfin_pda, ex_ipend)); +#ifdef ANOMALY_05000261 + DEFINE(PDA_LFRETX, offsetof(struct blackfin_pda, last_cplb_fault_retx)); +#endif + DEFINE(PDA_DCPLB, offsetof(struct blackfin_pda, dcplb_fault_addr)); + DEFINE(PDA_ICPLB, offsetof(struct blackfin_pda, icplb_fault_addr)); + DEFINE(PDA_RETX, offsetof(struct blackfin_pda, retx)); + DEFINE(PDA_SEQSTAT, offsetof(struct blackfin_pda, seqstat)); +#ifdef CONFIG_DEBUG_DOUBLEFAULT + DEFINE(PDA_DF_DCPLB, offsetof(struct blackfin_pda, dcplb_doublefault_addr)); + DEFINE(PDA_DF_ICPLB, offsetof(struct blackfin_pda, icplb_doublefault_addr)); + DEFINE(PDA_DF_SEQSTAT, offsetof(struct blackfin_pda, seqstat_doublefault)); + DEFINE(PDA_DF_RETX, offsetof(struct blackfin_pda, retx_doublefault)); +#endif + + /* PDA initial management */ + DEFINE(PDA_INIT_RETX, offsetof(struct blackfin_initial_pda, retx)); +#ifdef CONFIG_DEBUG_DOUBLEFAULT + DEFINE(PDA_INIT_DF_DCPLB, offsetof(struct blackfin_initial_pda, dcplb_doublefault_addr)); + DEFINE(PDA_INIT_DF_ICPLB, offsetof(struct blackfin_initial_pda, icplb_doublefault_addr)); + DEFINE(PDA_INIT_DF_SEQSTAT, offsetof(struct blackfin_initial_pda, seqstat_doublefault)); + DEFINE(PDA_INIT_DF_RETX, offsetof(struct blackfin_initial_pda, retx_doublefault)); +#endif + +#ifdef CONFIG_SMP + /* Inter-core lock (in L2 SRAM) */ + DEFINE(SIZEOF_CORELOCK, sizeof(struct corelock_slot)); +#endif + return 0; } diff --git a/arch/blackfin/kernel/bfin_dma.c b/arch/blackfin/kernel/bfin_dma.c new file mode 100644 index 00000000000..4a32f2dd5dd --- /dev/null +++ b/arch/blackfin/kernel/bfin_dma.c @@ -0,0 +1,612 @@ +/* + * bfin_dma.c - Blackfin DMA implementation + * + * Copyright 2004-2008 Analog Devices Inc. + * + * Licensed under the GPL-2 or later. + */ + +#include <linux/errno.h> +#include <linux/interrupt.h> +#include <linux/kernel.h> +#include <linux/module.h> +#include <linux/param.h> +#include <linux/proc_fs.h> +#include <linux/sched.h> +#include <linux/seq_file.h> +#include <linux/spinlock.h> + +#include <asm/blackfin.h> +#include <asm/cacheflush.h> +#include <asm/dma.h> +#include <asm/uaccess.h> +#include <asm/early_printk.h> + +/* + * To make sure we work around 05000119 - we always check DMA_DONE bit, + * never the DMA_RUN bit + */ + +struct dma_channel dma_ch[MAX_DMA_CHANNELS]; +EXPORT_SYMBOL(dma_ch); + +static int __init blackfin_dma_init(void) +{ + int i; + + printk(KERN_INFO "Blackfin DMA Controller\n"); + + +#if ANOMALY_05000480 + bfin_write_DMAC_TC_PER(0x0111); +#endif + + for (i = 0; i < MAX_DMA_CHANNELS; i++) { + atomic_set(&dma_ch[i].chan_status, 0); + dma_ch[i].regs = dma_io_base_addr[i]; + } +#if defined(CH_MEM_STREAM3_SRC) && defined(CONFIG_BF60x) + /* Mark MEMDMA Channel 3 as requested since we're using it internally */ + request_dma(CH_MEM_STREAM3_DEST, "Blackfin dma_memcpy"); + request_dma(CH_MEM_STREAM3_SRC, "Blackfin dma_memcpy"); +#else + /* Mark MEMDMA Channel 0 as requested since we're using it internally */ + request_dma(CH_MEM_STREAM0_DEST, "Blackfin dma_memcpy"); + request_dma(CH_MEM_STREAM0_SRC, "Blackfin dma_memcpy"); +#endif + +#if defined(CONFIG_DEB_DMA_URGENT) + bfin_write_EBIU_DDRQUE(bfin_read_EBIU_DDRQUE() + | DEB1_URGENT | DEB2_URGENT | DEB3_URGENT); +#endif + + return 0; +} +arch_initcall(blackfin_dma_init); + +#ifdef CONFIG_PROC_FS +static int proc_dma_show(struct seq_file *m, void *v) +{ + int i; + + for (i = 0; i < MAX_DMA_CHANNELS; ++i) + if (dma_channel_active(i)) + seq_printf(m, "%2d: %s\n", i, dma_ch[i].device_id); + + return 0; +} + +static int proc_dma_open(struct inode *inode, struct file *file) +{ + return single_open(file, proc_dma_show, NULL); +} + +static const struct file_operations proc_dma_operations = { + .open = proc_dma_open, + .read = seq_read, + .llseek = seq_lseek, + .release = single_release, +}; + +static int __init proc_dma_init(void) +{ + proc_create("dma", 0, NULL, &proc_dma_operations); + return 0; +} +late_initcall(proc_dma_init); +#endif + +static void set_dma_peripheral_map(unsigned int channel, const char *device_id) +{ +#ifdef CONFIG_BF54x + unsigned int per_map; + + switch (channel) { + case CH_UART2_RX: per_map = 0xC << 12; break; + case CH_UART2_TX: per_map = 0xD << 12; break; + case CH_UART3_RX: per_map = 0xE << 12; break; + case CH_UART3_TX: per_map = 0xF << 12; break; + default: return; + } + + if (strncmp(device_id, "BFIN_UART", 9) == 0) + dma_ch[channel].regs->peripheral_map = per_map; +#endif +} + +/** + * request_dma - request a DMA channel + * + * Request the specific DMA channel from the system if it's available. + */ +int request_dma(unsigned int channel, const char *device_id) +{ + pr_debug("request_dma() : BEGIN\n"); + + if (device_id == NULL) + printk(KERN_WARNING "request_dma(%u): no device_id given\n", channel); + +#if defined(CONFIG_BF561) && ANOMALY_05000182 + if (channel >= CH_IMEM_STREAM0_DEST && channel <= CH_IMEM_STREAM1_DEST) { + if (get_cclk() > 500000000) { + printk(KERN_WARNING + "Request IMDMA failed due to ANOMALY 05000182\n"); + return -EFAULT; + } + } +#endif + + if (atomic_cmpxchg(&dma_ch[channel].chan_status, 0, 1)) { + pr_debug("DMA CHANNEL IN USE\n"); + return -EBUSY; + } + + set_dma_peripheral_map(channel, device_id); + dma_ch[channel].device_id = device_id; + dma_ch[channel].irq = 0; + + /* This is to be enabled by putting a restriction - + * you have to request DMA, before doing any operations on + * descriptor/channel + */ + pr_debug("request_dma() : END\n"); + return 0; +} +EXPORT_SYMBOL(request_dma); + +int set_dma_callback(unsigned int channel, irq_handler_t callback, void *data) +{ + int ret; + unsigned int irq; + + BUG_ON(channel >= MAX_DMA_CHANNELS || !callback || + !atomic_read(&dma_ch[channel].chan_status)); + + irq = channel2irq(channel); + ret = request_irq(irq, callback, 0, dma_ch[channel].device_id, data); + if (ret) + return ret; + + dma_ch[channel].irq = irq; + dma_ch[channel].data = data; + + return 0; +} +EXPORT_SYMBOL(set_dma_callback); + +/** + * clear_dma_buffer - clear DMA fifos for specified channel + * + * Set the Buffer Clear bit in the Configuration register of specific DMA + * channel. This will stop the descriptor based DMA operation. + */ +static void clear_dma_buffer(unsigned int channel) +{ + dma_ch[channel].regs->cfg |= RESTART; + SSYNC(); + dma_ch[channel].regs->cfg &= ~RESTART; +} + +void free_dma(unsigned int channel) +{ + pr_debug("freedma() : BEGIN\n"); + BUG_ON(channel >= MAX_DMA_CHANNELS || + !atomic_read(&dma_ch[channel].chan_status)); + + /* Halt the DMA */ + disable_dma(channel); + clear_dma_buffer(channel); + + if (dma_ch[channel].irq) + free_irq(dma_ch[channel].irq, dma_ch[channel].data); + + /* Clear the DMA Variable in the Channel */ + atomic_set(&dma_ch[channel].chan_status, 0); + + pr_debug("freedma() : END\n"); +} +EXPORT_SYMBOL(free_dma); + +#ifdef CONFIG_PM +# ifndef MAX_DMA_SUSPEND_CHANNELS +# define MAX_DMA_SUSPEND_CHANNELS MAX_DMA_CHANNELS +# endif +# ifndef CONFIG_BF60x +int blackfin_dma_suspend(void) +{ + int i; + + for (i = 0; i < MAX_DMA_CHANNELS; ++i) { + if (dma_ch[i].regs->cfg & DMAEN) { + printk(KERN_ERR "DMA Channel %d failed to suspend\n", i); + return -EBUSY; + } + if (i < MAX_DMA_SUSPEND_CHANNELS) + dma_ch[i].saved_peripheral_map = dma_ch[i].regs->peripheral_map; + } + +#if ANOMALY_05000480 + bfin_write_DMAC_TC_PER(0x0); +#endif + return 0; +} + +void blackfin_dma_resume(void) +{ + int i; + + for (i = 0; i < MAX_DMA_CHANNELS; ++i) { + dma_ch[i].regs->cfg = 0; + if (i < MAX_DMA_SUSPEND_CHANNELS) + dma_ch[i].regs->peripheral_map = dma_ch[i].saved_peripheral_map; + } +#if ANOMALY_05000480 + bfin_write_DMAC_TC_PER(0x0111); +#endif +} +# else +int blackfin_dma_suspend(void) +{ + return 0; +} + +void blackfin_dma_resume(void) +{ +} +#endif +#endif + +/** + * blackfin_dma_early_init - minimal DMA init + * + * Setup a few DMA registers so we can safely do DMA transfers early on in + * the kernel booting process. Really this just means using dma_memcpy(). + */ +void __init blackfin_dma_early_init(void) +{ + early_shadow_stamp(); + bfin_write_MDMA_S0_CONFIG(0); + bfin_write_MDMA_S1_CONFIG(0); +} + +void __init early_dma_memcpy(void *pdst, const void *psrc, size_t size) +{ + unsigned long dst = (unsigned long)pdst; + unsigned long src = (unsigned long)psrc; + struct dma_register *dst_ch, *src_ch; + + early_shadow_stamp(); + + /* We assume that everything is 4 byte aligned, so include + * a basic sanity check + */ + BUG_ON(dst % 4); + BUG_ON(src % 4); + BUG_ON(size % 4); + + src_ch = 0; + /* Find an avalible memDMA channel */ + while (1) { + if (src_ch == (struct dma_register *)MDMA_S0_NEXT_DESC_PTR) { + dst_ch = (struct dma_register *)MDMA_D1_NEXT_DESC_PTR; + src_ch = (struct dma_register *)MDMA_S1_NEXT_DESC_PTR; + } else { + dst_ch = (struct dma_register *)MDMA_D0_NEXT_DESC_PTR; + src_ch = (struct dma_register *)MDMA_S0_NEXT_DESC_PTR; + } + + if (!DMA_MMR_READ(&src_ch->cfg)) + break; + else if (DMA_MMR_READ(&dst_ch->irq_status) & DMA_DONE) { + DMA_MMR_WRITE(&src_ch->cfg, 0); + break; + } + } + + /* Force a sync in case a previous config reset on this channel + * occurred. This is needed so subsequent writes to DMA registers + * are not spuriously lost/corrupted. + */ + __builtin_bfin_ssync(); + + /* Destination */ + bfin_write32(&dst_ch->start_addr, dst); + DMA_MMR_WRITE(&dst_ch->x_count, size >> 2); + DMA_MMR_WRITE(&dst_ch->x_modify, 1 << 2); + DMA_MMR_WRITE(&dst_ch->irq_status, DMA_DONE | DMA_ERR); + + /* Source */ + bfin_write32(&src_ch->start_addr, src); + DMA_MMR_WRITE(&src_ch->x_count, size >> 2); + DMA_MMR_WRITE(&src_ch->x_modify, 1 << 2); + DMA_MMR_WRITE(&src_ch->irq_status, DMA_DONE | DMA_ERR); + + /* Enable */ + DMA_MMR_WRITE(&src_ch->cfg, DMAEN | WDSIZE_32); + DMA_MMR_WRITE(&dst_ch->cfg, WNR | DI_EN_X | DMAEN | WDSIZE_32); + + /* Since we are atomic now, don't use the workaround ssync */ + __builtin_bfin_ssync(); + +#ifdef CONFIG_BF60x + /* Work around a possible MDMA anomaly. Running 2 MDMA channels to + * transfer DDR data to L1 SRAM may corrupt data. + * Should be reverted after this issue is root caused. + */ + while (!(DMA_MMR_READ(&dst_ch->irq_status) & DMA_DONE)) + continue; +#endif +} + +void __init early_dma_memcpy_done(void) +{ + early_shadow_stamp(); + + while ((bfin_read_MDMA_S0_CONFIG() && !(bfin_read_MDMA_D0_IRQ_STATUS() & DMA_DONE)) || + (bfin_read_MDMA_S1_CONFIG() && !(bfin_read_MDMA_D1_IRQ_STATUS() & DMA_DONE))) + continue; + + bfin_write_MDMA_D0_IRQ_STATUS(DMA_DONE | DMA_ERR); + bfin_write_MDMA_D1_IRQ_STATUS(DMA_DONE | DMA_ERR); + /* + * Now that DMA is done, we would normally flush cache, but + * i/d cache isn't running this early, so we don't bother, + * and just clear out the DMA channel for next time + */ + bfin_write_MDMA_S0_CONFIG(0); + bfin_write_MDMA_S1_CONFIG(0); + bfin_write_MDMA_D0_CONFIG(0); + bfin_write_MDMA_D1_CONFIG(0); + + __builtin_bfin_ssync(); +} + +#if defined(CH_MEM_STREAM3_SRC) && defined(CONFIG_BF60x) +#define bfin_read_MDMA_S_CONFIG bfin_read_MDMA_S3_CONFIG +#define bfin_write_MDMA_S_CONFIG bfin_write_MDMA_S3_CONFIG +#define bfin_write_MDMA_S_START_ADDR bfin_write_MDMA_S3_START_ADDR +#define bfin_write_MDMA_S_IRQ_STATUS bfin_write_MDMA_S3_IRQ_STATUS +#define bfin_write_MDMA_S_X_COUNT bfin_write_MDMA_S3_X_COUNT +#define bfin_write_MDMA_S_X_MODIFY bfin_write_MDMA_S3_X_MODIFY +#define bfin_write_MDMA_S_Y_COUNT bfin_write_MDMA_S3_Y_COUNT +#define bfin_write_MDMA_S_Y_MODIFY bfin_write_MDMA_S3_Y_MODIFY +#define bfin_write_MDMA_D_CONFIG bfin_write_MDMA_D3_CONFIG +#define bfin_write_MDMA_D_START_ADDR bfin_write_MDMA_D3_START_ADDR +#define bfin_read_MDMA_D_IRQ_STATUS bfin_read_MDMA_D3_IRQ_STATUS +#define bfin_write_MDMA_D_IRQ_STATUS bfin_write_MDMA_D3_IRQ_STATUS +#define bfin_write_MDMA_D_X_COUNT bfin_write_MDMA_D3_X_COUNT +#define bfin_write_MDMA_D_X_MODIFY bfin_write_MDMA_D3_X_MODIFY +#define bfin_write_MDMA_D_Y_COUNT bfin_write_MDMA_D3_Y_COUNT +#define bfin_write_MDMA_D_Y_MODIFY bfin_write_MDMA_D3_Y_MODIFY +#else +#define bfin_read_MDMA_S_CONFIG bfin_read_MDMA_S0_CONFIG +#define bfin_write_MDMA_S_CONFIG bfin_write_MDMA_S0_CONFIG +#define bfin_write_MDMA_S_START_ADDR bfin_write_MDMA_S0_START_ADDR +#define bfin_write_MDMA_S_IRQ_STATUS bfin_write_MDMA_S0_IRQ_STATUS +#define bfin_write_MDMA_S_X_COUNT bfin_write_MDMA_S0_X_COUNT +#define bfin_write_MDMA_S_X_MODIFY bfin_write_MDMA_S0_X_MODIFY +#define bfin_write_MDMA_S_Y_COUNT bfin_write_MDMA_S0_Y_COUNT +#define bfin_write_MDMA_S_Y_MODIFY bfin_write_MDMA_S0_Y_MODIFY +#define bfin_write_MDMA_D_CONFIG bfin_write_MDMA_D0_CONFIG +#define bfin_write_MDMA_D_START_ADDR bfin_write_MDMA_D0_START_ADDR +#define bfin_read_MDMA_D_IRQ_STATUS bfin_read_MDMA_D0_IRQ_STATUS +#define bfin_write_MDMA_D_IRQ_STATUS bfin_write_MDMA_D0_IRQ_STATUS +#define bfin_write_MDMA_D_X_COUNT bfin_write_MDMA_D0_X_COUNT +#define bfin_write_MDMA_D_X_MODIFY bfin_write_MDMA_D0_X_MODIFY +#define bfin_write_MDMA_D_Y_COUNT bfin_write_MDMA_D0_Y_COUNT +#define bfin_write_MDMA_D_Y_MODIFY bfin_write_MDMA_D0_Y_MODIFY +#endif + +/** + * __dma_memcpy - program the MDMA registers + * + * Actually program MDMA0 and wait for the transfer to finish. Disable IRQs + * while programming registers so that everything is fully configured. Wait + * for DMA to finish with IRQs enabled. If interrupted, the initial DMA_DONE + * check will make sure we don't clobber any existing transfer. + */ +static void __dma_memcpy(u32 daddr, s16 dmod, u32 saddr, s16 smod, size_t cnt, u32 conf) +{ + static DEFINE_SPINLOCK(mdma_lock); + unsigned long flags; + + spin_lock_irqsave(&mdma_lock, flags); + + /* Force a sync in case a previous config reset on this channel + * occurred. This is needed so subsequent writes to DMA registers + * are not spuriously lost/corrupted. Do it under irq lock and + * without the anomaly version (because we are atomic already). + */ + __builtin_bfin_ssync(); + + if (bfin_read_MDMA_S_CONFIG()) + while (!(bfin_read_MDMA_D_IRQ_STATUS() & DMA_DONE)) + continue; + + if (conf & DMA2D) { + /* For larger bit sizes, we've already divided down cnt so it + * is no longer a multiple of 64k. So we have to break down + * the limit here so it is a multiple of the incoming size. + * There is no limitation here in terms of total size other + * than the hardware though as the bits lost in the shift are + * made up by MODIFY (== we can hit the whole address space). + * X: (2^(16 - 0)) * 1 == (2^(16 - 1)) * 2 == (2^(16 - 2)) * 4 + */ + u32 shift = abs(dmod) >> 1; + size_t ycnt = cnt >> (16 - shift); + cnt = 1 << (16 - shift); + bfin_write_MDMA_D_Y_COUNT(ycnt); + bfin_write_MDMA_S_Y_COUNT(ycnt); + bfin_write_MDMA_D_Y_MODIFY(dmod); + bfin_write_MDMA_S_Y_MODIFY(smod); + } + + bfin_write_MDMA_D_START_ADDR(daddr); + bfin_write_MDMA_D_X_COUNT(cnt); + bfin_write_MDMA_D_X_MODIFY(dmod); + bfin_write_MDMA_D_IRQ_STATUS(DMA_DONE | DMA_ERR); + + bfin_write_MDMA_S_START_ADDR(saddr); + bfin_write_MDMA_S_X_COUNT(cnt); + bfin_write_MDMA_S_X_MODIFY(smod); + bfin_write_MDMA_S_IRQ_STATUS(DMA_DONE | DMA_ERR); + + bfin_write_MDMA_S_CONFIG(DMAEN | conf); + if (conf & DMA2D) + bfin_write_MDMA_D_CONFIG(WNR | DI_EN_Y | DMAEN | conf); + else + bfin_write_MDMA_D_CONFIG(WNR | DI_EN_X | DMAEN | conf); + + spin_unlock_irqrestore(&mdma_lock, flags); + + SSYNC(); + + while (!(bfin_read_MDMA_D_IRQ_STATUS() & DMA_DONE)) + if (bfin_read_MDMA_S_CONFIG()) + continue; + else + return; + + bfin_write_MDMA_D_IRQ_STATUS(DMA_DONE | DMA_ERR); + + bfin_write_MDMA_S_CONFIG(0); + bfin_write_MDMA_D_CONFIG(0); +} + +/** + * _dma_memcpy - translate C memcpy settings into MDMA settings + * + * Handle all the high level steps before we touch the MDMA registers. So + * handle direction, tweaking of sizes, and formatting of addresses. + */ +static void *_dma_memcpy(void *pdst, const void *psrc, size_t size) +{ + u32 conf, shift; + s16 mod; + unsigned long dst = (unsigned long)pdst; + unsigned long src = (unsigned long)psrc; + + if (size == 0) + return NULL; + + if (dst % 4 == 0 && src % 4 == 0 && size % 4 == 0) { + conf = WDSIZE_32; + shift = 2; + } else if (dst % 2 == 0 && src % 2 == 0 && size % 2 == 0) { + conf = WDSIZE_16; + shift = 1; + } else { + conf = WDSIZE_8; + shift = 0; + } + + /* If the two memory regions have a chance of overlapping, make + * sure the memcpy still works as expected. Do this by having the + * copy run backwards instead. + */ + mod = 1 << shift; + if (src < dst) { + mod *= -1; + dst += size + mod; + src += size + mod; + } + size >>= shift; + +#ifndef DMA_MMR_SIZE_32 + if (size > 0x10000) + conf |= DMA2D; +#endif + + __dma_memcpy(dst, mod, src, mod, size, conf); + + return pdst; +} + +/** + * dma_memcpy - DMA memcpy under mutex lock + * + * Do not check arguments before starting the DMA memcpy. Break the transfer + * up into two pieces. The first transfer is in multiples of 64k and the + * second transfer is the piece smaller than 64k. + */ +void *dma_memcpy(void *pdst, const void *psrc, size_t size) +{ + unsigned long dst = (unsigned long)pdst; + unsigned long src = (unsigned long)psrc; + + if (bfin_addr_dcacheable(src)) + blackfin_dcache_flush_range(src, src + size); + + if (bfin_addr_dcacheable(dst)) + blackfin_dcache_invalidate_range(dst, dst + size); + + return dma_memcpy_nocache(pdst, psrc, size); +} +EXPORT_SYMBOL(dma_memcpy); + +/** + * dma_memcpy_nocache - DMA memcpy under mutex lock + * - No cache flush/invalidate + * + * Do not check arguments before starting the DMA memcpy. Break the transfer + * up into two pieces. The first transfer is in multiples of 64k and the + * second transfer is the piece smaller than 64k. + */ +void *dma_memcpy_nocache(void *pdst, const void *psrc, size_t size) +{ +#ifdef DMA_MMR_SIZE_32 + _dma_memcpy(pdst, psrc, size); +#else + size_t bulk, rest; + + bulk = size & ~0xffff; + rest = size - bulk; + if (bulk) + _dma_memcpy(pdst, psrc, bulk); + _dma_memcpy(pdst + bulk, psrc + bulk, rest); +#endif + return pdst; +} +EXPORT_SYMBOL(dma_memcpy_nocache); + +/** + * safe_dma_memcpy - DMA memcpy w/argument checking + * + * Verify arguments are safe before heading to dma_memcpy(). + */ +void *safe_dma_memcpy(void *dst, const void *src, size_t size) +{ + if (!access_ok(VERIFY_WRITE, dst, size)) + return NULL; + if (!access_ok(VERIFY_READ, src, size)) + return NULL; + return dma_memcpy(dst, src, size); +} +EXPORT_SYMBOL(safe_dma_memcpy); + +static void _dma_out(unsigned long addr, unsigned long buf, unsigned DMA_MMR_SIZE_TYPE len, + u16 size, u16 dma_size) +{ + blackfin_dcache_flush_range(buf, buf + len * size); + __dma_memcpy(addr, 0, buf, size, len, dma_size); +} + +static void _dma_in(unsigned long addr, unsigned long buf, unsigned DMA_MMR_SIZE_TYPE len, + u16 size, u16 dma_size) +{ + blackfin_dcache_invalidate_range(buf, buf + len * size); + __dma_memcpy(buf, size, addr, 0, len, dma_size); +} + +#define MAKE_DMA_IO(io, bwl, isize, dmasize, cnst) \ +void dma_##io##s##bwl(unsigned long addr, cnst void *buf, unsigned DMA_MMR_SIZE_TYPE len) \ +{ \ + _dma_##io(addr, (unsigned long)buf, len, isize, WDSIZE_##dmasize); \ +} \ +EXPORT_SYMBOL(dma_##io##s##bwl) +MAKE_DMA_IO(out, b, 1, 8, const); +MAKE_DMA_IO(in, b, 1, 8, ); +MAKE_DMA_IO(out, w, 2, 16, const); +MAKE_DMA_IO(in, w, 2, 16, ); +MAKE_DMA_IO(out, l, 4, 32, const); +MAKE_DMA_IO(in, l, 4, 32, ); diff --git a/arch/blackfin/kernel/bfin_dma_5xx.c b/arch/blackfin/kernel/bfin_dma_5xx.c deleted file mode 100644 index 8fd5d22cec3..00000000000 --- a/arch/blackfin/kernel/bfin_dma_5xx.c +++ /dev/null @@ -1,835 +0,0 @@ -/* - * File: arch/blackfin/kernel/bfin_dma_5xx.c - * Based on: - * Author: - * - * Created: - * Description: This file contains the simple DMA Implementation for Blackfin - * - * Modified: - * Copyright 2004-2006 Analog Devices Inc. - * - * Bugs: Enter bugs at http://blackfin.uclinux.org/ - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, see the file COPYING, or write - * to the Free Software Foundation, Inc., - * 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA - */ - -#include <linux/errno.h> -#include <linux/module.h> -#include <linux/sched.h> -#include <linux/interrupt.h> -#include <linux/kernel.h> -#include <linux/param.h> - -#include <asm/blackfin.h> -#include <asm/dma.h> -#include <asm/cacheflush.h> - -/* Remove unused code not exported by symbol or internally called */ -#define REMOVE_DEAD_CODE - -/************************************************************************** - * Global Variables -***************************************************************************/ - -static struct dma_channel dma_ch[MAX_BLACKFIN_DMA_CHANNEL]; - -/*------------------------------------------------------------------------------ - * Set the Buffer Clear bit in the Configuration register of specific DMA - * channel. This will stop the descriptor based DMA operation. - *-----------------------------------------------------------------------------*/ -static void clear_dma_buffer(unsigned int channel) -{ - dma_ch[channel].regs->cfg |= RESTART; - SSYNC(); - dma_ch[channel].regs->cfg &= ~RESTART; - SSYNC(); -} - -static int __init blackfin_dma_init(void) -{ - int i; - - printk(KERN_INFO "Blackfin DMA Controller\n"); - - for (i = 0; i < MAX_BLACKFIN_DMA_CHANNEL; i++) { - dma_ch[i].chan_status = DMA_CHANNEL_FREE; - dma_ch[i].regs = base_addr[i]; - mutex_init(&(dma_ch[i].dmalock)); - } - /* Mark MEMDMA Channel 0 as requested since we're using it internally */ - dma_ch[CH_MEM_STREAM0_DEST].chan_status = DMA_CHANNEL_REQUESTED; - dma_ch[CH_MEM_STREAM0_SRC].chan_status = DMA_CHANNEL_REQUESTED; - -#if defined(CONFIG_DEB_DMA_URGENT) - bfin_write_EBIU_DDRQUE(bfin_read_EBIU_DDRQUE() - | DEB1_URGENT | DEB2_URGENT | DEB3_URGENT); -#endif - return 0; -} - -arch_initcall(blackfin_dma_init); - -/*------------------------------------------------------------------------------ - * Request the specific DMA channel from the system. - *-----------------------------------------------------------------------------*/ -int request_dma(unsigned int channel, char *device_id) -{ - - pr_debug("request_dma() : BEGIN \n"); - mutex_lock(&(dma_ch[channel].dmalock)); - - if ((dma_ch[channel].chan_status == DMA_CHANNEL_REQUESTED) - || (dma_ch[channel].chan_status == DMA_CHANNEL_ENABLED)) { - mutex_unlock(&(dma_ch[channel].dmalock)); - pr_debug("DMA CHANNEL IN USE \n"); - return -EBUSY; - } else { - dma_ch[channel].chan_status = DMA_CHANNEL_REQUESTED; - pr_debug("DMA CHANNEL IS ALLOCATED \n"); - } - - mutex_unlock(&(dma_ch[channel].dmalock)); - -#ifdef CONFIG_BF54x - if (channel >= CH_UART2_RX && channel <= CH_UART3_TX) { - if (strncmp(device_id, "BFIN_UART", 9) == 0) - dma_ch[channel].regs->peripheral_map |= - (channel - CH_UART2_RX + 0xC); - else - dma_ch[channel].regs->peripheral_map |= - (channel - CH_UART2_RX + 0x6); - } -#endif - - dma_ch[channel].device_id = device_id; - dma_ch[channel].irq_callback = NULL; - - /* This is to be enabled by putting a restriction - - * you have to request DMA, before doing any operations on - * descriptor/channel - */ - pr_debug("request_dma() : END \n"); - return channel; -} -EXPORT_SYMBOL(request_dma); - -int set_dma_callback(unsigned int channel, dma_interrupt_t callback, void *data) -{ - int ret_irq = 0; - - BUG_ON(!(dma_ch[channel].chan_status != DMA_CHANNEL_FREE - && channel < MAX_BLACKFIN_DMA_CHANNEL)); - - if (callback != NULL) { - int ret_val; - ret_irq = channel2irq(channel); - - dma_ch[channel].data = data; - - ret_val = - request_irq(ret_irq, (void *)callback, IRQF_DISABLED, - dma_ch[channel].device_id, data); - if (ret_val) { - printk(KERN_NOTICE - "Request irq in DMA engine failed.\n"); - return -EPERM; - } - dma_ch[channel].irq_callback = callback; - } - return 0; -} -EXPORT_SYMBOL(set_dma_callback); - -void free_dma(unsigned int channel) -{ - int ret_irq; - - pr_debug("freedma() : BEGIN \n"); - BUG_ON(!(dma_ch[channel].chan_status != DMA_CHANNEL_FREE - && channel < MAX_BLACKFIN_DMA_CHANNEL)); - - /* Halt the DMA */ - disable_dma(channel); - clear_dma_buffer(channel); - - if (dma_ch[channel].irq_callback != NULL) { - ret_irq = channel2irq(channel); - free_irq(ret_irq, dma_ch[channel].data); - } - - /* Clear the DMA Variable in the Channel */ - mutex_lock(&(dma_ch[channel].dmalock)); - dma_ch[channel].chan_status = DMA_CHANNEL_FREE; - mutex_unlock(&(dma_ch[channel].dmalock)); - - pr_debug("freedma() : END \n"); -} -EXPORT_SYMBOL(free_dma); - -void dma_enable_irq(unsigned int channel) -{ - int ret_irq; - - pr_debug("dma_enable_irq() : BEGIN \n"); - BUG_ON(!(dma_ch[channel].chan_status != DMA_CHANNEL_FREE - && channel < MAX_BLACKFIN_DMA_CHANNEL)); - - ret_irq = channel2irq(channel); - enable_irq(ret_irq); -} -EXPORT_SYMBOL(dma_enable_irq); - -void dma_disable_irq(unsigned int channel) -{ - int ret_irq; - - pr_debug("dma_disable_irq() : BEGIN \n"); - BUG_ON(!(dma_ch[channel].chan_status != DMA_CHANNEL_FREE - && channel < MAX_BLACKFIN_DMA_CHANNEL)); - - ret_irq = channel2irq(channel); - disable_irq(ret_irq); -} -EXPORT_SYMBOL(dma_disable_irq); - -int dma_channel_active(unsigned int channel) -{ - if (dma_ch[channel].chan_status == DMA_CHANNEL_FREE) { - return 0; - } else { - return 1; - } -} -EXPORT_SYMBOL(dma_channel_active); - -/*------------------------------------------------------------------------------ -* stop the specific DMA channel. -*-----------------------------------------------------------------------------*/ -void disable_dma(unsigned int channel) -{ - pr_debug("stop_dma() : BEGIN \n"); - - BUG_ON(!(dma_ch[channel].chan_status != DMA_CHANNEL_FREE - && channel < MAX_BLACKFIN_DMA_CHANNEL)); - - dma_ch[channel].regs->cfg &= ~DMAEN; /* Clean the enable bit */ - SSYNC(); - dma_ch[channel].chan_status = DMA_CHANNEL_REQUESTED; - /* Needs to be enabled Later */ - pr_debug("stop_dma() : END \n"); - return; -} -EXPORT_SYMBOL(disable_dma); - -void enable_dma(unsigned int channel) -{ - pr_debug("enable_dma() : BEGIN \n"); - - BUG_ON(!(dma_ch[channel].chan_status != DMA_CHANNEL_FREE - && channel < MAX_BLACKFIN_DMA_CHANNEL)); - - dma_ch[channel].chan_status = DMA_CHANNEL_ENABLED; - dma_ch[channel].regs->curr_x_count = 0; - dma_ch[channel].regs->curr_y_count = 0; - - dma_ch[channel].regs->cfg |= DMAEN; /* Set the enable bit */ - SSYNC(); - pr_debug("enable_dma() : END \n"); - return; -} -EXPORT_SYMBOL(enable_dma); - -/*------------------------------------------------------------------------------ -* Set the Start Address register for the specific DMA channel -* This function can be used for register based DMA, -* to setup the start address -* addr: Starting address of the DMA Data to be transferred. -*-----------------------------------------------------------------------------*/ -void set_dma_start_addr(unsigned int channel, unsigned long addr) -{ - pr_debug("set_dma_start_addr() : BEGIN \n"); - - BUG_ON(!(dma_ch[channel].chan_status != DMA_CHANNEL_FREE - && channel < MAX_BLACKFIN_DMA_CHANNEL)); - - dma_ch[channel].regs->start_addr = addr; - SSYNC(); - pr_debug("set_dma_start_addr() : END\n"); -} -EXPORT_SYMBOL(set_dma_start_addr); - -void set_dma_next_desc_addr(unsigned int channel, unsigned long addr) -{ - pr_debug("set_dma_next_desc_addr() : BEGIN \n"); - - BUG_ON(!(dma_ch[channel].chan_status != DMA_CHANNEL_FREE - && channel < MAX_BLACKFIN_DMA_CHANNEL)); - - dma_ch[channel].regs->next_desc_ptr = addr; - SSYNC(); - pr_debug("set_dma_next_desc_addr() : END\n"); -} -EXPORT_SYMBOL(set_dma_next_desc_addr); - -void set_dma_curr_desc_addr(unsigned int channel, unsigned long addr) -{ - pr_debug("set_dma_curr_desc_addr() : BEGIN \n"); - - BUG_ON(!(dma_ch[channel].chan_status != DMA_CHANNEL_FREE - && channel < MAX_BLACKFIN_DMA_CHANNEL)); - - dma_ch[channel].regs->curr_desc_ptr = addr; - SSYNC(); - pr_debug("set_dma_curr_desc_addr() : END\n"); -} -EXPORT_SYMBOL(set_dma_curr_desc_addr); - -void set_dma_x_count(unsigned int channel, unsigned short x_count) -{ - BUG_ON(!(dma_ch[channel].chan_status != DMA_CHANNEL_FREE - && channel < MAX_BLACKFIN_DMA_CHANNEL)); - - dma_ch[channel].regs->x_count = x_count; - SSYNC(); -} -EXPORT_SYMBOL(set_dma_x_count); - -void set_dma_y_count(unsigned int channel, unsigned short y_count) -{ - BUG_ON(!(dma_ch[channel].chan_status != DMA_CHANNEL_FREE - && channel < MAX_BLACKFIN_DMA_CHANNEL)); - - dma_ch[channel].regs->y_count = y_count; - SSYNC(); -} -EXPORT_SYMBOL(set_dma_y_count); - -void set_dma_x_modify(unsigned int channel, short x_modify) -{ - BUG_ON(!(dma_ch[channel].chan_status != DMA_CHANNEL_FREE - && channel < MAX_BLACKFIN_DMA_CHANNEL)); - - dma_ch[channel].regs->x_modify = x_modify; - SSYNC(); -} -EXPORT_SYMBOL(set_dma_x_modify); - -void set_dma_y_modify(unsigned int channel, short y_modify) -{ - BUG_ON(!(dma_ch[channel].chan_status != DMA_CHANNEL_FREE - && channel < MAX_BLACKFIN_DMA_CHANNEL)); - - dma_ch[channel].regs->y_modify = y_modify; - SSYNC(); -} -EXPORT_SYMBOL(set_dma_y_modify); - -void set_dma_config(unsigned int channel, unsigned short config) -{ - BUG_ON(!(dma_ch[channel].chan_status != DMA_CHANNEL_FREE - && channel < MAX_BLACKFIN_DMA_CHANNEL)); - - dma_ch[channel].regs->cfg = config; - SSYNC(); -} -EXPORT_SYMBOL(set_dma_config); - -unsigned short -set_bfin_dma_config(char direction, char flow_mode, - char intr_mode, char dma_mode, char width, char syncmode) -{ - unsigned short config; - - config = - ((direction << 1) | (width << 2) | (dma_mode << 4) | - (intr_mode << 6) | (flow_mode << 12) | (syncmode << 5)); - return config; -} -EXPORT_SYMBOL(set_bfin_dma_config); - -void set_dma_sg(unsigned int channel, struct dmasg *sg, int nr_sg) -{ - BUG_ON(!(dma_ch[channel].chan_status != DMA_CHANNEL_FREE - && channel < MAX_BLACKFIN_DMA_CHANNEL)); - - dma_ch[channel].regs->cfg |= ((nr_sg & 0x0F) << 8); - - dma_ch[channel].regs->next_desc_ptr = (unsigned int)sg; - - SSYNC(); -} -EXPORT_SYMBOL(set_dma_sg); - -void set_dma_curr_addr(unsigned int channel, unsigned long addr) -{ - BUG_ON(!(dma_ch[channel].chan_status != DMA_CHANNEL_FREE - && channel < MAX_BLACKFIN_DMA_CHANNEL)); - - dma_ch[channel].regs->curr_addr_ptr = addr; - SSYNC(); -} -EXPORT_SYMBOL(set_dma_curr_addr); - -/*------------------------------------------------------------------------------ - * Get the DMA status of a specific DMA channel from the system. - *-----------------------------------------------------------------------------*/ -unsigned short get_dma_curr_irqstat(unsigned int channel) -{ - BUG_ON(!(dma_ch[channel].chan_status != DMA_CHANNEL_FREE - && channel < MAX_BLACKFIN_DMA_CHANNEL)); - - return dma_ch[channel].regs->irq_status; -} -EXPORT_SYMBOL(get_dma_curr_irqstat); - -/*------------------------------------------------------------------------------ - * Clear the DMA_DONE bit in DMA status. Stop the DMA completion interrupt. - *-----------------------------------------------------------------------------*/ -void clear_dma_irqstat(unsigned int channel) -{ - BUG_ON(!(dma_ch[channel].chan_status != DMA_CHANNEL_FREE - && channel < MAX_BLACKFIN_DMA_CHANNEL)); - dma_ch[channel].regs->irq_status |= 3; -} -EXPORT_SYMBOL(clear_dma_irqstat); - -/*------------------------------------------------------------------------------ - * Get current DMA xcount of a specific DMA channel from the system. - *-----------------------------------------------------------------------------*/ -unsigned short get_dma_curr_xcount(unsigned int channel) -{ - BUG_ON(!(dma_ch[channel].chan_status != DMA_CHANNEL_FREE - && channel < MAX_BLACKFIN_DMA_CHANNEL)); - - return dma_ch[channel].regs->curr_x_count; -} -EXPORT_SYMBOL(get_dma_curr_xcount); - -/*------------------------------------------------------------------------------ - * Get current DMA ycount of a specific DMA channel from the system. - *-----------------------------------------------------------------------------*/ -unsigned short get_dma_curr_ycount(unsigned int channel) -{ - BUG_ON(!(dma_ch[channel].chan_status != DMA_CHANNEL_FREE - && channel < MAX_BLACKFIN_DMA_CHANNEL)); - - return dma_ch[channel].regs->curr_y_count; -} -EXPORT_SYMBOL(get_dma_curr_ycount); - -unsigned long get_dma_next_desc_ptr(unsigned int channel) -{ - BUG_ON(!(dma_ch[channel].chan_status != DMA_CHANNEL_FREE - && channel < MAX_BLACKFIN_DMA_CHANNEL)); - - return dma_ch[channel].regs->next_desc_ptr; -} -EXPORT_SYMBOL(get_dma_next_desc_ptr); - -unsigned long get_dma_curr_desc_ptr(unsigned int channel) -{ - BUG_ON(!(dma_ch[channel].chan_status != DMA_CHANNEL_FREE - && channel < MAX_BLACKFIN_DMA_CHANNEL)); - - return dma_ch[channel].regs->curr_desc_ptr; -} -EXPORT_SYMBOL(get_dma_curr_desc_ptr); - -unsigned long get_dma_curr_addr(unsigned int channel) -{ - BUG_ON(!(dma_ch[channel].chan_status != DMA_CHANNEL_FREE - && channel < MAX_BLACKFIN_DMA_CHANNEL)); - - return dma_ch[channel].regs->curr_addr_ptr; -} -EXPORT_SYMBOL(get_dma_curr_addr); - -static void *__dma_memcpy(void *dest, const void *src, size_t size) -{ - int direction; /* 1 - address decrease, 0 - address increase */ - int flag_align; /* 1 - address aligned, 0 - address unaligned */ - int flag_2D; /* 1 - 2D DMA needed, 0 - 1D DMA needed */ - unsigned long flags; - - if (size <= 0) - return NULL; - - local_irq_save(flags); - - if ((unsigned long)src < memory_end) - blackfin_dcache_flush_range((unsigned int)src, - (unsigned int)(src + size)); - - if ((unsigned long)dest < memory_end) - blackfin_dcache_invalidate_range((unsigned int)dest, - (unsigned int)(dest + size)); - - bfin_write_MDMA_D0_IRQ_STATUS(DMA_DONE | DMA_ERR); - - if ((unsigned long)src < (unsigned long)dest) - direction = 1; - else - direction = 0; - - if ((((unsigned long)dest % 2) == 0) && (((unsigned long)src % 2) == 0) - && ((size % 2) == 0)) - flag_align = 1; - else - flag_align = 0; - - if (size > 0x10000) /* size > 64K */ - flag_2D = 1; - else - flag_2D = 0; - - /* Setup destination and source start address */ - if (direction) { - if (flag_align) { - bfin_write_MDMA_D0_START_ADDR(dest + size - 2); - bfin_write_MDMA_S0_START_ADDR(src + size - 2); - } else { - bfin_write_MDMA_D0_START_ADDR(dest + size - 1); - bfin_write_MDMA_S0_START_ADDR(src + size - 1); - } - } else { - bfin_write_MDMA_D0_START_ADDR(dest); - bfin_write_MDMA_S0_START_ADDR(src); - } - - /* Setup destination and source xcount */ - if (flag_2D) { - if (flag_align) { - bfin_write_MDMA_D0_X_COUNT(1024 / 2); - bfin_write_MDMA_S0_X_COUNT(1024 / 2); - } else { - bfin_write_MDMA_D0_X_COUNT(1024); - bfin_write_MDMA_S0_X_COUNT(1024); - } - bfin_write_MDMA_D0_Y_COUNT(size >> 10); - bfin_write_MDMA_S0_Y_COUNT(size >> 10); - } else { - if (flag_align) { - bfin_write_MDMA_D0_X_COUNT(size / 2); - bfin_write_MDMA_S0_X_COUNT(size / 2); - } else { - bfin_write_MDMA_D0_X_COUNT(size); - bfin_write_MDMA_S0_X_COUNT(size); - } - } - - /* Setup destination and source xmodify and ymodify */ - if (direction) { - if (flag_align) { - bfin_write_MDMA_D0_X_MODIFY(-2); - bfin_write_MDMA_S0_X_MODIFY(-2); - if (flag_2D) { - bfin_write_MDMA_D0_Y_MODIFY(-2); - bfin_write_MDMA_S0_Y_MODIFY(-2); - } - } else { - bfin_write_MDMA_D0_X_MODIFY(-1); - bfin_write_MDMA_S0_X_MODIFY(-1); - if (flag_2D) { - bfin_write_MDMA_D0_Y_MODIFY(-1); - bfin_write_MDMA_S0_Y_MODIFY(-1); - } - } - } else { - if (flag_align) { - bfin_write_MDMA_D0_X_MODIFY(2); - bfin_write_MDMA_S0_X_MODIFY(2); - if (flag_2D) { - bfin_write_MDMA_D0_Y_MODIFY(2); - bfin_write_MDMA_S0_Y_MODIFY(2); - } - } else { - bfin_write_MDMA_D0_X_MODIFY(1); - bfin_write_MDMA_S0_X_MODIFY(1); - if (flag_2D) { - bfin_write_MDMA_D0_Y_MODIFY(1); - bfin_write_MDMA_S0_Y_MODIFY(1); - } - } - } - - /* Enable source DMA */ - if (flag_2D) { - if (flag_align) { - bfin_write_MDMA_S0_CONFIG(DMAEN | DMA2D | WDSIZE_16); - bfin_write_MDMA_D0_CONFIG(WNR | DI_EN | DMAEN | DMA2D | WDSIZE_16); - } else { - bfin_write_MDMA_S0_CONFIG(DMAEN | DMA2D); - bfin_write_MDMA_D0_CONFIG(WNR | DI_EN | DMAEN | DMA2D); - } - } else { - if (flag_align) { - bfin_write_MDMA_S0_CONFIG(DMAEN | WDSIZE_16); - bfin_write_MDMA_D0_CONFIG(WNR | DI_EN | DMAEN | WDSIZE_16); - } else { - bfin_write_MDMA_S0_CONFIG(DMAEN); - bfin_write_MDMA_D0_CONFIG(WNR | DI_EN | DMAEN); - } - } - - SSYNC(); - - while (!(bfin_read_MDMA_D0_IRQ_STATUS() & DMA_DONE)) - ; - - bfin_write_MDMA_D0_IRQ_STATUS(bfin_read_MDMA_D0_IRQ_STATUS() | - (DMA_DONE | DMA_ERR)); - - bfin_write_MDMA_S0_CONFIG(0); - bfin_write_MDMA_D0_CONFIG(0); - - local_irq_restore(flags); - - return dest; -} - -void *dma_memcpy(void *dest, const void *src, size_t size) -{ - size_t bulk; - size_t rest; - void * addr; - - bulk = (size >> 16) << 16; - rest = size - bulk; - if (bulk) - __dma_memcpy(dest, src, bulk); - addr = __dma_memcpy(dest+bulk, src+bulk, rest); - return addr; -} -EXPORT_SYMBOL(dma_memcpy); - -void *safe_dma_memcpy(void *dest, const void *src, size_t size) -{ - void *addr; - addr = dma_memcpy(dest, src, size); - return addr; -} -EXPORT_SYMBOL(safe_dma_memcpy); - -void dma_outsb(unsigned long addr, const void *buf, unsigned short len) -{ - unsigned long flags; - - local_irq_save(flags); - - blackfin_dcache_flush_range((unsigned int)buf, - (unsigned int)(buf) + len); - - bfin_write_MDMA_D0_START_ADDR(addr); - bfin_write_MDMA_D0_X_COUNT(len); - bfin_write_MDMA_D0_X_MODIFY(0); - bfin_write_MDMA_D0_IRQ_STATUS(DMA_DONE | DMA_ERR); - - bfin_write_MDMA_S0_START_ADDR(buf); - bfin_write_MDMA_S0_X_COUNT(len); - bfin_write_MDMA_S0_X_MODIFY(1); - bfin_write_MDMA_S0_IRQ_STATUS(DMA_DONE | DMA_ERR); - - bfin_write_MDMA_S0_CONFIG(DMAEN | WDSIZE_8); - bfin_write_MDMA_D0_CONFIG(WNR | DI_EN | DMAEN | WDSIZE_8); - - SSYNC(); - - while (!(bfin_read_MDMA_D0_IRQ_STATUS() & DMA_DONE)); - - bfin_write_MDMA_D0_IRQ_STATUS(DMA_DONE | DMA_ERR); - - bfin_write_MDMA_S0_CONFIG(0); - bfin_write_MDMA_D0_CONFIG(0); - local_irq_restore(flags); - -} -EXPORT_SYMBOL(dma_outsb); - - -void dma_insb(unsigned long addr, void *buf, unsigned short len) -{ - unsigned long flags; - - blackfin_dcache_invalidate_range((unsigned int)buf, - (unsigned int)(buf) + len); - - local_irq_save(flags); - bfin_write_MDMA_D0_START_ADDR(buf); - bfin_write_MDMA_D0_X_COUNT(len); - bfin_write_MDMA_D0_X_MODIFY(1); - bfin_write_MDMA_D0_IRQ_STATUS(DMA_DONE | DMA_ERR); - - bfin_write_MDMA_S0_START_ADDR(addr); - bfin_write_MDMA_S0_X_COUNT(len); - bfin_write_MDMA_S0_X_MODIFY(0); - bfin_write_MDMA_S0_IRQ_STATUS(DMA_DONE | DMA_ERR); - - bfin_write_MDMA_S0_CONFIG(DMAEN | WDSIZE_8); - bfin_write_MDMA_D0_CONFIG(WNR | DI_EN | DMAEN | WDSIZE_8); - - SSYNC(); - - while (!(bfin_read_MDMA_D0_IRQ_STATUS() & DMA_DONE)); - - bfin_write_MDMA_D0_IRQ_STATUS(DMA_DONE | DMA_ERR); - - bfin_write_MDMA_S0_CONFIG(0); - bfin_write_MDMA_D0_CONFIG(0); - local_irq_restore(flags); - -} -EXPORT_SYMBOL(dma_insb); - -void dma_outsw(unsigned long addr, const void *buf, unsigned short len) -{ - unsigned long flags; - - local_irq_save(flags); - - blackfin_dcache_flush_range((unsigned int)buf, - (unsigned int)(buf) + len * sizeof(short)); - - bfin_write_MDMA_D0_START_ADDR(addr); - bfin_write_MDMA_D0_X_COUNT(len); - bfin_write_MDMA_D0_X_MODIFY(0); - bfin_write_MDMA_D0_IRQ_STATUS(DMA_DONE | DMA_ERR); - - bfin_write_MDMA_S0_START_ADDR(buf); - bfin_write_MDMA_S0_X_COUNT(len); - bfin_write_MDMA_S0_X_MODIFY(2); - bfin_write_MDMA_S0_IRQ_STATUS(DMA_DONE | DMA_ERR); - - bfin_write_MDMA_S0_CONFIG(DMAEN | WDSIZE_16); - bfin_write_MDMA_D0_CONFIG(WNR | DI_EN | DMAEN | WDSIZE_16); - - SSYNC(); - - while (!(bfin_read_MDMA_D0_IRQ_STATUS() & DMA_DONE)); - - bfin_write_MDMA_D0_IRQ_STATUS(DMA_DONE | DMA_ERR); - - bfin_write_MDMA_S0_CONFIG(0); - bfin_write_MDMA_D0_CONFIG(0); - local_irq_restore(flags); - -} -EXPORT_SYMBOL(dma_outsw); - -void dma_insw(unsigned long addr, void *buf, unsigned short len) -{ - unsigned long flags; - - blackfin_dcache_invalidate_range((unsigned int)buf, - (unsigned int)(buf) + len * sizeof(short)); - - local_irq_save(flags); - - bfin_write_MDMA_D0_START_ADDR(buf); - bfin_write_MDMA_D0_X_COUNT(len); - bfin_write_MDMA_D0_X_MODIFY(2); - bfin_write_MDMA_D0_IRQ_STATUS(DMA_DONE | DMA_ERR); - - bfin_write_MDMA_S0_START_ADDR(addr); - bfin_write_MDMA_S0_X_COUNT(len); - bfin_write_MDMA_S0_X_MODIFY(0); - bfin_write_MDMA_S0_IRQ_STATUS(DMA_DONE | DMA_ERR); - - bfin_write_MDMA_S0_CONFIG(DMAEN | WDSIZE_16); - bfin_write_MDMA_D0_CONFIG(WNR | DI_EN | DMAEN | WDSIZE_16); - - SSYNC(); - - while (!(bfin_read_MDMA_D0_IRQ_STATUS() & DMA_DONE)); - - bfin_write_MDMA_D0_IRQ_STATUS(DMA_DONE | DMA_ERR); - - bfin_write_MDMA_S0_CONFIG(0); - bfin_write_MDMA_D0_CONFIG(0); - local_irq_restore(flags); - -} -EXPORT_SYMBOL(dma_insw); - -void dma_outsl(unsigned long addr, const void *buf, unsigned short len) -{ - unsigned long flags; - - local_irq_save(flags); - - blackfin_dcache_flush_range((unsigned int)buf, - (unsigned int)(buf) + len * sizeof(long)); - - bfin_write_MDMA_D0_START_ADDR(addr); - bfin_write_MDMA_D0_X_COUNT(len); - bfin_write_MDMA_D0_X_MODIFY(0); - bfin_write_MDMA_D0_IRQ_STATUS(DMA_DONE | DMA_ERR); - - bfin_write_MDMA_S0_START_ADDR(buf); - bfin_write_MDMA_S0_X_COUNT(len); - bfin_write_MDMA_S0_X_MODIFY(4); - bfin_write_MDMA_S0_IRQ_STATUS(DMA_DONE | DMA_ERR); - - bfin_write_MDMA_S0_CONFIG(DMAEN | WDSIZE_32); - bfin_write_MDMA_D0_CONFIG(WNR | DI_EN | DMAEN | WDSIZE_32); - - SSYNC(); - - while (!(bfin_read_MDMA_D0_IRQ_STATUS() & DMA_DONE)); - - bfin_write_MDMA_D0_IRQ_STATUS(DMA_DONE | DMA_ERR); - - bfin_write_MDMA_S0_CONFIG(0); - bfin_write_MDMA_D0_CONFIG(0); - local_irq_restore(flags); - -} -EXPORT_SYMBOL(dma_outsl); - -void dma_insl(unsigned long addr, void *buf, unsigned short len) -{ - unsigned long flags; - - blackfin_dcache_invalidate_range((unsigned int)buf, - (unsigned int)(buf) + len * sizeof(long)); - - local_irq_save(flags); - - bfin_write_MDMA_D0_START_ADDR(buf); - bfin_write_MDMA_D0_X_COUNT(len); - bfin_write_MDMA_D0_X_MODIFY(4); - bfin_write_MDMA_D0_IRQ_STATUS(DMA_DONE | DMA_ERR); - - bfin_write_MDMA_S0_START_ADDR(addr); - bfin_write_MDMA_S0_X_COUNT(len); - bfin_write_MDMA_S0_X_MODIFY(0); - bfin_write_MDMA_S0_IRQ_STATUS(DMA_DONE | DMA_ERR); - - bfin_write_MDMA_S0_CONFIG(DMAEN | WDSIZE_32); - bfin_write_MDMA_D0_CONFIG(WNR | DI_EN | DMAEN | WDSIZE_32); - - SSYNC(); - - while (!(bfin_read_MDMA_D0_IRQ_STATUS() & DMA_DONE)); - - bfin_write_MDMA_D0_IRQ_STATUS(DMA_DONE | DMA_ERR); - - bfin_write_MDMA_S0_CONFIG(0); - bfin_write_MDMA_D0_CONFIG(0); - local_irq_restore(flags); - -} -EXPORT_SYMBOL(dma_insl); diff --git a/arch/blackfin/kernel/bfin_gpio.c b/arch/blackfin/kernel/bfin_gpio.c index 08788f7bbfb..a017359c182 100644 --- a/arch/blackfin/kernel/bfin_gpio.c +++ b/arch/blackfin/kernel/bfin_gpio.c @@ -1,92 +1,17 @@ /* - * File: arch/blackfin/kernel/bfin_gpio.c - * Based on: - * Author: Michael Hennerich (hennerich@blackfin.uclinux.org) + * GPIO Abstraction Layer * - * Created: - * Description: GPIO Abstraction Layer + * Copyright 2006-2010 Analog Devices Inc. * - * Modified: - * Copyright 2008 Analog Devices Inc. - * - * Bugs: Enter bugs at http://blackfin.uclinux.org/ - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, see the file COPYING, or write - * to the Free Software Foundation, Inc., - * 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA + * Licensed under the GPL-2 or later */ -/* -* Number BF537/6/4 BF561 BF533/2/1 BF549/8/4/2 -* -* GPIO_0 PF0 PF0 PF0 PA0...PJ13 -* GPIO_1 PF1 PF1 PF1 -* GPIO_2 PF2 PF2 PF2 -* GPIO_3 PF3 PF3 PF3 -* GPIO_4 PF4 PF4 PF4 -* GPIO_5 PF5 PF5 PF5 -* GPIO_6 PF6 PF6 PF6 -* GPIO_7 PF7 PF7 PF7 -* GPIO_8 PF8 PF8 PF8 -* GPIO_9 PF9 PF9 PF9 -* GPIO_10 PF10 PF10 PF10 -* GPIO_11 PF11 PF11 PF11 -* GPIO_12 PF12 PF12 PF12 -* GPIO_13 PF13 PF13 PF13 -* GPIO_14 PF14 PF14 PF14 -* GPIO_15 PF15 PF15 PF15 -* GPIO_16 PG0 PF16 -* GPIO_17 PG1 PF17 -* GPIO_18 PG2 PF18 -* GPIO_19 PG3 PF19 -* GPIO_20 PG4 PF20 -* GPIO_21 PG5 PF21 -* GPIO_22 PG6 PF22 -* GPIO_23 PG7 PF23 -* GPIO_24 PG8 PF24 -* GPIO_25 PG9 PF25 -* GPIO_26 PG10 PF26 -* GPIO_27 PG11 PF27 -* GPIO_28 PG12 PF28 -* GPIO_29 PG13 PF29 -* GPIO_30 PG14 PF30 -* GPIO_31 PG15 PF31 -* GPIO_32 PH0 PF32 -* GPIO_33 PH1 PF33 -* GPIO_34 PH2 PF34 -* GPIO_35 PH3 PF35 -* GPIO_36 PH4 PF36 -* GPIO_37 PH5 PF37 -* GPIO_38 PH6 PF38 -* GPIO_39 PH7 PF39 -* GPIO_40 PH8 PF40 -* GPIO_41 PH9 PF41 -* GPIO_42 PH10 PF42 -* GPIO_43 PH11 PF43 -* GPIO_44 PH12 PF44 -* GPIO_45 PH13 PF45 -* GPIO_46 PH14 PF46 -* GPIO_47 PH15 PF47 -*/ - #include <linux/delay.h> #include <linux/module.h> #include <linux/err.h> #include <linux/proc_fs.h> -#include <asm/blackfin.h> -#include <asm/gpio.h> -#include <asm/portmux.h> +#include <linux/seq_file.h> +#include <linux/gpio.h> #include <linux/irq.h> #if ANOMALY_05000311 || ANOMALY_05000323 @@ -95,14 +20,14 @@ enum { AWA_data_clear = SYSCR, AWA_data_set = SYSCR, AWA_toggle = SYSCR, - AWA_maska = UART_SCR, - AWA_maska_clear = UART_SCR, - AWA_maska_set = UART_SCR, - AWA_maska_toggle = UART_SCR, - AWA_maskb = UART_GCTL, - AWA_maskb_clear = UART_GCTL, - AWA_maskb_set = UART_GCTL, - AWA_maskb_toggle = UART_GCTL, + AWA_maska = BFIN_UART_SCR, + AWA_maska_clear = BFIN_UART_SCR, + AWA_maska_set = BFIN_UART_SCR, + AWA_maska_toggle = BFIN_UART_SCR, + AWA_maskb = BFIN_UART_GCTL, + AWA_maskb_clear = BFIN_UART_GCTL, + AWA_maskb_set = BFIN_UART_GCTL, + AWA_maskb_toggle = BFIN_UART_GCTL, AWA_dir = SPORT1_STAT, AWA_polar = SPORT1_STAT, AWA_edge = SPORT1_STAT, @@ -119,123 +44,79 @@ enum { #define AWA_DUMMY_READ(...) do { } while (0) #endif -#ifdef BF533_FAMILY -static struct gpio_port_t *gpio_bankb[gpio_bank(MAX_BLACKFIN_GPIOS)] = { +static struct gpio_port_t * const gpio_array[] = { +#if defined(BF533_FAMILY) || defined(BF538_FAMILY) (struct gpio_port_t *) FIO_FLAG_D, -}; -#endif - -#if defined(BF527_FAMILY) || defined(BF537_FAMILY) -static struct gpio_port_t *gpio_bankb[gpio_bank(MAX_BLACKFIN_GPIOS)] = { +#elif defined(CONFIG_BF52x) || defined(BF537_FAMILY) || defined(CONFIG_BF51x) (struct gpio_port_t *) PORTFIO, (struct gpio_port_t *) PORTGIO, (struct gpio_port_t *) PORTHIO, +#elif defined(BF561_FAMILY) + (struct gpio_port_t *) FIO0_FLAG_D, + (struct gpio_port_t *) FIO1_FLAG_D, + (struct gpio_port_t *) FIO2_FLAG_D, +#else +# error no gpio arrays defined +#endif }; -static unsigned short *port_fer[gpio_bank(MAX_BLACKFIN_GPIOS)] = { +#if defined(CONFIG_BF52x) || defined(BF537_FAMILY) || defined(CONFIG_BF51x) +static unsigned short * const port_fer[] = { (unsigned short *) PORTF_FER, (unsigned short *) PORTG_FER, (unsigned short *) PORTH_FER, }; -#endif -#ifdef BF527_FAMILY -static unsigned short *port_mux[gpio_bank(MAX_BLACKFIN_GPIOS)] = { +# if !defined(BF537_FAMILY) +static unsigned short * const port_mux[] = { (unsigned short *) PORTF_MUX, (unsigned short *) PORTG_MUX, (unsigned short *) PORTH_MUX, }; static const -u8 pmux_offset[][16] = - {{ 0, 0, 0, 0, 0, 0, 0, 0, 2, 2, 4, 6, 8, 8, 10, 10 }, /* PORTF */ - { 0, 0, 0, 0, 0, 2, 2, 4, 4, 6, 8, 10, 10, 10, 12, 12 }, /* PORTG */ - { 0, 0, 0, 0, 0, 0, 0, 0, 2, 4, 4, 4, 4, 4, 4, 4 }, /* PORTH */ - }; -#endif - -#ifdef BF561_FAMILY -static struct gpio_port_t *gpio_bankb[gpio_bank(MAX_BLACKFIN_GPIOS)] = { - (struct gpio_port_t *) FIO0_FLAG_D, - (struct gpio_port_t *) FIO1_FLAG_D, - (struct gpio_port_t *) FIO2_FLAG_D, +u8 pmux_offset[][16] = { +# if defined(CONFIG_BF52x) + { 0, 0, 0, 0, 0, 0, 0, 0, 2, 2, 4, 6, 8, 8, 10, 10 }, /* PORTF */ + { 0, 0, 0, 0, 0, 2, 2, 4, 4, 6, 8, 10, 10, 10, 12, 12 }, /* PORTG */ + { 0, 0, 0, 0, 0, 0, 0, 0, 2, 4, 4, 4, 4, 4, 4, 4 }, /* PORTH */ +# elif defined(CONFIG_BF51x) + { 0, 2, 2, 2, 2, 2, 2, 4, 6, 6, 6, 8, 8, 8, 8, 10 }, /* PORTF */ + { 0, 0, 0, 2, 4, 6, 6, 6, 8, 10, 10, 12, 14, 14, 14, 14 }, /* PORTG */ + { 0, 0, 0, 0, 2, 2, 4, 6, 10, 10, 10, 10, 10, 10, 10, 10 }, /* PORTH */ +# endif }; -#endif +# endif -#ifdef BF548_FAMILY -static struct gpio_port_t *gpio_array[gpio_bank(MAX_BLACKFIN_GPIOS)] = { - (struct gpio_port_t *)PORTA_FER, - (struct gpio_port_t *)PORTB_FER, - (struct gpio_port_t *)PORTC_FER, - (struct gpio_port_t *)PORTD_FER, - (struct gpio_port_t *)PORTE_FER, - (struct gpio_port_t *)PORTF_FER, - (struct gpio_port_t *)PORTG_FER, - (struct gpio_port_t *)PORTH_FER, - (struct gpio_port_t *)PORTI_FER, - (struct gpio_port_t *)PORTJ_FER, +#elif defined(BF538_FAMILY) +static unsigned short * const port_fer[] = { + (unsigned short *) PORTCIO_FER, + (unsigned short *) PORTDIO_FER, + (unsigned short *) PORTEIO_FER, }; #endif -static unsigned short reserved_gpio_map[gpio_bank(MAX_BLACKFIN_GPIOS)]; -static unsigned short reserved_peri_map[gpio_bank(MAX_RESOURCES)]; - -#define RESOURCE_LABEL_SIZE 16 +#define RESOURCE_LABEL_SIZE 16 static struct str_ident { char name[RESOURCE_LABEL_SIZE]; } str_ident[MAX_RESOURCES]; -#if defined(CONFIG_PM) && !defined(CONFIG_BF54x) -static unsigned short wakeup_map[gpio_bank(MAX_BLACKFIN_GPIOS)]; -static unsigned char wakeup_flags_map[MAX_BLACKFIN_GPIOS]; -static struct gpio_port_s gpio_bank_saved[gpio_bank(MAX_BLACKFIN_GPIOS)]; - -#ifdef BF533_FAMILY -static unsigned int sic_iwr_irqs[gpio_bank(MAX_BLACKFIN_GPIOS)] = {IRQ_PROG_INTB}; -#endif - -#ifdef BF537_FAMILY -static unsigned int sic_iwr_irqs[gpio_bank(MAX_BLACKFIN_GPIOS)] = {IRQ_PROG_INTB, IRQ_PORTG_INTB, IRQ_MAC_TX}; +#if defined(CONFIG_PM) +static struct gpio_port_s gpio_bank_saved[GPIO_BANK_NUM]; +# ifdef BF538_FAMILY +static unsigned short port_fer_saved[3]; +# endif #endif -#ifdef BF527_FAMILY -static unsigned int sic_iwr_irqs[gpio_bank(MAX_BLACKFIN_GPIOS)] = {IRQ_PORTF_INTB, IRQ_PORTG_INTB, IRQ_PORTH_INTB}; -#endif - -#ifdef BF561_FAMILY -static unsigned int sic_iwr_irqs[gpio_bank(MAX_BLACKFIN_GPIOS)] = {IRQ_PROG0_INTB, IRQ_PROG1_INTB, IRQ_PROG2_INTB}; -#endif - -#endif /* CONFIG_PM */ - -#if defined(BF548_FAMILY) -inline int check_gpio(unsigned gpio) -{ - if (gpio == GPIO_PB15 || gpio == GPIO_PC14 || gpio == GPIO_PC15 - || gpio == GPIO_PH14 || gpio == GPIO_PH15 - || gpio == GPIO_PJ14 || gpio == GPIO_PJ15 - || gpio > MAX_BLACKFIN_GPIOS) - return -EINVAL; - return 0; -} -#else -inline int check_gpio(unsigned gpio) -{ - if (gpio >= MAX_BLACKFIN_GPIOS) - return -EINVAL; - return 0; -} -#endif - -void gpio_error(unsigned gpio) +static void gpio_error(unsigned gpio) { printk(KERN_ERR "bfin-gpio: GPIO %d wasn't requested!\n", gpio); } static void set_label(unsigned short ident, const char *label) { - if (label && str_ident) { + if (label) { strncpy(str_ident[ident].name, label, RESOURCE_LABEL_SIZE); str_ident[ident].name[RESOURCE_LABEL_SIZE - 1] = 0; @@ -244,9 +125,6 @@ static void set_label(unsigned short ident, const char *label) static char *get_label(unsigned short ident) { - if (!str_ident) - return "UNKNOWN"; - return (*str_ident[ident].name ? str_ident[ident].name : "UNKNOWN"); } @@ -257,136 +135,189 @@ static int cmp_label(unsigned short ident, const char *label) printk(KERN_ERR "Please provide none-null label\n"); } - if (label && str_ident) - return strncmp(str_ident[ident].name, - label, strlen(label)); + if (label) + return strcmp(str_ident[ident].name, label); else return -EINVAL; } -#if defined(BF527_FAMILY) || defined(BF537_FAMILY) -static void port_setup(unsigned gpio, unsigned short usage) +#define map_entry(m, i) reserved_##m##_map[gpio_bank(i)] +#define is_reserved(m, i, e) (map_entry(m, i) & gpio_bit(i)) +#define reserve(m, i) (map_entry(m, i) |= gpio_bit(i)) +#define unreserve(m, i) (map_entry(m, i) &= ~gpio_bit(i)) +#define DECLARE_RESERVED_MAP(m, c) static unsigned short reserved_##m##_map[c] + +DECLARE_RESERVED_MAP(gpio, GPIO_BANK_NUM); +DECLARE_RESERVED_MAP(peri, DIV_ROUND_UP(MAX_RESOURCES, GPIO_BANKSIZE)); +DECLARE_RESERVED_MAP(gpio_irq, GPIO_BANK_NUM); + +inline int check_gpio(unsigned gpio) { - if (!check_gpio(gpio)) { - if (usage == GPIO_USAGE) - *port_fer[gpio_bank(gpio)] &= ~gpio_bit(gpio); - else - *port_fer[gpio_bank(gpio)] |= gpio_bit(gpio); - SSYNC(); - } + if (gpio >= MAX_BLACKFIN_GPIOS) + return -EINVAL; + return 0; } -#elif defined(BF548_FAMILY) + static void port_setup(unsigned gpio, unsigned short usage) { +#if defined(BF538_FAMILY) + /* + * BF538/9 Port C,D and E are special. + * Inverted PORT_FER polarity on CDE and no PORF_FER on F + * Regular PORT F GPIOs are handled here, CDE are exclusively + * managed by GPIOLIB + */ + + if (gpio < MAX_BLACKFIN_GPIOS || gpio >= MAX_RESOURCES) + return; + + gpio -= MAX_BLACKFIN_GPIOS; + if (usage == GPIO_USAGE) - gpio_array[gpio_bank(gpio)]->port_fer &= ~gpio_bit(gpio); + *port_fer[gpio_bank(gpio)] |= gpio_bit(gpio); else - gpio_array[gpio_bank(gpio)]->port_fer |= gpio_bit(gpio); + *port_fer[gpio_bank(gpio)] &= ~gpio_bit(gpio); SSYNC(); -} -#else -# define port_setup(...) do { } while (0) + return; #endif + if (check_gpio(gpio)) + return; + +#if defined(CONFIG_BF52x) || defined(BF537_FAMILY) || defined(CONFIG_BF51x) + if (usage == GPIO_USAGE) + *port_fer[gpio_bank(gpio)] &= ~gpio_bit(gpio); + else + *port_fer[gpio_bank(gpio)] |= gpio_bit(gpio); + SSYNC(); +#endif +} + #ifdef BF537_FAMILY -static struct { - unsigned short res; - unsigned short offset; -} port_mux_lut[] = { - {.res = P_PPI0_D13, .offset = 11}, - {.res = P_PPI0_D14, .offset = 11}, - {.res = P_PPI0_D15, .offset = 11}, - {.res = P_SPORT1_TFS, .offset = 11}, - {.res = P_SPORT1_TSCLK, .offset = 11}, - {.res = P_SPORT1_DTPRI, .offset = 11}, - {.res = P_PPI0_D10, .offset = 10}, - {.res = P_PPI0_D11, .offset = 10}, - {.res = P_PPI0_D12, .offset = 10}, - {.res = P_SPORT1_RSCLK, .offset = 10}, - {.res = P_SPORT1_RFS, .offset = 10}, - {.res = P_SPORT1_DRPRI, .offset = 10}, - {.res = P_PPI0_D8, .offset = 9}, - {.res = P_PPI0_D9, .offset = 9}, - {.res = P_SPORT1_DRSEC, .offset = 9}, - {.res = P_SPORT1_DTSEC, .offset = 9}, - {.res = P_TMR2, .offset = 8}, - {.res = P_PPI0_FS3, .offset = 8}, - {.res = P_TMR3, .offset = 7}, - {.res = P_SPI0_SSEL4, .offset = 7}, - {.res = P_TMR4, .offset = 6}, - {.res = P_SPI0_SSEL5, .offset = 6}, - {.res = P_TMR5, .offset = 5}, - {.res = P_SPI0_SSEL6, .offset = 5}, - {.res = P_UART1_RX, .offset = 4}, - {.res = P_UART1_TX, .offset = 4}, - {.res = P_TMR6, .offset = 4}, - {.res = P_TMR7, .offset = 4}, - {.res = P_UART0_RX, .offset = 3}, - {.res = P_UART0_TX, .offset = 3}, - {.res = P_DMAR0, .offset = 3}, - {.res = P_DMAR1, .offset = 3}, - {.res = P_SPORT0_DTSEC, .offset = 1}, - {.res = P_SPORT0_DRSEC, .offset = 1}, - {.res = P_CAN0_RX, .offset = 1}, - {.res = P_CAN0_TX, .offset = 1}, - {.res = P_SPI0_SSEL7, .offset = 1}, - {.res = P_SPORT0_TFS, .offset = 0}, - {.res = P_SPORT0_DTPRI, .offset = 0}, - {.res = P_SPI0_SSEL2, .offset = 0}, - {.res = P_SPI0_SSEL3, .offset = 0}, +static const s8 port_mux[] = { + [GPIO_PF0] = 3, + [GPIO_PF1] = 3, + [GPIO_PF2] = 4, + [GPIO_PF3] = 4, + [GPIO_PF4] = 5, + [GPIO_PF5] = 6, + [GPIO_PF6] = 7, + [GPIO_PF7] = 8, + [GPIO_PF8 ... GPIO_PF15] = -1, + [GPIO_PG0 ... GPIO_PG7] = -1, + [GPIO_PG8] = 9, + [GPIO_PG9] = 9, + [GPIO_PG10] = 10, + [GPIO_PG11] = 10, + [GPIO_PG12] = 10, + [GPIO_PG13] = 11, + [GPIO_PG14] = 11, + [GPIO_PG15] = 11, + [GPIO_PH0 ... GPIO_PH15] = -1, + [PORT_PJ0 ... PORT_PJ3] = -1, + [PORT_PJ4] = 1, + [PORT_PJ5] = 1, + [PORT_PJ6 ... PORT_PJ9] = -1, + [PORT_PJ10] = 0, + [PORT_PJ11] = 0, }; -static void portmux_setup(unsigned short per, unsigned short function) +static int portmux_group_check(unsigned short per) { - u16 y, offset, muxreg; - - for (y = 0; y < ARRAY_SIZE(port_mux_lut); y++) { - if (port_mux_lut[y].res == per) { + u16 ident = P_IDENT(per); + u16 function = P_FUNCT2MUX(per); + s8 offset = port_mux[ident]; + u16 m, pmux, pfunc, mask; - /* SET PORTMUX REG */ + if (offset < 0) + return 0; - offset = port_mux_lut[y].offset; - muxreg = bfin_read_PORT_MUX(); + pmux = bfin_read_PORT_MUX(); + for (m = 0; m < ARRAY_SIZE(port_mux); ++m) { + if (m == ident) + continue; + if (port_mux[m] != offset) + continue; + if (!is_reserved(peri, m, 1)) + continue; - if (offset != 1) { - muxreg &= ~(1 << offset); - } else { - muxreg &= ~(3 << 1); - } + if (offset == 1) + mask = 3; + else + mask = 1; - muxreg |= (function << offset); - bfin_write_PORT_MUX(muxreg); + pfunc = (pmux >> offset) & mask; + if (pfunc != (function & mask)) { + pr_err("pin group conflict! request pin %d func %d conflict with pin %d func %d\n", + ident, function, m, pfunc); + return -EINVAL; } } + + return 0; } -#elif defined(BF548_FAMILY) -inline void portmux_setup(unsigned short portno, unsigned short function) + +static void portmux_setup(unsigned short per) { - u32 pmux; + u16 ident = P_IDENT(per); + u16 function = P_FUNCT2MUX(per); + s8 offset = port_mux[ident]; + u16 pmux, mask; - pmux = gpio_array[gpio_bank(portno)]->port_mux; + if (offset == -1) + return; - pmux &= ~(0x3 << (2 * gpio_sub_n(portno))); - pmux |= (function & 0x3) << (2 * gpio_sub_n(portno)); + pmux = bfin_read_PORT_MUX(); + if (offset == 1) + mask = 3; + else + mask = 1; - gpio_array[gpio_bank(portno)]->port_mux = pmux; -} + pmux &= ~(mask << offset); + pmux |= ((function & mask) << offset); -inline u16 get_portmux(unsigned short portno) + bfin_write_PORT_MUX(pmux); +} +#elif defined(CONFIG_BF52x) || defined(CONFIG_BF51x) +static int portmux_group_check(unsigned short per) { - u32 pmux; + u16 ident = P_IDENT(per); + u16 function = P_FUNCT2MUX(per); + u8 offset = pmux_offset[gpio_bank(ident)][gpio_sub_n(ident)]; + u16 pin, gpiopin, pfunc; - pmux = gpio_array[gpio_bank(portno)]->port_mux; + for (pin = 0; pin < GPIO_BANKSIZE; ++pin) { + if (offset != pmux_offset[gpio_bank(ident)][pin]) + continue; + + gpiopin = gpio_bank(ident) * GPIO_BANKSIZE + pin; + if (gpiopin == ident) + continue; + if (!is_reserved(peri, gpiopin, 1)) + continue; + + pfunc = *port_mux[gpio_bank(ident)]; + pfunc = (pfunc >> offset) & 3; + if (pfunc != function) { + pr_err("pin group conflict! request pin %d func %d conflict with pin %d func %d\n", + ident, function, gpiopin, pfunc); + return -EINVAL; + } + } - return (pmux >> (2 * gpio_sub_n(portno)) & 0x3); + return 0; } -#elif defined(BF527_FAMILY) -inline void portmux_setup(unsigned short portno, unsigned short function) + +inline void portmux_setup(unsigned short per) { - u16 pmux, ident = P_IDENT(portno); + u16 ident = P_IDENT(per); + u16 function = P_FUNCT2MUX(per); u8 offset = pmux_offset[gpio_bank(ident)][gpio_sub_n(ident)]; + u16 pmux; pmux = *port_mux[gpio_bank(ident)]; + if (((pmux >> offset) & 3) == function) + return; pmux &= ~(3 << offset); pmux |= (function & 3) << offset; *port_mux[gpio_bank(ident)] = pmux; @@ -394,46 +325,12 @@ inline void portmux_setup(unsigned short portno, unsigned short function) } #else # define portmux_setup(...) do { } while (0) -#endif - -#ifndef BF548_FAMILY -static void default_gpio(unsigned gpio) +static int portmux_group_check(unsigned short per) { - unsigned short bank, bitmask; - unsigned long flags; - - bank = gpio_bank(gpio); - bitmask = gpio_bit(gpio); - - local_irq_save(flags); - - gpio_bankb[bank]->maska_clear = bitmask; - gpio_bankb[bank]->maskb_clear = bitmask; - SSYNC(); - gpio_bankb[bank]->inen &= ~bitmask; - gpio_bankb[bank]->dir &= ~bitmask; - gpio_bankb[bank]->polar &= ~bitmask; - gpio_bankb[bank]->both &= ~bitmask; - gpio_bankb[bank]->edge &= ~bitmask; - AWA_DUMMY_READ(edge); - local_irq_restore(flags); -} -#else -# define default_gpio(...) do { } while (0) -#endif - -static int __init bfin_gpio_init(void) -{ - - printk(KERN_INFO "Blackfin GPIO Controller\n"); - return 0; - } -arch_initcall(bfin_gpio_init); - +#endif -#ifndef BF548_FAMILY /*********************************************************** * * FUNCTIONS: Blackfin General Purpose Ports Access Functions @@ -457,92 +354,73 @@ arch_initcall(bfin_gpio_init); void set_gpio_ ## name(unsigned gpio, unsigned short arg) \ { \ unsigned long flags; \ - local_irq_save(flags); \ + flags = hard_local_irq_save(); \ if (arg) \ - gpio_bankb[gpio_bank(gpio)]->name |= gpio_bit(gpio); \ + gpio_array[gpio_bank(gpio)]->name |= gpio_bit(gpio); \ else \ - gpio_bankb[gpio_bank(gpio)]->name &= ~gpio_bit(gpio); \ + gpio_array[gpio_bank(gpio)]->name &= ~gpio_bit(gpio); \ AWA_DUMMY_READ(name); \ - local_irq_restore(flags); \ + hard_local_irq_restore(flags); \ } \ EXPORT_SYMBOL(set_gpio_ ## name); -SET_GPIO(dir) -SET_GPIO(inen) -SET_GPIO(polar) -SET_GPIO(edge) -SET_GPIO(both) +SET_GPIO(dir) /* set_gpio_dir() */ +SET_GPIO(inen) /* set_gpio_inen() */ +SET_GPIO(polar) /* set_gpio_polar() */ +SET_GPIO(edge) /* set_gpio_edge() */ +SET_GPIO(both) /* set_gpio_both() */ -#if ANOMALY_05000311 || ANOMALY_05000323 #define SET_GPIO_SC(name) \ void set_gpio_ ## name(unsigned gpio, unsigned short arg) \ { \ unsigned long flags; \ - local_irq_save(flags); \ + if (ANOMALY_05000311 || ANOMALY_05000323) \ + flags = hard_local_irq_save(); \ if (arg) \ - gpio_bankb[gpio_bank(gpio)]->name ## _set = gpio_bit(gpio); \ + gpio_array[gpio_bank(gpio)]->name ## _set = gpio_bit(gpio); \ else \ - gpio_bankb[gpio_bank(gpio)]->name ## _clear = gpio_bit(gpio); \ - AWA_DUMMY_READ(name); \ - local_irq_restore(flags); \ + gpio_array[gpio_bank(gpio)]->name ## _clear = gpio_bit(gpio); \ + if (ANOMALY_05000311 || ANOMALY_05000323) { \ + AWA_DUMMY_READ(name); \ + hard_local_irq_restore(flags); \ + } \ } \ EXPORT_SYMBOL(set_gpio_ ## name); -#else -#define SET_GPIO_SC(name) \ -void set_gpio_ ## name(unsigned gpio, unsigned short arg) \ -{ \ - if (arg) \ - gpio_bankb[gpio_bank(gpio)]->name ## _set = gpio_bit(gpio); \ - else \ - gpio_bankb[gpio_bank(gpio)]->name ## _clear = gpio_bit(gpio); \ -} \ -EXPORT_SYMBOL(set_gpio_ ## name); -#endif SET_GPIO_SC(maska) SET_GPIO_SC(maskb) SET_GPIO_SC(data) -#if ANOMALY_05000311 || ANOMALY_05000323 void set_gpio_toggle(unsigned gpio) { unsigned long flags; - local_irq_save(flags); - gpio_bankb[gpio_bank(gpio)]->toggle = gpio_bit(gpio); - AWA_DUMMY_READ(toggle); - local_irq_restore(flags); -} -#else -void set_gpio_toggle(unsigned gpio) -{ - gpio_bankb[gpio_bank(gpio)]->toggle = gpio_bit(gpio); + if (ANOMALY_05000311 || ANOMALY_05000323) + flags = hard_local_irq_save(); + gpio_array[gpio_bank(gpio)]->toggle = gpio_bit(gpio); + if (ANOMALY_05000311 || ANOMALY_05000323) { + AWA_DUMMY_READ(toggle); + hard_local_irq_restore(flags); + } } -#endif EXPORT_SYMBOL(set_gpio_toggle); /*Set current PORT date (16-bit word)*/ -#if ANOMALY_05000311 || ANOMALY_05000323 #define SET_GPIO_P(name) \ void set_gpiop_ ## name(unsigned gpio, unsigned short arg) \ { \ unsigned long flags; \ - local_irq_save(flags); \ - gpio_bankb[gpio_bank(gpio)]->name = arg; \ - AWA_DUMMY_READ(name); \ - local_irq_restore(flags); \ -} \ -EXPORT_SYMBOL(set_gpiop_ ## name); -#else -#define SET_GPIO_P(name) \ -void set_gpiop_ ## name(unsigned gpio, unsigned short arg) \ -{ \ - gpio_bankb[gpio_bank(gpio)]->name = arg; \ + if (ANOMALY_05000311 || ANOMALY_05000323) \ + flags = hard_local_irq_save(); \ + gpio_array[gpio_bank(gpio)]->name = arg; \ + if (ANOMALY_05000311 || ANOMALY_05000323) { \ + AWA_DUMMY_READ(name); \ + hard_local_irq_restore(flags); \ + } \ } \ EXPORT_SYMBOL(set_gpiop_ ## name); -#endif SET_GPIO_P(data) SET_GPIO_P(dir) @@ -554,27 +432,21 @@ SET_GPIO_P(maska) SET_GPIO_P(maskb) /* Get a specific bit */ -#if ANOMALY_05000311 || ANOMALY_05000323 #define GET_GPIO(name) \ unsigned short get_gpio_ ## name(unsigned gpio) \ { \ unsigned long flags; \ unsigned short ret; \ - local_irq_save(flags); \ - ret = 0x01 & (gpio_bankb[gpio_bank(gpio)]->name >> gpio_sub_n(gpio)); \ - AWA_DUMMY_READ(name); \ - local_irq_restore(flags); \ + if (ANOMALY_05000311 || ANOMALY_05000323) \ + flags = hard_local_irq_save(); \ + ret = 0x01 & (gpio_array[gpio_bank(gpio)]->name >> gpio_sub_n(gpio)); \ + if (ANOMALY_05000311 || ANOMALY_05000323) { \ + AWA_DUMMY_READ(name); \ + hard_local_irq_restore(flags); \ + } \ return ret; \ } \ EXPORT_SYMBOL(get_gpio_ ## name); -#else -#define GET_GPIO(name) \ -unsigned short get_gpio_ ## name(unsigned gpio) \ -{ \ - return (0x01 & (gpio_bankb[gpio_bank(gpio)]->name >> gpio_sub_n(gpio))); \ -} \ -EXPORT_SYMBOL(get_gpio_ ## name); -#endif GET_GPIO(data) GET_GPIO(dir) @@ -587,27 +459,21 @@ GET_GPIO(maskb) /*Get current PORT date (16-bit word)*/ -#if ANOMALY_05000311 || ANOMALY_05000323 #define GET_GPIO_P(name) \ unsigned short get_gpiop_ ## name(unsigned gpio) \ { \ unsigned long flags; \ unsigned short ret; \ - local_irq_save(flags); \ - ret = (gpio_bankb[gpio_bank(gpio)]->name); \ - AWA_DUMMY_READ(name); \ - local_irq_restore(flags); \ + if (ANOMALY_05000311 || ANOMALY_05000323) \ + flags = hard_local_irq_save(); \ + ret = (gpio_array[gpio_bank(gpio)]->name); \ + if (ANOMALY_05000311 || ANOMALY_05000323) { \ + AWA_DUMMY_READ(name); \ + hard_local_irq_restore(flags); \ + } \ return ret; \ } \ EXPORT_SYMBOL(get_gpiop_ ## name); -#else -#define GET_GPIO_P(name) \ -unsigned short get_gpiop_ ## name(unsigned gpio) \ -{ \ - return (gpio_bankb[gpio_bank(gpio)]->name);\ -} \ -EXPORT_SYMBOL(get_gpiop_ ## name); -#endif GET_GPIO_P(data) GET_GPIO_P(dir) @@ -620,6 +486,24 @@ GET_GPIO_P(maskb) #ifdef CONFIG_PM +DECLARE_RESERVED_MAP(wakeup, GPIO_BANK_NUM); + +static const unsigned int sic_iwr_irqs[] = { +#if defined(BF533_FAMILY) + IRQ_PROG_INTB +#elif defined(BF537_FAMILY) + IRQ_PF_INTB_WATCH, IRQ_PORTG_INTB, IRQ_PH_INTB_MAC_TX +#elif defined(BF538_FAMILY) + IRQ_PORTF_INTB +#elif defined(CONFIG_BF52x) || defined(CONFIG_BF51x) + IRQ_PORTF_INTB, IRQ_PORTG_INTB, IRQ_PORTH_INTB +#elif defined(BF561_FAMILY) + IRQ_PROG0_INTB, IRQ_PROG1_INTB, IRQ_PROG2_INTB +#else +# error no SIC_IWR defined +#endif +}; + /*********************************************************** * * FUNCTIONS: Blackfin PM Setup API @@ -639,153 +523,120 @@ GET_GPIO_P(maskb) ************************************************************* * MODIFICATION HISTORY : **************************************************************/ -int gpio_pm_wakeup_request(unsigned gpio, unsigned char type) -{ - unsigned long flags; - - if ((check_gpio(gpio) < 0) || !type) - return -EINVAL; - - local_irq_save(flags); - wakeup_map[gpio_bank(gpio)] |= gpio_bit(gpio); - wakeup_flags_map[gpio] = type; - local_irq_restore(flags); - - return 0; -} -EXPORT_SYMBOL(gpio_pm_wakeup_request); - -void gpio_pm_wakeup_free(unsigned gpio) +int bfin_gpio_pm_wakeup_ctrl(unsigned gpio, unsigned ctrl) { unsigned long flags; if (check_gpio(gpio) < 0) - return; + return -EINVAL; - local_irq_save(flags); + flags = hard_local_irq_save(); + if (ctrl) + reserve(wakeup, gpio); + else + unreserve(wakeup, gpio); - wakeup_map[gpio_bank(gpio)] &= ~gpio_bit(gpio); + set_gpio_maskb(gpio, ctrl); + hard_local_irq_restore(flags); - local_irq_restore(flags); + return 0; } -EXPORT_SYMBOL(gpio_pm_wakeup_free); -static int bfin_gpio_wakeup_type(unsigned gpio, unsigned char type) +int bfin_gpio_pm_standby_ctrl(unsigned ctrl) { - port_setup(gpio, GPIO_USAGE); - set_gpio_dir(gpio, 0); - set_gpio_inen(gpio, 1); - - if (type & (PM_WAKE_RISING | PM_WAKE_FALLING)) - set_gpio_edge(gpio, 1); - else - set_gpio_edge(gpio, 0); - - if ((type & (PM_WAKE_BOTH_EDGES)) == (PM_WAKE_BOTH_EDGES)) - set_gpio_both(gpio, 1); - else - set_gpio_both(gpio, 0); - - if ((type & (PM_WAKE_FALLING | PM_WAKE_LOW))) - set_gpio_polar(gpio, 1); - else - set_gpio_polar(gpio, 0); + u16 bank, mask, i; - SSYNC(); + for (i = 0; i < MAX_BLACKFIN_GPIOS; i += GPIO_BANKSIZE) { + mask = map_entry(wakeup, i); + bank = gpio_bank(i); + if (mask) + bfin_internal_set_wake(sic_iwr_irqs[bank], ctrl); + } return 0; } -u32 bfin_pm_setup(void) +void bfin_gpio_pm_hibernate_suspend(void) { - u16 bank, mask, i, gpio; + int i, bank; + +#ifdef BF538_FAMILY + for (i = 0; i < ARRAY_SIZE(port_fer_saved); ++i) + port_fer_saved[i] = *port_fer[i]; +#endif for (i = 0; i < MAX_BLACKFIN_GPIOS; i += GPIO_BANKSIZE) { - mask = wakeup_map[gpio_bank(i)]; bank = gpio_bank(i); - gpio_bank_saved[bank].maskb = gpio_bankb[bank]->maskb; - gpio_bankb[bank]->maskb = 0; - - if (mask) { -#ifdef BF537_FAMILY - gpio_bank_saved[bank].fer = *port_fer[bank]; +#if defined(CONFIG_BF52x) || defined(BF537_FAMILY) || defined(CONFIG_BF51x) + gpio_bank_saved[bank].fer = *port_fer[bank]; +#if defined(CONFIG_BF52x) || defined(CONFIG_BF51x) + gpio_bank_saved[bank].mux = *port_mux[bank]; +#else + if (bank == 0) + gpio_bank_saved[bank].mux = bfin_read_PORT_MUX(); #endif - gpio_bank_saved[bank].inen = gpio_bankb[bank]->inen; - gpio_bank_saved[bank].polar = gpio_bankb[bank]->polar; - gpio_bank_saved[bank].dir = gpio_bankb[bank]->dir; - gpio_bank_saved[bank].edge = gpio_bankb[bank]->edge; - gpio_bank_saved[bank].both = gpio_bankb[bank]->both; - gpio_bank_saved[bank].reserved = - reserved_gpio_map[bank]; - - gpio = i; - - while (mask) { - if ((mask & 1) && (wakeup_flags_map[gpio] != - PM_WAKE_IGNORE)) { - reserved_gpio_map[gpio_bank(gpio)] |= - gpio_bit(gpio); - bfin_gpio_wakeup_type(gpio, - wakeup_flags_map[gpio]); - set_gpio_data(gpio, 0); /*Clear*/ - } - gpio++; - mask >>= 1; - } - - bfin_internal_set_wake(sic_iwr_irqs[bank], 1); - gpio_bankb[bank]->maskb_set = wakeup_map[gpio_bank(i)]; - } +#endif + gpio_bank_saved[bank].data = gpio_array[bank]->data; + gpio_bank_saved[bank].inen = gpio_array[bank]->inen; + gpio_bank_saved[bank].polar = gpio_array[bank]->polar; + gpio_bank_saved[bank].dir = gpio_array[bank]->dir; + gpio_bank_saved[bank].edge = gpio_array[bank]->edge; + gpio_bank_saved[bank].both = gpio_array[bank]->both; + gpio_bank_saved[bank].maska = gpio_array[bank]->maska; } - AWA_DUMMY_READ(maskb_set); +#ifdef BFIN_SPECIAL_GPIO_BANKS + bfin_special_gpio_pm_hibernate_suspend(); +#endif - return 0; + AWA_DUMMY_READ(maska); } -void bfin_pm_restore(void) +void bfin_gpio_pm_hibernate_restore(void) { - u16 bank, mask, i; + int i, bank; + +#ifdef BF538_FAMILY + for (i = 0; i < ARRAY_SIZE(port_fer_saved); ++i) + *port_fer[i] = port_fer_saved[i]; +#endif for (i = 0; i < MAX_BLACKFIN_GPIOS; i += GPIO_BANKSIZE) { - mask = wakeup_map[gpio_bank(i)]; bank = gpio_bank(i); - if (mask) { -#ifdef BF537_FAMILY - *port_fer[bank] = gpio_bank_saved[bank].fer; +#if defined(CONFIG_BF52x) || defined(BF537_FAMILY) || defined(CONFIG_BF51x) +#if defined(CONFIG_BF52x) || defined(CONFIG_BF51x) + *port_mux[bank] = gpio_bank_saved[bank].mux; +#else + if (bank == 0) + bfin_write_PORT_MUX(gpio_bank_saved[bank].mux); #endif - gpio_bankb[bank]->inen = gpio_bank_saved[bank].inen; - gpio_bankb[bank]->dir = gpio_bank_saved[bank].dir; - gpio_bankb[bank]->polar = gpio_bank_saved[bank].polar; - gpio_bankb[bank]->edge = gpio_bank_saved[bank].edge; - gpio_bankb[bank]->both = gpio_bank_saved[bank].both; - - reserved_gpio_map[bank] = - gpio_bank_saved[bank].reserved; - bfin_internal_set_wake(sic_iwr_irqs[bank], 0); - } - - gpio_bankb[bank]->maskb = gpio_bank_saved[bank].maskb; + *port_fer[bank] = gpio_bank_saved[bank].fer; +#endif + gpio_array[bank]->inen = gpio_bank_saved[bank].inen; + gpio_array[bank]->data_set = gpio_bank_saved[bank].data + & gpio_bank_saved[bank].dir; + gpio_array[bank]->dir = gpio_bank_saved[bank].dir; + gpio_array[bank]->polar = gpio_bank_saved[bank].polar; + gpio_array[bank]->edge = gpio_bank_saved[bank].edge; + gpio_array[bank]->both = gpio_bank_saved[bank].both; + gpio_array[bank]->maska = gpio_bank_saved[bank].maska; } - AWA_DUMMY_READ(maskb); -} +#ifdef BFIN_SPECIAL_GPIO_BANKS + bfin_special_gpio_pm_hibernate_restore(); #endif -#else /* BF548_FAMILY */ -unsigned short get_gpio_dir(unsigned gpio) -{ - return (0x01 & (gpio_array[gpio_bank(gpio)]->port_dir_clear >> gpio_sub_n(gpio))); + AWA_DUMMY_READ(maska); } -EXPORT_SYMBOL(get_gpio_dir); -#endif /* BF548_FAMILY */ + +#endif /*********************************************************** * -* FUNCTIONS: Blackfin Peripheral Resource Allocation +* FUNCTIONS: Blackfin Peripheral Resource Allocation * and PortMux Setup * * INPUTS/OUTPUTS: @@ -799,7 +650,6 @@ EXPORT_SYMBOL(get_gpio_dir); * MODIFICATION HISTORY : **************************************************************/ -#ifdef BF548_FAMILY int peripheral_request(unsigned short per, const char *label) { unsigned long flags; @@ -815,136 +665,67 @@ int peripheral_request(unsigned short per, const char *label) if (!(per & P_DEFINED)) return -ENODEV; - if (check_gpio(ident) < 0) - return -EINVAL; + BUG_ON(ident >= MAX_RESOURCES); - local_irq_save(flags); + flags = hard_local_irq_save(); - if (unlikely(reserved_gpio_map[gpio_bank(ident)] & gpio_bit(ident))) { + /* If a pin can be muxed as either GPIO or peripheral, make + * sure it is not already a GPIO pin when we request it. + */ + if (unlikely(!check_gpio(ident) && is_reserved(gpio, ident, 1))) { + if (system_state == SYSTEM_BOOTING) + dump_stack(); printk(KERN_ERR - "%s: Peripheral %d is already reserved as GPIO by %s !\n", - __FUNCTION__, ident, get_label(ident)); - dump_stack(); - local_irq_restore(flags); + "%s: Peripheral %d is already reserved as GPIO by %s !\n", + __func__, ident, get_label(ident)); + hard_local_irq_restore(flags); return -EBUSY; } - if (unlikely(reserved_peri_map[gpio_bank(ident)] & gpio_bit(ident))) { - - u16 funct = get_portmux(ident); - - /* - * Pin functions like AMC address strobes my - * be requested and used by several drivers - */ - - if (!((per & P_MAYSHARE) && (funct == P_FUNCT2MUX(per)))) { + if (unlikely(is_reserved(peri, ident, 1))) { /* - * Allow that the identical pin function can - * be requested from the same driver twice + * Pin functions like AMC address strobes my + * be requested and used by several drivers */ - if (cmp_label(ident, label) == 0) - goto anyway; + if (!(per & P_MAYSHARE)) { + /* + * Allow that the identical pin function can + * be requested from the same driver twice + */ + + if (cmp_label(ident, label) == 0) + goto anyway; + if (system_state == SYSTEM_BOOTING) + dump_stack(); printk(KERN_ERR "%s: Peripheral %d function %d is already reserved by %s !\n", - __FUNCTION__, ident, P_FUNCT2MUX(per), get_label(ident)); - dump_stack(); - local_irq_restore(flags); + __func__, ident, P_FUNCT2MUX(per), get_label(ident)); + hard_local_irq_restore(flags); return -EBUSY; } } -anyway: - reserved_peri_map[gpio_bank(ident)] |= gpio_bit(ident); - - portmux_setup(ident, P_FUNCT2MUX(per)); - port_setup(ident, PERIPHERAL_USAGE); - - local_irq_restore(flags); - set_label(ident, label); - - return 0; -} -EXPORT_SYMBOL(peripheral_request); -#else - -int peripheral_request(unsigned short per, const char *label) -{ - unsigned long flags; - unsigned short ident = P_IDENT(per); - - /* - * Don't cares are pins with only one dedicated function - */ - - if (per & P_DONTCARE) - return 0; - - if (!(per & P_DEFINED)) - return -ENODEV; - - local_irq_save(flags); - - if (!check_gpio(ident)) { - - if (unlikely(reserved_gpio_map[gpio_bank(ident)] & gpio_bit(ident))) { - printk(KERN_ERR - "%s: Peripheral %d is already reserved as GPIO by %s !\n", - __FUNCTION__, ident, get_label(ident)); - dump_stack(); - local_irq_restore(flags); + if (unlikely(portmux_group_check(per))) { + hard_local_irq_restore(flags); return -EBUSY; } + anyway: + reserve(peri, ident); - } - - if (unlikely(reserved_peri_map[gpio_bank(ident)] & gpio_bit(ident))) { - - /* - * Pin functions like AMC address strobes my - * be requested and used by several drivers - */ - - if (!(per & P_MAYSHARE)) { - - /* - * Allow that the identical pin function can - * be requested from the same driver twice - */ - - if (cmp_label(ident, label) == 0) - goto anyway; - - printk(KERN_ERR - "%s: Peripheral %d function %d is already" - " reserved by %s !\n", - __FUNCTION__, ident, P_FUNCT2MUX(per), - get_label(ident)); - dump_stack(); - local_irq_restore(flags); - return -EBUSY; - } - - } - -anyway: - portmux_setup(per, P_FUNCT2MUX(per)); - + portmux_setup(per); port_setup(ident, PERIPHERAL_USAGE); - reserved_peri_map[gpio_bank(ident)] |= gpio_bit(ident); - local_irq_restore(flags); + hard_local_irq_restore(flags); set_label(ident, label); return 0; } EXPORT_SYMBOL(peripheral_request); -#endif -int peripheral_request_list(unsigned short per[], const char *label) +int peripheral_request_list(const unsigned short per[], const char *label) { u16 cnt; int ret; @@ -954,10 +735,10 @@ int peripheral_request_list(unsigned short per[], const char *label) ret = peripheral_request(per[cnt], label); if (ret < 0) { - for ( ; cnt > 0; cnt--) { + for ( ; cnt > 0; cnt--) peripheral_free(per[cnt - 1]); - } - return ret; + + return ret; } } @@ -976,37 +757,29 @@ void peripheral_free(unsigned short per) if (!(per & P_DEFINED)) return; - if (check_gpio(ident) < 0) - return; - - local_irq_save(flags); + flags = hard_local_irq_save(); - if (unlikely(!(reserved_peri_map[gpio_bank(ident)] - & gpio_bit(ident)))) { - local_irq_restore(flags); + if (unlikely(!is_reserved(peri, ident, 0))) { + hard_local_irq_restore(flags); return; } - if (!(per & P_MAYSHARE)) { + if (!(per & P_MAYSHARE)) port_setup(ident, GPIO_USAGE); - } - reserved_peri_map[gpio_bank(ident)] &= ~gpio_bit(ident); + unreserve(peri, ident); set_label(ident, "free"); - local_irq_restore(flags); + hard_local_irq_restore(flags); } EXPORT_SYMBOL(peripheral_free); -void peripheral_free_list(unsigned short per[]) +void peripheral_free_list(const unsigned short per[]) { u16 cnt; - - for (cnt = 0; per[cnt] != 0; cnt++) { + for (cnt = 0; per[cnt] != 0; cnt++) peripheral_free(per[cnt]); - } - } EXPORT_SYMBOL(peripheral_free_list); @@ -1025,14 +798,14 @@ EXPORT_SYMBOL(peripheral_free_list); * MODIFICATION HISTORY : **************************************************************/ -int gpio_request(unsigned gpio, const char *label) +int bfin_gpio_request(unsigned gpio, const char *label) { unsigned long flags; if (check_gpio(gpio) < 0) return -EINVAL; - local_irq_save(flags); + flags = hard_local_irq_save(); /* * Allow that the identical GPIO can @@ -1041,162 +814,275 @@ int gpio_request(unsigned gpio, const char *label) */ if (cmp_label(gpio, label) == 0) { - local_irq_restore(flags); + hard_local_irq_restore(flags); return 0; } - if (unlikely(reserved_gpio_map[gpio_bank(gpio)] & gpio_bit(gpio))) { + if (unlikely(is_reserved(gpio, gpio, 1))) { + if (system_state == SYSTEM_BOOTING) + dump_stack(); printk(KERN_ERR "bfin-gpio: GPIO %d is already reserved by %s !\n", - gpio, get_label(gpio)); - dump_stack(); - local_irq_restore(flags); + gpio, get_label(gpio)); + hard_local_irq_restore(flags); return -EBUSY; } - if (unlikely(reserved_peri_map[gpio_bank(gpio)] & gpio_bit(gpio))) { + if (unlikely(is_reserved(peri, gpio, 1))) { + if (system_state == SYSTEM_BOOTING) + dump_stack(); printk(KERN_ERR "bfin-gpio: GPIO %d is already reserved as Peripheral by %s !\n", gpio, get_label(gpio)); - dump_stack(); - local_irq_restore(flags); + hard_local_irq_restore(flags); return -EBUSY; } + if (unlikely(is_reserved(gpio_irq, gpio, 1))) { + printk(KERN_NOTICE "bfin-gpio: GPIO %d is already reserved as gpio-irq!" + " (Documentation/blackfin/bfin-gpio-notes.txt)\n", gpio); + } else { /* Reset POLAR setting when acquiring a gpio for the first time */ + set_gpio_polar(gpio, 0); + } - reserved_gpio_map[gpio_bank(gpio)] |= gpio_bit(gpio); + reserve(gpio, gpio); + set_label(gpio, label); - local_irq_restore(flags); + hard_local_irq_restore(flags); port_setup(gpio, GPIO_USAGE); - set_label(gpio, label); return 0; } -EXPORT_SYMBOL(gpio_request); +EXPORT_SYMBOL(bfin_gpio_request); -void gpio_free(unsigned gpio) +void bfin_gpio_free(unsigned gpio) { unsigned long flags; if (check_gpio(gpio) < 0) return; - local_irq_save(flags); + might_sleep(); + + flags = hard_local_irq_save(); - if (unlikely(!(reserved_gpio_map[gpio_bank(gpio)] & gpio_bit(gpio)))) { + if (unlikely(!is_reserved(gpio, gpio, 0))) { + if (system_state == SYSTEM_BOOTING) + dump_stack(); gpio_error(gpio); - dump_stack(); - local_irq_restore(flags); + hard_local_irq_restore(flags); return; } - default_gpio(gpio); - - reserved_gpio_map[gpio_bank(gpio)] &= ~gpio_bit(gpio); + unreserve(gpio, gpio); set_label(gpio, "free"); - local_irq_restore(flags); + hard_local_irq_restore(flags); } -EXPORT_SYMBOL(gpio_free); +EXPORT_SYMBOL(bfin_gpio_free); +#ifdef BFIN_SPECIAL_GPIO_BANKS +DECLARE_RESERVED_MAP(special_gpio, gpio_bank(MAX_RESOURCES)); -#ifdef BF548_FAMILY -int gpio_direction_input(unsigned gpio) +int bfin_special_gpio_request(unsigned gpio, const char *label) { unsigned long flags; - if (!(reserved_gpio_map[gpio_bank(gpio)] & gpio_bit(gpio))) { - gpio_error(gpio); - return -EINVAL; + flags = hard_local_irq_save(); + + /* + * Allow that the identical GPIO can + * be requested from the same driver twice + * Do nothing and return - + */ + + if (cmp_label(gpio, label) == 0) { + hard_local_irq_restore(flags); + return 0; } - local_irq_save(flags); - gpio_array[gpio_bank(gpio)]->port_dir_clear = gpio_bit(gpio); - gpio_array[gpio_bank(gpio)]->port_inen |= gpio_bit(gpio); - local_irq_restore(flags); + if (unlikely(is_reserved(special_gpio, gpio, 1))) { + hard_local_irq_restore(flags); + printk(KERN_ERR "bfin-gpio: GPIO %d is already reserved by %s !\n", + gpio, get_label(gpio)); + + return -EBUSY; + } + if (unlikely(is_reserved(peri, gpio, 1))) { + hard_local_irq_restore(flags); + printk(KERN_ERR + "bfin-gpio: GPIO %d is already reserved as Peripheral by %s !\n", + gpio, get_label(gpio)); + + return -EBUSY; + } + + reserve(special_gpio, gpio); + reserve(peri, gpio); + + set_label(gpio, label); + hard_local_irq_restore(flags); + port_setup(gpio, GPIO_USAGE); return 0; } -EXPORT_SYMBOL(gpio_direction_input); +EXPORT_SYMBOL(bfin_special_gpio_request); -int gpio_direction_output(unsigned gpio, int value) +void bfin_special_gpio_free(unsigned gpio) { unsigned long flags; - if (!(reserved_gpio_map[gpio_bank(gpio)] & gpio_bit(gpio))) { + might_sleep(); + + flags = hard_local_irq_save(); + + if (unlikely(!is_reserved(special_gpio, gpio, 0))) { gpio_error(gpio); + hard_local_irq_restore(flags); + return; + } + + unreserve(special_gpio, gpio); + unreserve(peri, gpio); + set_label(gpio, "free"); + hard_local_irq_restore(flags); +} +EXPORT_SYMBOL(bfin_special_gpio_free); +#endif + + +int bfin_gpio_irq_request(unsigned gpio, const char *label) +{ + unsigned long flags; + + if (check_gpio(gpio) < 0) return -EINVAL; + + flags = hard_local_irq_save(); + + if (unlikely(is_reserved(peri, gpio, 1))) { + if (system_state == SYSTEM_BOOTING) + dump_stack(); + printk(KERN_ERR + "bfin-gpio: GPIO %d is already reserved as Peripheral by %s !\n", + gpio, get_label(gpio)); + hard_local_irq_restore(flags); + return -EBUSY; } + if (unlikely(is_reserved(gpio, gpio, 1))) + printk(KERN_NOTICE "bfin-gpio: GPIO %d is already reserved by %s! " + "(Documentation/blackfin/bfin-gpio-notes.txt)\n", + gpio, get_label(gpio)); - local_irq_save(flags); - gpio_array[gpio_bank(gpio)]->port_inen &= ~gpio_bit(gpio); - gpio_set_value(gpio, value); - gpio_array[gpio_bank(gpio)]->port_dir_set = gpio_bit(gpio); - local_irq_restore(flags); + reserve(gpio_irq, gpio); + set_label(gpio, label); + + hard_local_irq_restore(flags); + + port_setup(gpio, GPIO_USAGE); return 0; } -EXPORT_SYMBOL(gpio_direction_output); -void gpio_set_value(unsigned gpio, int arg) +void bfin_gpio_irq_free(unsigned gpio) { - if (arg) - gpio_array[gpio_bank(gpio)]->port_set = gpio_bit(gpio); - else - gpio_array[gpio_bank(gpio)]->port_clear = gpio_bit(gpio); + unsigned long flags; + + if (check_gpio(gpio) < 0) + return; + + flags = hard_local_irq_save(); + + if (unlikely(!is_reserved(gpio_irq, gpio, 0))) { + if (system_state == SYSTEM_BOOTING) + dump_stack(); + gpio_error(gpio); + hard_local_irq_restore(flags); + return; + } + + unreserve(gpio_irq, gpio); + + set_label(gpio, "free"); + + hard_local_irq_restore(flags); } -EXPORT_SYMBOL(gpio_set_value); -int gpio_get_value(unsigned gpio) +static inline void __bfin_gpio_direction_input(unsigned gpio) { - return (1 & (gpio_array[gpio_bank(gpio)]->port_data >> gpio_sub_n(gpio))); + gpio_array[gpio_bank(gpio)]->dir &= ~gpio_bit(gpio); + gpio_array[gpio_bank(gpio)]->inen |= gpio_bit(gpio); } -EXPORT_SYMBOL(gpio_get_value); - -#else -int gpio_direction_input(unsigned gpio) +int bfin_gpio_direction_input(unsigned gpio) { unsigned long flags; - if (!(reserved_gpio_map[gpio_bank(gpio)] & gpio_bit(gpio))) { + if (unlikely(!is_reserved(gpio, gpio, 0))) { gpio_error(gpio); return -EINVAL; } - local_irq_save(flags); - gpio_bankb[gpio_bank(gpio)]->dir &= ~gpio_bit(gpio); - gpio_bankb[gpio_bank(gpio)]->inen |= gpio_bit(gpio); + flags = hard_local_irq_save(); + __bfin_gpio_direction_input(gpio); AWA_DUMMY_READ(inen); - local_irq_restore(flags); + hard_local_irq_restore(flags); return 0; } -EXPORT_SYMBOL(gpio_direction_input); +EXPORT_SYMBOL(bfin_gpio_direction_input); -int gpio_direction_output(unsigned gpio, int value) +void bfin_gpio_irq_prepare(unsigned gpio) +{ + port_setup(gpio, GPIO_USAGE); +} + +void bfin_gpio_set_value(unsigned gpio, int arg) +{ + if (arg) + gpio_array[gpio_bank(gpio)]->data_set = gpio_bit(gpio); + else + gpio_array[gpio_bank(gpio)]->data_clear = gpio_bit(gpio); +} +EXPORT_SYMBOL(bfin_gpio_set_value); + +int bfin_gpio_direction_output(unsigned gpio, int value) { unsigned long flags; - if (!(reserved_gpio_map[gpio_bank(gpio)] & gpio_bit(gpio))) { + if (unlikely(!is_reserved(gpio, gpio, 0))) { gpio_error(gpio); return -EINVAL; } - local_irq_save(flags); - gpio_bankb[gpio_bank(gpio)]->inen &= ~gpio_bit(gpio); + flags = hard_local_irq_save(); - if (value) - gpio_bankb[gpio_bank(gpio)]->data_set = gpio_bit(gpio); - else - gpio_bankb[gpio_bank(gpio)]->data_clear = gpio_bit(gpio); + gpio_array[gpio_bank(gpio)]->inen &= ~gpio_bit(gpio); + gpio_set_value(gpio, value); + gpio_array[gpio_bank(gpio)]->dir |= gpio_bit(gpio); - gpio_bankb[gpio_bank(gpio)]->dir |= gpio_bit(gpio); AWA_DUMMY_READ(dir); - local_irq_restore(flags); + hard_local_irq_restore(flags); return 0; } -EXPORT_SYMBOL(gpio_direction_output); +EXPORT_SYMBOL(bfin_gpio_direction_output); + +int bfin_gpio_get_value(unsigned gpio) +{ + unsigned long flags; + + if (unlikely(get_gpio_edge(gpio))) { + int ret; + flags = hard_local_irq_save(); + set_gpio_edge(gpio, 0); + ret = get_gpio_data(gpio); + set_gpio_edge(gpio, 1); + hard_local_irq_restore(flags); + return ret; + } else + return get_gpio_data(gpio); +} +EXPORT_SYMBOL(bfin_gpio_get_value); /* If we are booting from SPI and our board lacks a strong enough pull up, * the core can reset and execute the bootrom faster than the resistor can @@ -1208,46 +1094,110 @@ EXPORT_SYMBOL(gpio_direction_output); * lives here as we need to force all the GPIO states w/out going through * BUG() checks and such. */ -void bfin_gpio_reset_spi0_ssel1(void) +void bfin_reset_boot_spi_cs(unsigned short pin) { - u16 gpio = P_IDENT(P_SPI0_SSEL1); - + unsigned short gpio = P_IDENT(pin); port_setup(gpio, GPIO_USAGE); - gpio_bankb[gpio_bank(gpio)]->data_set = gpio_bit(gpio); + gpio_array[gpio_bank(gpio)]->data_set = gpio_bit(gpio); AWA_DUMMY_READ(data_set); udelay(1); } -#endif /*BF548_FAMILY */ - #if defined(CONFIG_PROC_FS) -static int gpio_proc_read(char *buf, char **start, off_t offset, - int len, int *unused_i, void *unused_v) +static int gpio_proc_show(struct seq_file *m, void *v) { - int c, outlen = 0; + int c, irq, gpio; for (c = 0; c < MAX_RESOURCES; c++) { - if (!check_gpio(c) && (reserved_gpio_map[gpio_bank(c)] & gpio_bit(c))) - len = sprintf(buf, "GPIO_%d: %s \t\tGPIO %s\n", c, - get_label(c), get_gpio_dir(c) ? "OUTPUT" : "INPUT"); - else if (reserved_peri_map[gpio_bank(c)] & gpio_bit(c)) - len = sprintf(buf, "GPIO_%d: %s \t\tPeripheral\n", c, get_label(c)); + irq = is_reserved(gpio_irq, c, 1); + gpio = is_reserved(gpio, c, 1); + if (!check_gpio(c) && (gpio || irq)) + seq_printf(m, "GPIO_%d: \t%s%s \t\tGPIO %s\n", c, + get_label(c), (gpio && irq) ? " *" : "", + get_gpio_dir(c) ? "OUTPUT" : "INPUT"); + else if (is_reserved(peri, c, 1)) + seq_printf(m, "GPIO_%d: \t%s \t\tPeripheral\n", c, get_label(c)); else continue; - buf += len; - outlen += len; } - return outlen; + + return 0; } +static int gpio_proc_open(struct inode *inode, struct file *file) +{ + return single_open(file, gpio_proc_show, NULL); +} + +static const struct file_operations gpio_proc_ops = { + .open = gpio_proc_open, + .read = seq_read, + .llseek = seq_lseek, + .release = single_release, +}; + static __init int gpio_register_proc(void) { struct proc_dir_entry *proc_gpio; - proc_gpio = create_proc_entry("gpio", S_IRUGO, NULL); - if (proc_gpio) - proc_gpio->read_proc = gpio_proc_read; - return proc_gpio != NULL; + proc_gpio = proc_create("gpio", 0, NULL, &gpio_proc_ops); + return proc_gpio == NULL; } __initcall(gpio_register_proc); #endif + +#ifdef CONFIG_GPIOLIB +static int bfin_gpiolib_direction_input(struct gpio_chip *chip, unsigned gpio) +{ + return bfin_gpio_direction_input(gpio); +} + +static int bfin_gpiolib_direction_output(struct gpio_chip *chip, unsigned gpio, int level) +{ + return bfin_gpio_direction_output(gpio, level); +} + +static int bfin_gpiolib_get_value(struct gpio_chip *chip, unsigned gpio) +{ + return bfin_gpio_get_value(gpio); +} + +static void bfin_gpiolib_set_value(struct gpio_chip *chip, unsigned gpio, int value) +{ + return bfin_gpio_set_value(gpio, value); +} + +static int bfin_gpiolib_gpio_request(struct gpio_chip *chip, unsigned gpio) +{ + return bfin_gpio_request(gpio, chip->label); +} + +static void bfin_gpiolib_gpio_free(struct gpio_chip *chip, unsigned gpio) +{ + return bfin_gpio_free(gpio); +} + +static int bfin_gpiolib_gpio_to_irq(struct gpio_chip *chip, unsigned gpio) +{ + return gpio + GPIO_IRQ_BASE; +} + +static struct gpio_chip bfin_chip = { + .label = "BFIN-GPIO", + .direction_input = bfin_gpiolib_direction_input, + .get = bfin_gpiolib_get_value, + .direction_output = bfin_gpiolib_direction_output, + .set = bfin_gpiolib_set_value, + .request = bfin_gpiolib_gpio_request, + .free = bfin_gpiolib_gpio_free, + .to_irq = bfin_gpiolib_gpio_to_irq, + .base = 0, + .ngpio = MAX_BLACKFIN_GPIOS, +}; + +static int __init bfin_gpiolib_setup(void) +{ + return gpiochip_add(&bfin_chip); +} +arch_initcall(bfin_gpiolib_setup); +#endif diff --git a/arch/blackfin/kernel/bfin_ksyms.c b/arch/blackfin/kernel/bfin_ksyms.c index 0bfbb269e35..c446591b961 100644 --- a/arch/blackfin/kernel/bfin_ksyms.c +++ b/arch/blackfin/kernel/bfin_ksyms.c @@ -1,57 +1,26 @@ /* - * File: arch/blackfin/kernel/bfin_ksyms.c - * Based on: none - original work - * Author: + * arch/blackfin/kernel/bfin_ksyms.c - exports for random symbols * - * Created: - * Description: + * Copyright 2004-2008 Analog Devices Inc. * - * Modified: - * Copyright 2004-2006 Analog Devices Inc. - * - * Bugs: Enter bugs at http://blackfin.uclinux.org/ - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, see the file COPYING, or write - * to the Free Software Foundation, Inc., - * 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA + * Licensed under the GPL-2 or later. */ #include <linux/module.h> -#include <linux/irq.h> #include <linux/uaccess.h> -#include <asm/checksum.h> #include <asm/cacheflush.h> +#include <asm/io.h> +#include <asm/irq_handler.h> -/* platform dependent support */ - -EXPORT_SYMBOL(__ioremap); - -EXPORT_SYMBOL(ip_fast_csum); - -EXPORT_SYMBOL(kernel_thread); - -EXPORT_SYMBOL(__up); -EXPORT_SYMBOL(__down); -EXPORT_SYMBOL(__down_trylock); -EXPORT_SYMBOL(__down_interruptible); - -EXPORT_SYMBOL(is_in_rom); +/* Allow people to have their own Blackfin exception handler in a module */ EXPORT_SYMBOL(bfin_return_from_exception); -/* Networking helper routines. */ -EXPORT_SYMBOL(csum_partial_copy); +/* All the Blackfin cache functions: mach-common/cache.S */ +EXPORT_SYMBOL(blackfin_dcache_invalidate_range); +EXPORT_SYMBOL(blackfin_icache_flush_range); +EXPORT_SYMBOL(blackfin_dcache_flush_range); +EXPORT_SYMBOL(blackfin_dflush_page); /* The following are special because they're not called * explicitly (the C compiler generates them). Fortunately, @@ -65,6 +34,18 @@ EXPORT_SYMBOL(memmove); EXPORT_SYMBOL(memchr); /* + * Because string functions are both inline and exported functions and + * folder arch/blackfin/lib is configured as a library path in Makefile, + * symbols exported in folder lib is not linked into built-in.o but + * inlined only. In order to export string symbols to kernel module + * properly, they should be exported here. + */ +EXPORT_SYMBOL(strcpy); +EXPORT_SYMBOL(strncpy); +EXPORT_SYMBOL(strcmp); +EXPORT_SYMBOL(strncmp); + +/* * libgcc functions - functions that are used internally by the * compiler... (prototypes are not correct though, but that * doesn't really matter since they're not versioned). @@ -79,8 +60,6 @@ extern void __modsi3(void); extern void __muldi3(void); extern void __udivsi3(void); extern void __umodsi3(void); - -/* gcc lib functions */ EXPORT_SYMBOL(__ashldi3); EXPORT_SYMBOL(__ashrdi3); EXPORT_SYMBOL(__umulsi3_highpart); @@ -92,27 +71,54 @@ EXPORT_SYMBOL(__muldi3); EXPORT_SYMBOL(__udivsi3); EXPORT_SYMBOL(__umodsi3); +/* Input/output symbols: lib/{in,out}s.S */ EXPORT_SYMBOL(outsb); EXPORT_SYMBOL(insb); EXPORT_SYMBOL(outsw); +EXPORT_SYMBOL(outsw_8); EXPORT_SYMBOL(insw); +EXPORT_SYMBOL(insw_8); EXPORT_SYMBOL(outsl); EXPORT_SYMBOL(insl); EXPORT_SYMBOL(insl_16); -EXPORT_SYMBOL(irq_flags); -EXPORT_SYMBOL(iounmap); -EXPORT_SYMBOL(blackfin_dcache_invalidate_range); -EXPORT_SYMBOL(blackfin_icache_dcache_flush_range); -EXPORT_SYMBOL(blackfin_icache_flush_range); -EXPORT_SYMBOL(blackfin_dcache_flush_range); -EXPORT_SYMBOL(blackfin_dflush_page); -EXPORT_SYMBOL(csum_partial); -EXPORT_SYMBOL(__init_begin); -EXPORT_SYMBOL(__init_end); -EXPORT_SYMBOL(_ebss_l1); -EXPORT_SYMBOL(_stext_l1); -EXPORT_SYMBOL(_etext_l1); -EXPORT_SYMBOL(_sdata_l1); -EXPORT_SYMBOL(_ebss_b_l1); -EXPORT_SYMBOL(_sdata_b_l1); +#ifdef CONFIG_SMP +EXPORT_SYMBOL(__raw_atomic_update_asm); +EXPORT_SYMBOL(__raw_atomic_clear_asm); +EXPORT_SYMBOL(__raw_atomic_set_asm); +EXPORT_SYMBOL(__raw_atomic_xor_asm); +EXPORT_SYMBOL(__raw_atomic_test_asm); +EXPORT_SYMBOL(__raw_xchg_1_asm); +EXPORT_SYMBOL(__raw_xchg_2_asm); +EXPORT_SYMBOL(__raw_xchg_4_asm); +EXPORT_SYMBOL(__raw_cmpxchg_1_asm); +EXPORT_SYMBOL(__raw_cmpxchg_2_asm); +EXPORT_SYMBOL(__raw_cmpxchg_4_asm); +EXPORT_SYMBOL(__raw_spin_is_locked_asm); +EXPORT_SYMBOL(__raw_spin_lock_asm); +EXPORT_SYMBOL(__raw_spin_trylock_asm); +EXPORT_SYMBOL(__raw_spin_unlock_asm); +EXPORT_SYMBOL(__raw_read_lock_asm); +EXPORT_SYMBOL(__raw_read_trylock_asm); +EXPORT_SYMBOL(__raw_read_unlock_asm); +EXPORT_SYMBOL(__raw_write_lock_asm); +EXPORT_SYMBOL(__raw_write_trylock_asm); +EXPORT_SYMBOL(__raw_write_unlock_asm); +EXPORT_SYMBOL(__raw_bit_set_asm); +EXPORT_SYMBOL(__raw_bit_clear_asm); +EXPORT_SYMBOL(__raw_bit_toggle_asm); +EXPORT_SYMBOL(__raw_bit_test_asm); +EXPORT_SYMBOL(__raw_bit_test_set_asm); +EXPORT_SYMBOL(__raw_bit_test_clear_asm); +EXPORT_SYMBOL(__raw_bit_test_toggle_asm); +EXPORT_SYMBOL(__raw_uncached_fetch_asm); +#ifdef __ARCH_SYNC_CORE_DCACHE +EXPORT_SYMBOL(__raw_smp_mark_barrier_asm); +EXPORT_SYMBOL(__raw_smp_check_barrier_asm); +#endif +#endif + +#ifdef CONFIG_FUNCTION_TRACER +extern void _mcount(void); +EXPORT_SYMBOL(_mcount); +#endif diff --git a/arch/blackfin/kernel/cplb-mpu/Makefile b/arch/blackfin/kernel/cplb-mpu/Makefile index 286b69357f9..394d0b1b28f 100644 --- a/arch/blackfin/kernel/cplb-mpu/Makefile +++ b/arch/blackfin/kernel/cplb-mpu/Makefile @@ -2,7 +2,9 @@ # arch/blackfin/kernel/cplb-nompu/Makefile # -obj-y := cplbinit.o cacheinit.o cplbmgr.o - -obj-$(CONFIG_CPLB_INFO) += cplbinfo.o +obj-y := cplbinit.o cplbmgr.o +CFLAGS_cplbmgr.o := -ffixed-I0 -ffixed-I1 -ffixed-I2 -ffixed-I3 \ + -ffixed-L0 -ffixed-L1 -ffixed-L2 -ffixed-L3 \ + -ffixed-M0 -ffixed-M1 -ffixed-M2 -ffixed-M3 \ + -ffixed-B0 -ffixed-B1 -ffixed-B2 -ffixed-B3 diff --git a/arch/blackfin/kernel/cplb-mpu/cacheinit.c b/arch/blackfin/kernel/cplb-mpu/cacheinit.c deleted file mode 100644 index 9eecfa40318..00000000000 --- a/arch/blackfin/kernel/cplb-mpu/cacheinit.c +++ /dev/null @@ -1,62 +0,0 @@ -/* - * Copyright 2004-2007 Analog Devices Inc. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, see the file COPYING, or write - * to the Free Software Foundation, Inc., - * 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA - */ - -#include <linux/cpu.h> - -#include <asm/cacheflush.h> -#include <asm/blackfin.h> -#include <asm/cplb.h> -#include <asm/cplbinit.h> - -#if defined(CONFIG_BFIN_ICACHE) -void bfin_icache_init(void) -{ - unsigned long ctrl; - int i; - - SSYNC(); - for (i = 0; i < MAX_CPLBS; i++) { - bfin_write32(ICPLB_ADDR0 + i * 4, icplb_tbl[i].addr); - bfin_write32(ICPLB_DATA0 + i * 4, icplb_tbl[i].data); - } - ctrl = bfin_read_IMEM_CONTROL(); - ctrl |= IMC | ENICPLB; - bfin_write_IMEM_CONTROL(ctrl); - SSYNC(); -} -#endif - -#if defined(CONFIG_BFIN_DCACHE) -void bfin_dcache_init(void) -{ - unsigned long ctrl; - int i; - - SSYNC(); - for (i = 0; i < MAX_CPLBS; i++) { - bfin_write32(DCPLB_ADDR0 + i * 4, dcplb_tbl[i].addr); - bfin_write32(DCPLB_DATA0 + i * 4, dcplb_tbl[i].data); - } - - ctrl = bfin_read_DMEM_CONTROL(); - ctrl |= DMEM_CNTR; - bfin_write_DMEM_CONTROL(ctrl); - SSYNC(); -} -#endif diff --git a/arch/blackfin/kernel/cplb-mpu/cplbinfo.c b/arch/blackfin/kernel/cplb-mpu/cplbinfo.c deleted file mode 100644 index bd072299f7f..00000000000 --- a/arch/blackfin/kernel/cplb-mpu/cplbinfo.c +++ /dev/null @@ -1,144 +0,0 @@ -/* - * File: arch/blackfin/mach-common/cplbinfo.c - * Based on: - * Author: Sonic Zhang <sonic.zhang@analog.com> - * - * Created: Jan. 2005 - * Description: Display CPLB status - * - * Modified: - * Copyright 2004-2006 Analog Devices Inc. - * - * Bugs: Enter bugs at http://blackfin.uclinux.org/ - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, see the file COPYING, or write - * to the Free Software Foundation, Inc., - * 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA - */ - -#include <linux/module.h> -#include <linux/kernel.h> -#include <linux/init.h> -#include <linux/proc_fs.h> -#include <linux/uaccess.h> - -#include <asm/current.h> -#include <asm/system.h> -#include <asm/cplb.h> -#include <asm/cplbinit.h> -#include <asm/blackfin.h> - -#define CPLB_I 1 -#define CPLB_D 2 - -#define SYNC_SYS SSYNC() -#define SYNC_CORE CSYNC() - -#define CPLB_BIT_PAGESIZE 0x30000 - -static char page_size_string_table[][4] = { "1K", "4K", "1M", "4M" }; - -static char *cplb_print_entry(char *buf, struct cplb_entry *tbl, int switched) -{ - int i; - buf += sprintf(buf, "Index\tAddress\t\tData\tSize\tU/RD\tU/WR\tS/WR\tSwitch\n"); - for (i = 0; i < MAX_CPLBS; i++) { - unsigned long data = tbl[i].data; - unsigned long addr = tbl[i].addr; - if (!(data & CPLB_VALID)) - continue; - - buf += - sprintf(buf, - "%d\t0x%08lx\t%06lx\t%s\t%c\t%c\t%c\t%c\n", - i, addr, data, - page_size_string_table[(data & 0x30000) >> 16], - (data & CPLB_USER_RD) ? 'Y' : 'N', - (data & CPLB_USER_WR) ? 'Y' : 'N', - (data & CPLB_SUPV_WR) ? 'Y' : 'N', - i < switched ? 'N' : 'Y'); - } - buf += sprintf(buf, "\n"); - - return buf; -} - -int cplbinfo_proc_output(char *buf) -{ - char *p; - - p = buf; - - p += sprintf(p, "------------------ CPLB Information ------------------\n\n"); - - if (bfin_read_IMEM_CONTROL() & ENICPLB) { - p += sprintf(p, "Instruction CPLB entry:\n"); - p = cplb_print_entry(p, icplb_tbl, first_switched_icplb); - } else - p += sprintf(p, "Instruction CPLB is disabled.\n\n"); - - if (1 || bfin_read_DMEM_CONTROL() & ENDCPLB) { - p += sprintf(p, "Data CPLB entry:\n"); - p = cplb_print_entry(p, dcplb_tbl, first_switched_dcplb); - } else - p += sprintf(p, "Data CPLB is disabled.\n"); - - p += sprintf(p, "ICPLB miss: %d\nICPLB supervisor miss: %d\n", - nr_icplb_miss, nr_icplb_supv_miss); - p += sprintf(p, "DCPLB miss: %d\nDCPLB protection fault:%d\n", - nr_dcplb_miss, nr_dcplb_prot); - p += sprintf(p, "CPLB flushes: %d\n", - nr_cplb_flush); - - return p - buf; -} - -static int cplbinfo_read_proc(char *page, char **start, off_t off, - int count, int *eof, void *data) -{ - int len; - - len = cplbinfo_proc_output(page); - if (len <= off + count) - *eof = 1; - *start = page + off; - len -= off; - if (len > count) - len = count; - if (len < 0) - len = 0; - return len; -} - -static int __init cplbinfo_init(void) -{ - struct proc_dir_entry *entry; - - entry = create_proc_entry("cplbinfo", 0, NULL); - if (!entry) - return -ENOMEM; - - entry->read_proc = cplbinfo_read_proc; - entry->data = NULL; - - return 0; -} - -static void __exit cplbinfo_exit(void) -{ - remove_proc_entry("cplbinfo", NULL); -} - -module_init(cplbinfo_init); -module_exit(cplbinfo_exit); diff --git a/arch/blackfin/kernel/cplb-mpu/cplbinit.c b/arch/blackfin/kernel/cplb-mpu/cplbinit.c index dc6e8a7a8bd..c15fd05f0b0 100644 --- a/arch/blackfin/kernel/cplb-mpu/cplbinit.c +++ b/arch/blackfin/kernel/cplb-mpu/cplbinit.c @@ -1,68 +1,52 @@ /* * Blackfin CPLB initialization * - * Copyright 2004-2007 Analog Devices Inc. + * Copyright 2008-2009 Analog Devices Inc. * - * Bugs: Enter bugs at http://blackfin.uclinux.org/ - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, see the file COPYING, or write - * to the Free Software Foundation, Inc., - * 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA + * Licensed under the GPL-2 or later. */ + #include <linux/module.h> #include <asm/blackfin.h> #include <asm/cplb.h> #include <asm/cplbinit.h> +#include <asm/mem_map.h> -#if ANOMALY_05000263 -# error the MPU will not function safely while Anomaly 05000263 applies -#endif - -struct cplb_entry icplb_tbl[MAX_CPLBS]; -struct cplb_entry dcplb_tbl[MAX_CPLBS]; +struct cplb_entry icplb_tbl[NR_CPUS][MAX_CPLBS]; +struct cplb_entry dcplb_tbl[NR_CPUS][MAX_CPLBS]; int first_switched_icplb, first_switched_dcplb; int first_mask_dcplb; -void __init generate_cpl_tables(void) +void __init generate_cplb_tables_cpu(unsigned int cpu) { int i_d, i_i; unsigned long addr; unsigned long d_data, i_data; unsigned long d_cache = 0, i_cache = 0; -#ifdef CONFIG_BFIN_ICACHE + printk(KERN_INFO "MPU: setting up cplb tables with memory protection\n"); + +#ifdef CONFIG_BFIN_EXTMEM_ICACHEABLE i_cache = CPLB_L1_CHBL | ANOMALY_05000158_WORKAROUND; #endif -#ifdef CONFIG_BFIN_DCACHE +#ifdef CONFIG_BFIN_EXTMEM_DCACHEABLE d_cache = CPLB_L1_CHBL; -#ifdef CONFIG_BLKFIN_WT +#ifdef CONFIG_BFIN_EXTMEM_WRITETHROUGH d_cache |= CPLB_L1_AOW | CPLB_WT; #endif #endif + i_d = i_i = 0; /* Set up the zero page. */ - dcplb_tbl[i_d].addr = 0; - dcplb_tbl[i_d++].data = SDRAM_OOPS | PAGE_SIZE_1KB; + dcplb_tbl[cpu][i_d].addr = 0; + dcplb_tbl[cpu][i_d++].data = SDRAM_OOPS | PAGE_SIZE_1KB; -#if 0 - icplb_tbl[i_i].addr = 0; - icplb_tbl[i_i++].data = i_cache | CPLB_USER_RD | PAGE_SIZE_4KB; -#endif + icplb_tbl[cpu][i_i].addr = 0; + icplb_tbl[cpu][i_i++].data = CPLB_VALID | i_cache | CPLB_USER_RD | PAGE_SIZE_1KB; /* Cover kernel memory with 4M pages. */ addr = 0; @@ -70,26 +54,49 @@ void __init generate_cpl_tables(void) i_data = i_cache | CPLB_VALID | CPLB_PORTPRIO | PAGE_SIZE_4MB; for (; addr < memory_start; addr += 4 * 1024 * 1024) { - dcplb_tbl[i_d].addr = addr; - dcplb_tbl[i_d++].data = d_data; - icplb_tbl[i_i].addr = addr; - icplb_tbl[i_i++].data = i_data | (addr == 0 ? CPLB_USER_RD : 0); + dcplb_tbl[cpu][i_d].addr = addr; + dcplb_tbl[cpu][i_d++].data = d_data; + icplb_tbl[cpu][i_i].addr = addr; + icplb_tbl[cpu][i_i++].data = i_data | (addr == 0 ? CPLB_USER_RD : 0); } +#ifdef CONFIG_ROMKERNEL + /* Cover kernel XIP flash area */ + addr = CONFIG_ROM_BASE & ~(4 * 1024 * 1024 - 1); + dcplb_tbl[cpu][i_d].addr = addr; + dcplb_tbl[cpu][i_d++].data = d_data | CPLB_USER_RD; + icplb_tbl[cpu][i_i].addr = addr; + icplb_tbl[cpu][i_i++].data = i_data | CPLB_USER_RD; +#endif + /* Cover L1 memory. One 4M area for code and data each is enough. */ #if L1_DATA_A_LENGTH > 0 || L1_DATA_B_LENGTH > 0 - dcplb_tbl[i_d].addr = L1_DATA_A_START; - dcplb_tbl[i_d++].data = L1_DMEMORY | PAGE_SIZE_4MB; + dcplb_tbl[cpu][i_d].addr = get_l1_data_a_start_cpu(cpu); + dcplb_tbl[cpu][i_d++].data = L1_DMEMORY | PAGE_SIZE_4MB; +#endif +#if L1_CODE_LENGTH > 0 + icplb_tbl[cpu][i_i].addr = get_l1_code_start_cpu(cpu); + icplb_tbl[cpu][i_i++].data = L1_IMEMORY | PAGE_SIZE_4MB; +#endif + + /* Cover L2 memory */ +#if L2_LENGTH > 0 + dcplb_tbl[cpu][i_d].addr = L2_START; + dcplb_tbl[cpu][i_d++].data = L2_DMEMORY; + icplb_tbl[cpu][i_i].addr = L2_START; + icplb_tbl[cpu][i_i++].data = L2_IMEMORY; #endif - icplb_tbl[i_i].addr = L1_CODE_START; - icplb_tbl[i_i++].data = L1_IMEMORY | PAGE_SIZE_4MB; first_mask_dcplb = i_d; first_switched_dcplb = i_d + (1 << page_mask_order); first_switched_icplb = i_i; while (i_d < MAX_CPLBS) - dcplb_tbl[i_d++].data = 0; + dcplb_tbl[cpu][i_d++].data = 0; while (i_i < MAX_CPLBS) - icplb_tbl[i_i++].data = 0; + icplb_tbl[cpu][i_i++].data = 0; +} + +void __init generate_cplb_tables_all(void) +{ } diff --git a/arch/blackfin/kernel/cplb-mpu/cplbmgr.c b/arch/blackfin/kernel/cplb-mpu/cplbmgr.c index c426a22f990..b56bd8514b7 100644 --- a/arch/blackfin/kernel/cplb-mpu/cplbmgr.c +++ b/arch/blackfin/kernel/cplb-mpu/cplbmgr.c @@ -1,80 +1,41 @@ /* - * Blackfin CPLB exception handling. - * Copyright 2004-2007 Analog Devices Inc. + * Blackfin CPLB exception handling for when MPU in on * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. + * Copyright 2008-2009 Analog Devices Inc. * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, see the file COPYING, or write - * to the Free Software Foundation, Inc., - * 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA + * Licensed under the GPL-2 or later. */ + #include <linux/module.h> #include <linux/mm.h> #include <asm/blackfin.h> +#include <asm/cacheflush.h> +#include <asm/cplb.h> #include <asm/cplbinit.h> #include <asm/mmu_context.h> -#ifdef CONFIG_BFIN_ICACHE - -#define FAULT_RW (1 << 16) -#define FAULT_USERSUPV (1 << 17) +/* + * WARNING + * + * This file is compiled with certain -ffixed-reg options. We have to + * make sure not to call any functions here that could clobber these + * registers. + */ int page_mask_nelts; int page_mask_order; -unsigned long *current_rwx_mask; +unsigned long *current_rwx_mask[NR_CPUS]; -int nr_dcplb_miss, nr_icplb_miss, nr_icplb_supv_miss, nr_dcplb_prot; -int nr_cplb_flush; +int nr_dcplb_miss[NR_CPUS], nr_icplb_miss[NR_CPUS]; +int nr_icplb_supv_miss[NR_CPUS], nr_dcplb_prot[NR_CPUS]; +int nr_cplb_flush[NR_CPUS]; -static inline void disable_dcplb(void) -{ - unsigned long ctrl; - SSYNC(); - ctrl = bfin_read_DMEM_CONTROL(); - ctrl &= ~ENDCPLB; - bfin_write_DMEM_CONTROL(ctrl); - SSYNC(); -} - -static inline void enable_dcplb(void) -{ - unsigned long ctrl; - SSYNC(); - ctrl = bfin_read_DMEM_CONTROL(); - ctrl |= ENDCPLB; - bfin_write_DMEM_CONTROL(ctrl); - SSYNC(); -} - -static inline void disable_icplb(void) -{ - unsigned long ctrl; - SSYNC(); - ctrl = bfin_read_IMEM_CONTROL(); - ctrl &= ~ENICPLB; - bfin_write_IMEM_CONTROL(ctrl); - SSYNC(); -} - -static inline void enable_icplb(void) -{ - unsigned long ctrl; - SSYNC(); - ctrl = bfin_read_IMEM_CONTROL(); - ctrl |= ENICPLB; - bfin_write_IMEM_CONTROL(ctrl); - SSYNC(); -} +#ifdef CONFIG_EXCPT_IRQ_SYSC_L1 +#define MGR_ATTR __attribute__((l1_text)) +#else +#define MGR_ATTR +#endif /* * Given the contents of the status register, return the index of the @@ -99,42 +60,42 @@ static inline int write_permitted(int status, unsigned long data) } /* Counters to implement round-robin replacement. */ -static int icplb_rr_index, dcplb_rr_index; +static int icplb_rr_index[NR_CPUS], dcplb_rr_index[NR_CPUS]; /* * Find an ICPLB entry to be evicted and return its index. */ -static int evict_one_icplb(void) +MGR_ATTR static int evict_one_icplb(unsigned int cpu) { int i; for (i = first_switched_icplb; i < MAX_CPLBS; i++) - if ((icplb_tbl[i].data & CPLB_VALID) == 0) + if ((icplb_tbl[cpu][i].data & CPLB_VALID) == 0) return i; - i = first_switched_icplb + icplb_rr_index; + i = first_switched_icplb + icplb_rr_index[cpu]; if (i >= MAX_CPLBS) { i -= MAX_CPLBS - first_switched_icplb; - icplb_rr_index -= MAX_CPLBS - first_switched_icplb; + icplb_rr_index[cpu] -= MAX_CPLBS - first_switched_icplb; } - icplb_rr_index++; + icplb_rr_index[cpu]++; return i; } -static int evict_one_dcplb(void) +MGR_ATTR static int evict_one_dcplb(unsigned int cpu) { int i; for (i = first_switched_dcplb; i < MAX_CPLBS; i++) - if ((dcplb_tbl[i].data & CPLB_VALID) == 0) + if ((dcplb_tbl[cpu][i].data & CPLB_VALID) == 0) return i; - i = first_switched_dcplb + dcplb_rr_index; + i = first_switched_dcplb + dcplb_rr_index[cpu]; if (i >= MAX_CPLBS) { i -= MAX_CPLBS - first_switched_dcplb; - dcplb_rr_index -= MAX_CPLBS - first_switched_dcplb; + dcplb_rr_index[cpu] -= MAX_CPLBS - first_switched_dcplb; } - dcplb_rr_index++; + dcplb_rr_index[cpu]++; return i; } -static noinline int dcplb_miss(void) +MGR_ATTR static noinline int dcplb_miss(unsigned int cpu) { unsigned long addr = bfin_read_DCPLB_FAULT_ADDR(); int status = bfin_read_DCPLB_STATUS(); @@ -142,67 +103,98 @@ static noinline int dcplb_miss(void) int idx; unsigned long d_data; - nr_dcplb_miss++; - if (addr >= _ramend) - return CPLB_PROT_VIOL; + nr_dcplb_miss[cpu]++; d_data = CPLB_SUPV_WR | CPLB_VALID | CPLB_DIRTY | PAGE_SIZE_4KB; -#ifdef CONFIG_BFIN_DCACHE - d_data |= CPLB_L1_CHBL | ANOMALY_05000158_WORKAROUND; -#ifdef CONFIG_BLKFIN_WT - d_data |= CPLB_L1_AOW | CPLB_WT; +#ifdef CONFIG_BFIN_EXTMEM_DCACHEABLE + if (bfin_addr_dcacheable(addr)) { + d_data |= CPLB_L1_CHBL | ANOMALY_05000158_WORKAROUND; +# ifdef CONFIG_BFIN_EXTMEM_WRITETHROUGH + d_data |= CPLB_L1_AOW | CPLB_WT; +# endif + } #endif + + if (L2_LENGTH && addr >= L2_START && addr < L2_START + L2_LENGTH) { + addr = L2_START; + d_data = L2_DMEMORY; + } else if (addr >= physical_mem_end) { + if (addr >= ASYNC_BANK0_BASE && addr < ASYNC_BANK3_BASE + ASYNC_BANK3_SIZE) { +#if defined(CONFIG_ROMFS_ON_MTD) && defined(CONFIG_MTD_ROM) + mask = current_rwx_mask[cpu]; + if (mask) { + int page = (addr - (ASYNC_BANK0_BASE - _ramend)) >> PAGE_SHIFT; + int idx = page >> 5; + int bit = 1 << (page & 31); + + if (mask[idx] & bit) + d_data |= CPLB_USER_RD; + } #endif - mask = current_rwx_mask; - if (mask) { - int page = addr >> PAGE_SHIFT; - int offs = page >> 5; - int bit = 1 << (page & 31); - - if (mask[offs] & bit) - d_data |= CPLB_USER_RD; - - mask += page_mask_nelts; - if (mask[offs] & bit) - d_data |= CPLB_USER_WR; - } + } else if (addr >= BOOT_ROM_START && addr < BOOT_ROM_START + BOOT_ROM_LENGTH + && (status & (FAULT_RW | FAULT_USERSUPV)) == FAULT_USERSUPV) { + addr &= ~(1 * 1024 * 1024 - 1); + d_data &= ~PAGE_SIZE_4KB; + d_data |= PAGE_SIZE_1MB; + } else + return CPLB_PROT_VIOL; + } else if (addr >= _ramend) { + d_data |= CPLB_USER_RD | CPLB_USER_WR; + if (reserved_mem_dcache_on) + d_data |= CPLB_L1_CHBL; + } else { + mask = current_rwx_mask[cpu]; + if (mask) { + int page = addr >> PAGE_SHIFT; + int idx = page >> 5; + int bit = 1 << (page & 31); + + if (mask[idx] & bit) + d_data |= CPLB_USER_RD; - idx = evict_one_dcplb(); + mask += page_mask_nelts; + if (mask[idx] & bit) + d_data |= CPLB_USER_WR; + } + } + idx = evict_one_dcplb(cpu); addr &= PAGE_MASK; - dcplb_tbl[idx].addr = addr; - dcplb_tbl[idx].data = d_data; + dcplb_tbl[cpu][idx].addr = addr; + dcplb_tbl[cpu][idx].data = d_data; - disable_dcplb(); + _disable_dcplb(); bfin_write32(DCPLB_DATA0 + idx * 4, d_data); bfin_write32(DCPLB_ADDR0 + idx * 4, addr); - enable_dcplb(); + _enable_dcplb(); return 0; } -static noinline int icplb_miss(void) +MGR_ATTR static noinline int icplb_miss(unsigned int cpu) { unsigned long addr = bfin_read_ICPLB_FAULT_ADDR(); int status = bfin_read_ICPLB_STATUS(); int idx; unsigned long i_data; - nr_icplb_miss++; - if (status & FAULT_USERSUPV) - nr_icplb_supv_miss++; + nr_icplb_miss[cpu]++; - if (addr >= _ramend) + /* If inside the uncached DMA region, fault. */ + if (addr >= _ramend - DMA_UNCACHED_REGION && addr < _ramend) return CPLB_PROT_VIOL; + if (status & FAULT_USERSUPV) + nr_icplb_supv_miss[cpu]++; + /* * First, try to find a CPLB that matches this address. If we * find one, then the fact that we're in the miss handler means * that the instruction crosses a page boundary. */ for (idx = first_switched_icplb; idx < MAX_CPLBS; idx++) { - if (icplb_tbl[idx].data & CPLB_VALID) { - unsigned long this_addr = icplb_tbl[idx].addr; + if (icplb_tbl[cpu][idx].data & CPLB_VALID) { + unsigned long this_addr = icplb_tbl[cpu][idx].addr; if (this_addr <= addr && this_addr + PAGE_SIZE > addr) { addr += PAGE_SIZE; break; @@ -211,57 +203,93 @@ static noinline int icplb_miss(void) } i_data = CPLB_VALID | CPLB_PORTPRIO | PAGE_SIZE_4KB; -#ifdef CONFIG_BFIN_ICACHE - i_data |= CPLB_L1_CHBL | ANOMALY_05000158_WORKAROUND; -#endif +#ifdef CONFIG_BFIN_EXTMEM_ICACHEABLE /* - * Two cases to distinguish - a supervisor access must necessarily - * be for a module page; we grant it unconditionally (could do better - * here in the future). Otherwise, check the x bitmap of the current - * process. + * Normal RAM, and possibly the reserved memory area, are + * cacheable. */ - if (!(status & FAULT_USERSUPV)) { - unsigned long *mask = current_rwx_mask; - - if (mask) { - int page = addr >> PAGE_SHIFT; - int offs = page >> 5; - int bit = 1 << (page & 31); + if (addr < _ramend || + (addr < physical_mem_end && reserved_mem_icache_on)) + i_data |= CPLB_L1_CHBL | ANOMALY_05000158_WORKAROUND; +#endif - mask += 2 * page_mask_nelts; - if (mask[offs] & bit) - i_data |= CPLB_USER_RD; + if (L2_LENGTH && addr >= L2_START && addr < L2_START + L2_LENGTH) { + addr = L2_START; + i_data = L2_IMEMORY; + } else if (addr >= physical_mem_end) { + if (addr >= ASYNC_BANK0_BASE && addr < ASYNC_BANK3_BASE + ASYNC_BANK3_SIZE) { + if (!(status & FAULT_USERSUPV)) { + unsigned long *mask = current_rwx_mask[cpu]; + + if (mask) { + int page = (addr - (ASYNC_BANK0_BASE - _ramend)) >> PAGE_SHIFT; + int idx = page >> 5; + int bit = 1 << (page & 31); + + mask += 2 * page_mask_nelts; + if (mask[idx] & bit) + i_data |= CPLB_USER_RD; + } + } + } else if (addr >= BOOT_ROM_START && addr < BOOT_ROM_START + BOOT_ROM_LENGTH + && (status & FAULT_USERSUPV)) { + addr &= ~(1 * 1024 * 1024 - 1); + i_data &= ~PAGE_SIZE_4KB; + i_data |= PAGE_SIZE_1MB; + } else + return CPLB_PROT_VIOL; + } else if (addr >= _ramend) { + i_data |= CPLB_USER_RD; + if (reserved_mem_icache_on) + i_data |= CPLB_L1_CHBL; + } else { + /* + * Two cases to distinguish - a supervisor access must + * necessarily be for a module page; we grant it + * unconditionally (could do better here in the future). + * Otherwise, check the x bitmap of the current process. + */ + if (!(status & FAULT_USERSUPV)) { + unsigned long *mask = current_rwx_mask[cpu]; + + if (mask) { + int page = addr >> PAGE_SHIFT; + int idx = page >> 5; + int bit = 1 << (page & 31); + + mask += 2 * page_mask_nelts; + if (mask[idx] & bit) + i_data |= CPLB_USER_RD; + } } } - - idx = evict_one_icplb(); + idx = evict_one_icplb(cpu); addr &= PAGE_MASK; - icplb_tbl[idx].addr = addr; - icplb_tbl[idx].data = i_data; + icplb_tbl[cpu][idx].addr = addr; + icplb_tbl[cpu][idx].data = i_data; - disable_icplb(); + _disable_icplb(); bfin_write32(ICPLB_DATA0 + idx * 4, i_data); bfin_write32(ICPLB_ADDR0 + idx * 4, addr); - enable_icplb(); + _enable_icplb(); return 0; } -static noinline int dcplb_protection_fault(void) +MGR_ATTR static noinline int dcplb_protection_fault(unsigned int cpu) { - unsigned long addr = bfin_read_DCPLB_FAULT_ADDR(); int status = bfin_read_DCPLB_STATUS(); - nr_dcplb_prot++; + nr_dcplb_prot[cpu]++; if (status & FAULT_RW) { int idx = faulting_cplb_index(status); - unsigned long data = dcplb_tbl[idx].data; + unsigned long data = dcplb_tbl[cpu][idx].data; if (!(data & CPLB_WT) && !(data & CPLB_DIRTY) && write_permitted(status, data)) { data |= CPLB_DIRTY; - dcplb_tbl[idx].data = data; + dcplb_tbl[cpu][idx].data = data; bfin_write32(DCPLB_DATA0 + idx * 4, data); return 0; } @@ -269,70 +297,83 @@ static noinline int dcplb_protection_fault(void) return CPLB_PROT_VIOL; } -int cplb_hdr(int seqstat, struct pt_regs *regs) +MGR_ATTR int cplb_hdr(int seqstat, struct pt_regs *regs) { int cause = seqstat & 0x3f; + unsigned int cpu = raw_smp_processor_id(); switch (cause) { case 0x23: - return dcplb_protection_fault(); + return dcplb_protection_fault(cpu); case 0x2C: - return icplb_miss(); + return icplb_miss(cpu); case 0x26: - return dcplb_miss(); + return dcplb_miss(cpu); default: - return 1; - panic_cplb_error(seqstat, regs); + return 1; } } -void flush_switched_cplbs(void) +void flush_switched_cplbs(unsigned int cpu) { int i; + unsigned long flags; - nr_cplb_flush++; + nr_cplb_flush[cpu]++; - disable_icplb(); + flags = hard_local_irq_save(); + _disable_icplb(); for (i = first_switched_icplb; i < MAX_CPLBS; i++) { - icplb_tbl[i].data = 0; + icplb_tbl[cpu][i].data = 0; bfin_write32(ICPLB_DATA0 + i * 4, 0); } - enable_icplb(); + _enable_icplb(); - disable_dcplb(); - for (i = first_mask_dcplb; i < MAX_CPLBS; i++) { - dcplb_tbl[i].data = 0; + _disable_dcplb(); + for (i = first_switched_dcplb; i < MAX_CPLBS; i++) { + dcplb_tbl[cpu][i].data = 0; bfin_write32(DCPLB_DATA0 + i * 4, 0); } - enable_dcplb(); + _enable_dcplb(); + hard_local_irq_restore(flags); + } -void set_mask_dcplbs(unsigned long *masks) +void set_mask_dcplbs(unsigned long *masks, unsigned int cpu) { int i; unsigned long addr = (unsigned long)masks; unsigned long d_data; - current_rwx_mask = masks; + unsigned long flags; - if (!masks) + if (!masks) { + current_rwx_mask[cpu] = masks; return; + } - d_data = CPLB_SUPV_WR | CPLB_VALID | CPLB_DIRTY | PAGE_SIZE_4KB; -#ifdef CONFIG_BFIN_DCACHE - d_data |= CPLB_L1_CHBL; -#ifdef CONFIG_BLKFIN_WT - d_data |= CPLB_L1_AOW | CPLB_WT; -#endif + flags = hard_local_irq_save(); + current_rwx_mask[cpu] = masks; + + if (L2_LENGTH && addr >= L2_START && addr < L2_START + L2_LENGTH) { + addr = L2_START; + d_data = L2_DMEMORY; + } else { + d_data = CPLB_SUPV_WR | CPLB_VALID | CPLB_DIRTY | PAGE_SIZE_4KB; +#ifdef CONFIG_BFIN_EXTMEM_DCACHEABLE + d_data |= CPLB_L1_CHBL; +# ifdef CONFIG_BFIN_EXTMEM_WRITETHROUGH + d_data |= CPLB_L1_AOW | CPLB_WT; +# endif #endif + } - disable_dcplb(); + _disable_dcplb(); for (i = first_mask_dcplb; i < first_switched_dcplb; i++) { - dcplb_tbl[i].addr = addr; - dcplb_tbl[i].data = d_data; + dcplb_tbl[cpu][i].addr = addr; + dcplb_tbl[cpu][i].data = d_data; bfin_write32(DCPLB_DATA0 + i * 4, d_data); bfin_write32(DCPLB_ADDR0 + i * 4, addr); addr += PAGE_SIZE; } - enable_dcplb(); + _enable_dcplb(); + hard_local_irq_restore(flags); } - -#endif diff --git a/arch/blackfin/kernel/cplb-nompu/Makefile b/arch/blackfin/kernel/cplb-nompu/Makefile index d36ea9b5382..394d0b1b28f 100644 --- a/arch/blackfin/kernel/cplb-nompu/Makefile +++ b/arch/blackfin/kernel/cplb-nompu/Makefile @@ -2,7 +2,9 @@ # arch/blackfin/kernel/cplb-nompu/Makefile # -obj-y := cplbinit.o cacheinit.o cplbhdlr.o cplbmgr.o - -obj-$(CONFIG_CPLB_INFO) += cplbinfo.o +obj-y := cplbinit.o cplbmgr.o +CFLAGS_cplbmgr.o := -ffixed-I0 -ffixed-I1 -ffixed-I2 -ffixed-I3 \ + -ffixed-L0 -ffixed-L1 -ffixed-L2 -ffixed-L3 \ + -ffixed-M0 -ffixed-M1 -ffixed-M2 -ffixed-M3 \ + -ffixed-B0 -ffixed-B1 -ffixed-B2 -ffixed-B3 diff --git a/arch/blackfin/kernel/cplb-nompu/cacheinit.c b/arch/blackfin/kernel/cplb-nompu/cacheinit.c deleted file mode 100644 index 8a18399f607..00000000000 --- a/arch/blackfin/kernel/cplb-nompu/cacheinit.c +++ /dev/null @@ -1,69 +0,0 @@ -/* - * Copyright 2004-2007 Analog Devices Inc. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, see the file COPYING, or write - * to the Free Software Foundation, Inc., - * 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA - */ - -#include <linux/cpu.h> - -#include <asm/cacheflush.h> -#include <asm/blackfin.h> -#include <asm/cplb.h> -#include <asm/cplbinit.h> - -#if defined(CONFIG_BFIN_ICACHE) -void bfin_icache_init(void) -{ - unsigned long *table = icplb_table; - unsigned long ctrl; - int i; - - for (i = 0; i < MAX_CPLBS; i++) { - unsigned long addr = *table++; - unsigned long data = *table++; - if (addr == (unsigned long)-1) - break; - bfin_write32(ICPLB_ADDR0 + i * 4, addr); - bfin_write32(ICPLB_DATA0 + i * 4, data); - } - ctrl = bfin_read_IMEM_CONTROL(); - ctrl |= IMC | ENICPLB; - bfin_write_IMEM_CONTROL(ctrl); - SSYNC(); -} -#endif - -#if defined(CONFIG_BFIN_DCACHE) -void bfin_dcache_init(void) -{ - unsigned long *table = dcplb_table; - unsigned long ctrl; - int i; - - for (i = 0; i < MAX_CPLBS; i++) { - unsigned long addr = *table++; - unsigned long data = *table++; - if (addr == (unsigned long)-1) - break; - bfin_write32(DCPLB_ADDR0 + i * 4, addr); - bfin_write32(DCPLB_DATA0 + i * 4, data); - } - ctrl = bfin_read_DMEM_CONTROL(); - ctrl |= DMEM_CNTR; - bfin_write_DMEM_CONTROL(ctrl); - SSYNC(); -} -#endif diff --git a/arch/blackfin/kernel/cplb-nompu/cplbhdlr.S b/arch/blackfin/kernel/cplb-nompu/cplbhdlr.S deleted file mode 100644 index 2788532de72..00000000000 --- a/arch/blackfin/kernel/cplb-nompu/cplbhdlr.S +++ /dev/null @@ -1,130 +0,0 @@ -/* - * File: arch/blackfin/mach-common/cplbhdlr.S - * Based on: - * Author: LG Soft India - * - * Created: ? - * Description: CPLB exception handler - * - * Modified: - * Copyright 2004-2006 Analog Devices Inc. - * - * Bugs: Enter bugs at http://blackfin.uclinux.org/ - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, see the file COPYING, or write - * to the Free Software Foundation, Inc., - * 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA - */ - -#include <linux/linkage.h> -#include <asm/cplb.h> -#include <asm/entry.h> - -#ifdef CONFIG_EXCPT_IRQ_SYSC_L1 -.section .l1.text -#else -.text -#endif - -.type _cplb_mgr, STT_FUNC; -.type _panic_cplb_error, STT_FUNC; - -.align 2 - -ENTRY(__cplb_hdr) - R2 = SEQSTAT; - - /* Mask the contents of SEQSTAT and leave only EXCAUSE in R2 */ - R2 <<= 26; - R2 >>= 26; - - R1 = 0x23; /* Data access CPLB protection violation */ - CC = R2 == R1; - IF !CC JUMP .Lnot_data_write; - R0 = 2; /* is a write to data space*/ - JUMP .Lis_icplb_miss; - -.Lnot_data_write: - R1 = 0x2C; /* CPLB miss on an instruction fetch */ - CC = R2 == R1; - R0 = 0; /* is_data_miss == False*/ - IF CC JUMP .Lis_icplb_miss; - - R1 = 0x26; - CC = R2 == R1; - IF !CC JUMP .Lunknown; - - R0 = 1; /* is_data_miss == True*/ - -.Lis_icplb_miss: - -#if defined(CONFIG_BFIN_ICACHE) || defined(CONFIG_BFIN_DCACHE) -# if defined(CONFIG_BFIN_ICACHE) && !defined(CONFIG_BFIN_DCACHE) - R1 = CPLB_ENABLE_ICACHE; -# endif -# if !defined(CONFIG_BFIN_ICACHE) && defined(CONFIG_BFIN_DCACHE) - R1 = CPLB_ENABLE_DCACHE; -# endif -# if defined(CONFIG_BFIN_ICACHE) && defined(CONFIG_BFIN_DCACHE) - R1 = CPLB_ENABLE_DCACHE | CPLB_ENABLE_ICACHE; -# endif -#else - R1 = 0; -#endif - - [--SP] = RETS; - CALL _cplb_mgr; - RETS = [SP++]; - CC = R0 == 0; - IF !CC JUMP .Lnot_replaced; - RTS; - -/* - * Diagnostic exception handlers - */ -.Lunknown: - R0 = CPLB_UNKNOWN_ERR; - JUMP .Lcplb_error; - -.Lnot_replaced: - CC = R0 == CPLB_NO_UNLOCKED; - IF !CC JUMP .Lnext_check; - R0 = CPLB_NO_UNLOCKED; - JUMP .Lcplb_error; - -.Lnext_check: - CC = R0 == CPLB_NO_ADDR_MATCH; - IF !CC JUMP .Lnext_check2; - R0 = CPLB_NO_ADDR_MATCH; - JUMP .Lcplb_error; - -.Lnext_check2: - CC = R0 == CPLB_PROT_VIOL; - IF !CC JUMP .Lstrange_return_from_cplb_mgr; - R0 = CPLB_PROT_VIOL; - JUMP .Lcplb_error; - -.Lstrange_return_from_cplb_mgr: - IDLE; - CSYNC; - JUMP .Lstrange_return_from_cplb_mgr; - -.Lcplb_error: - R1 = sp; - SP += -12; - call _panic_cplb_error; - SP += 12; - JUMP _handle_bad_cplb; - -ENDPROC(__cplb_hdr) diff --git a/arch/blackfin/kernel/cplb-nompu/cplbinfo.c b/arch/blackfin/kernel/cplb-nompu/cplbinfo.c deleted file mode 100644 index a4f0b428a34..00000000000 --- a/arch/blackfin/kernel/cplb-nompu/cplbinfo.c +++ /dev/null @@ -1,208 +0,0 @@ -/* - * File: arch/blackfin/mach-common/cplbinfo.c - * Based on: - * Author: Sonic Zhang <sonic.zhang@analog.com> - * - * Created: Jan. 2005 - * Description: Display CPLB status - * - * Modified: - * Copyright 2004-2006 Analog Devices Inc. - * - * Bugs: Enter bugs at http://blackfin.uclinux.org/ - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, see the file COPYING, or write - * to the Free Software Foundation, Inc., - * 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA - */ - -#include <linux/module.h> -#include <linux/kernel.h> -#include <linux/init.h> -#include <linux/proc_fs.h> -#include <linux/uaccess.h> - -#include <asm/current.h> -#include <asm/system.h> -#include <asm/cplb.h> -#include <asm/blackfin.h> - -#define CPLB_I 1 -#define CPLB_D 2 - -#define SYNC_SYS SSYNC() -#define SYNC_CORE CSYNC() - -#define CPLB_BIT_PAGESIZE 0x30000 - -static int page_size_table[4] = { - 0x00000400, /* 1K */ - 0x00001000, /* 4K */ - 0x00100000, /* 1M */ - 0x00400000 /* 4M */ -}; - -static char page_size_string_table[][4] = { "1K", "4K", "1M", "4M" }; - -static int cplb_find_entry(unsigned long *cplb_addr, - unsigned long *cplb_data, unsigned long addr, - unsigned long data) -{ - int ii; - - for (ii = 0; ii < 16; ii++) - if (addr >= cplb_addr[ii] && addr < cplb_addr[ii] + - page_size_table[(cplb_data[ii] & CPLB_BIT_PAGESIZE) >> 16] - && (cplb_data[ii] == data)) - return ii; - - return -1; -} - -static char *cplb_print_entry(char *buf, int type) -{ - unsigned long *p_addr = dpdt_table; - unsigned long *p_data = dpdt_table + 1; - unsigned long *p_icount = dpdt_swapcount_table; - unsigned long *p_ocount = dpdt_swapcount_table + 1; - unsigned long *cplb_addr = (unsigned long *)DCPLB_ADDR0; - unsigned long *cplb_data = (unsigned long *)DCPLB_DATA0; - int entry = 0, used_cplb = 0; - - if (type == CPLB_I) { - buf += sprintf(buf, "Instruction CPLB entry:\n"); - p_addr = ipdt_table; - p_data = ipdt_table + 1; - p_icount = ipdt_swapcount_table; - p_ocount = ipdt_swapcount_table + 1; - cplb_addr = (unsigned long *)ICPLB_ADDR0; - cplb_data = (unsigned long *)ICPLB_DATA0; - } else - buf += sprintf(buf, "Data CPLB entry:\n"); - - buf += sprintf(buf, "Address\t\tData\tSize\tValid\tLocked\tSwapin\tiCount\toCount\n"); - - while (*p_addr != 0xffffffff) { - entry = cplb_find_entry(cplb_addr, cplb_data, *p_addr, *p_data); - if (entry >= 0) - used_cplb |= 1 << entry; - - buf += - sprintf(buf, - "0x%08lx\t0x%05lx\t%s\t%c\t%c\t%2d\t%ld\t%ld\n", - *p_addr, *p_data, - page_size_string_table[(*p_data & 0x30000) >> 16], - (*p_data & CPLB_VALID) ? 'Y' : 'N', - (*p_data & CPLB_LOCK) ? 'Y' : 'N', entry, *p_icount, - *p_ocount); - - p_addr += 2; - p_data += 2; - p_icount += 2; - p_ocount += 2; - } - - if (used_cplb != 0xffff) { - buf += sprintf(buf, "Unused/mismatched CPLBs:\n"); - - for (entry = 0; entry < 16; entry++) - if (0 == ((1 << entry) & used_cplb)) { - int flags = cplb_data[entry]; - buf += - sprintf(buf, - "%2d: 0x%08lx\t0x%05x\t%s\t%c\t%c\n", - entry, cplb_addr[entry], flags, - page_size_string_table[(flags & - 0x30000) >> - 16], - (flags & CPLB_VALID) ? 'Y' : 'N', - (flags & CPLB_LOCK) ? 'Y' : 'N'); - } - } - - buf += sprintf(buf, "\n"); - - return buf; -} - -static int cplbinfo_proc_output(char *buf) -{ - char *p; - - p = buf; - - p += sprintf(p, "------------------ CPLB Information ------------------\n\n"); - - if (bfin_read_IMEM_CONTROL() & ENICPLB) - p = cplb_print_entry(p, CPLB_I); - else - p += sprintf(p, "Instruction CPLB is disabled.\n\n"); - - if (bfin_read_DMEM_CONTROL() & ENDCPLB) - p = cplb_print_entry(p, CPLB_D); - else - p += sprintf(p, "Data CPLB is disabled.\n"); - - return p - buf; -} - -static int cplbinfo_read_proc(char *page, char **start, off_t off, - int count, int *eof, void *data) -{ - int len; - - len = cplbinfo_proc_output(page); - if (len <= off + count) - *eof = 1; - *start = page + off; - len -= off; - if (len > count) - len = count; - if (len < 0) - len = 0; - return len; -} - -static int cplbinfo_write_proc(struct file *file, const char __user *buffer, - unsigned long count, void *data) -{ - printk(KERN_INFO "Reset the CPLB swap in/out counts.\n"); - memset(ipdt_swapcount_table, 0, MAX_SWITCH_I_CPLBS * sizeof(unsigned long)); - memset(dpdt_swapcount_table, 0, MAX_SWITCH_D_CPLBS * sizeof(unsigned long)); - - return count; -} - -static int __init cplbinfo_init(void) -{ - struct proc_dir_entry *entry; - - entry = create_proc_entry("cplbinfo", 0, NULL); - if (!entry) - return -ENOMEM; - - entry->read_proc = cplbinfo_read_proc; - entry->write_proc = cplbinfo_write_proc; - entry->data = NULL; - - return 0; -} - -static void __exit cplbinfo_exit(void) -{ - remove_proc_entry("cplbinfo", NULL); -} - -module_init(cplbinfo_init); -module_exit(cplbinfo_exit); diff --git a/arch/blackfin/kernel/cplb-nompu/cplbinit.c b/arch/blackfin/kernel/cplb-nompu/cplbinit.c index 6320bc45fbb..b49a53b583d 100644 --- a/arch/blackfin/kernel/cplb-nompu/cplbinit.c +++ b/arch/blackfin/kernel/cplb-nompu/cplbinit.c @@ -1,437 +1,212 @@ /* * Blackfin CPLB initialization * - * Copyright 2004-2007 Analog Devices Inc. + * Copyright 2007-2009 Analog Devices Inc. * - * Bugs: Enter bugs at http://blackfin.uclinux.org/ - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, see the file COPYING, or write - * to the Free Software Foundation, Inc., - * 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA + * Licensed under the GPL-2 or later. */ + #include <linux/module.h> #include <asm/blackfin.h> +#include <asm/cacheflush.h> #include <asm/cplb.h> #include <asm/cplbinit.h> +#include <asm/mem_map.h> -u_long icplb_table[MAX_CPLBS + 1]; -u_long dcplb_table[MAX_CPLBS + 1]; +struct cplb_entry icplb_tbl[NR_CPUS][MAX_CPLBS] PDT_ATTR; +struct cplb_entry dcplb_tbl[NR_CPUS][MAX_CPLBS] PDT_ATTR; -#ifdef CONFIG_CPLB_SWITCH_TAB_L1 -# define PDT_ATTR __attribute__((l1_data)) -#else -# define PDT_ATTR -#endif +int first_switched_icplb PDT_ATTR; +int first_switched_dcplb PDT_ATTR; -u_long ipdt_table[MAX_SWITCH_I_CPLBS + 1] PDT_ATTR; -u_long dpdt_table[MAX_SWITCH_D_CPLBS + 1] PDT_ATTR; +struct cplb_boundary dcplb_bounds[9] PDT_ATTR; +struct cplb_boundary icplb_bounds[9] PDT_ATTR; -#ifdef CONFIG_CPLB_INFO -u_long ipdt_swapcount_table[MAX_SWITCH_I_CPLBS] PDT_ATTR; -u_long dpdt_swapcount_table[MAX_SWITCH_D_CPLBS] PDT_ATTR; -#endif - -struct s_cplb { - struct cplb_tab init_i; - struct cplb_tab init_d; - struct cplb_tab switch_i; - struct cplb_tab switch_d; -}; +int icplb_nr_bounds PDT_ATTR; +int dcplb_nr_bounds PDT_ATTR; -#if defined(CONFIG_BFIN_DCACHE) || defined(CONFIG_BFIN_ICACHE) -static struct cplb_desc cplb_data[] = { - { - .start = 0, - .end = SIZE_1K, - .psize = SIZE_1K, - .attr = INITIAL_T | SWITCH_T | I_CPLB | D_CPLB, - .i_conf = SDRAM_OOPS, - .d_conf = SDRAM_OOPS, -#if defined(CONFIG_DEBUG_HUNT_FOR_ZERO) - .valid = 1, -#else - .valid = 0, -#endif - .name = "Zero Pointer Guard Page", - }, - { - .start = L1_CODE_START, - .end = L1_CODE_START + L1_CODE_LENGTH, - .psize = SIZE_4M, - .attr = INITIAL_T | SWITCH_T | I_CPLB, - .i_conf = L1_IMEMORY, - .d_conf = 0, - .valid = 1, - .name = "L1 I-Memory", - }, - { - .start = L1_DATA_A_START, - .end = L1_DATA_B_START + L1_DATA_B_LENGTH, - .psize = SIZE_4M, - .attr = INITIAL_T | SWITCH_T | D_CPLB, - .i_conf = 0, - .d_conf = L1_DMEMORY, -#if ((L1_DATA_A_LENGTH > 0) || (L1_DATA_B_LENGTH > 0)) - .valid = 1, -#else - .valid = 0, -#endif - .name = "L1 D-Memory", - }, - { - .start = 0, - .end = 0, /* dynamic */ - .psize = 0, - .attr = INITIAL_T | SWITCH_T | I_CPLB | D_CPLB, - .i_conf = SDRAM_IGENERIC, - .d_conf = SDRAM_DGENERIC, - .valid = 1, - .name = "Kernel Memory", - }, - { - .start = 0, /* dynamic */ - .end = 0, /* dynamic */ - .psize = 0, - .attr = INITIAL_T | SWITCH_T | D_CPLB, - .i_conf = SDRAM_IGENERIC, - .d_conf = SDRAM_DNON_CHBL, - .valid = 1, - .name = "uClinux MTD Memory", - }, - { - .start = 0, /* dynamic */ - .end = 0, /* dynamic */ - .psize = SIZE_1M, - .attr = INITIAL_T | SWITCH_T | D_CPLB, - .d_conf = SDRAM_DNON_CHBL, - .valid = 1, - .name = "Uncached DMA Zone", - }, - { - .start = 0, /* dynamic */ - .end = 0, /* dynamic */ - .psize = 0, - .attr = SWITCH_T | D_CPLB, - .i_conf = 0, /* dynamic */ - .d_conf = 0, /* dynamic */ - .valid = 1, - .name = "Reserved Memory", - }, - { - .start = ASYNC_BANK0_BASE, - .end = ASYNC_BANK3_BASE + ASYNC_BANK3_SIZE, - .psize = 0, - .attr = SWITCH_T | D_CPLB, - .d_conf = SDRAM_EBIU, - .valid = 1, - .name = "Asynchronous Memory Banks", - }, - { -#ifdef L2_START - .start = L2_START, - .end = L2_START + L2_LENGTH, - .psize = SIZE_1M, - .attr = SWITCH_T | I_CPLB | D_CPLB, - .i_conf = L2_MEMORY, - .d_conf = L2_MEMORY, - .valid = 1, -#else - .valid = 0, -#endif - .name = "L2 Memory", - }, - { - .start = BOOT_ROM_START, - .end = BOOT_ROM_START + BOOT_ROM_LENGTH, - .psize = SIZE_1M, - .attr = SWITCH_T | I_CPLB | D_CPLB, - .i_conf = SDRAM_IGENERIC, - .d_conf = SDRAM_DGENERIC, - .valid = 1, - .name = "On-Chip BootROM", - }, -}; - -static u16 __init lock_kernel_check(u32 start, u32 end) -{ - if ((end <= (u32) _end && end >= (u32)_stext) || - (start <= (u32) _end && start >= (u32)_stext)) - return IN_KERNEL; - return 0; -} - -static unsigned short __init -fill_cplbtab(struct cplb_tab *table, - unsigned long start, unsigned long end, - unsigned long block_size, unsigned long cplb_data) +void __init generate_cplb_tables_cpu(unsigned int cpu) { - int i; + int i_d, i_i; + unsigned long addr; + unsigned long cplb_pageflags, cplb_pagesize; - switch (block_size) { - case SIZE_4M: - i = 3; - break; - case SIZE_1M: - i = 2; - break; - case SIZE_4K: - i = 1; - break; - case SIZE_1K: - default: - i = 0; - break; - } + struct cplb_entry *d_tbl = dcplb_tbl[cpu]; + struct cplb_entry *i_tbl = icplb_tbl[cpu]; - cplb_data = (cplb_data & ~(3 << 16)) | (i << 16); + printk(KERN_INFO "NOMPU: setting up cplb tables\n"); - while ((start < end) && (table->pos < table->size)) { + i_d = i_i = 0; - table->tab[table->pos++] = start; +#ifdef CONFIG_DEBUG_HUNT_FOR_ZERO + /* Set up the zero page. */ + d_tbl[i_d].addr = 0; + d_tbl[i_d++].data = SDRAM_OOPS | PAGE_SIZE_1KB; + i_tbl[i_i].addr = 0; + i_tbl[i_i++].data = SDRAM_OOPS | PAGE_SIZE_1KB; +#endif - if (lock_kernel_check(start, start + block_size) == IN_KERNEL) - table->tab[table->pos++] = - cplb_data | CPLB_LOCK | CPLB_DIRTY; - else - table->tab[table->pos++] = cplb_data; + /* Cover kernel memory with 4M pages. */ + addr = 0; - start += block_size; - } - return 0; -} - -static unsigned short __init -close_cplbtab(struct cplb_tab *table) -{ +#ifdef PAGE_SIZE_16MB + cplb_pageflags = PAGE_SIZE_16MB; + cplb_pagesize = SIZE_16M; +#else + cplb_pageflags = PAGE_SIZE_4MB; + cplb_pagesize = SIZE_4M; +#endif - while (table->pos < table->size) { - table->tab[table->pos++] = 0; - table->tab[table->pos++] = 0; /* !CPLB_VALID */ + for (; addr < memory_start; addr += cplb_pagesize) { + d_tbl[i_d].addr = addr; + d_tbl[i_d++].data = SDRAM_DGENERIC | cplb_pageflags; + i_tbl[i_i].addr = addr; + i_tbl[i_i++].data = SDRAM_IGENERIC | cplb_pageflags; } - return 0; -} -/* helper function */ -static void __fill_code_cplbtab(struct cplb_tab *t, int i, u32 a_start, u32 a_end) -{ - if (cplb_data[i].psize) { - fill_cplbtab(t, - cplb_data[i].start, - cplb_data[i].end, - cplb_data[i].psize, - cplb_data[i].i_conf); - } else { -#if defined(CONFIG_BFIN_ICACHE) - if (ANOMALY_05000263 && i == SDRAM_KERN) { - fill_cplbtab(t, - cplb_data[i].start, - cplb_data[i].end, - SIZE_4M, - cplb_data[i].i_conf); - } else +#ifdef CONFIG_ROMKERNEL + /* Cover kernel XIP flash area */ +#ifdef CONFIG_BF60x + addr = CONFIG_ROM_BASE & ~(16 * 1024 * 1024 - 1); + d_tbl[i_d].addr = addr; + d_tbl[i_d++].data = SDRAM_DGENERIC | PAGE_SIZE_16MB; + i_tbl[i_i].addr = addr; + i_tbl[i_i++].data = SDRAM_IGENERIC | PAGE_SIZE_16MB; +#else + addr = CONFIG_ROM_BASE & ~(4 * 1024 * 1024 - 1); + d_tbl[i_d].addr = addr; + d_tbl[i_d++].data = SDRAM_DGENERIC | PAGE_SIZE_4MB; + i_tbl[i_i].addr = addr; + i_tbl[i_i++].data = SDRAM_IGENERIC | PAGE_SIZE_4MB; #endif - { - fill_cplbtab(t, - cplb_data[i].start, - a_start, - SIZE_1M, - cplb_data[i].i_conf); - fill_cplbtab(t, - a_start, - a_end, - SIZE_4M, - cplb_data[i].i_conf); - fill_cplbtab(t, a_end, - cplb_data[i].end, - SIZE_1M, - cplb_data[i].i_conf); +#endif + + /* Cover L1 memory. One 4M area for code and data each is enough. */ + if (cpu == 0) { + if (L1_DATA_A_LENGTH || L1_DATA_B_LENGTH) { + d_tbl[i_d].addr = L1_DATA_A_START; + d_tbl[i_d++].data = L1_DMEMORY | PAGE_SIZE_4MB; } + i_tbl[i_i].addr = L1_CODE_START; + i_tbl[i_i++].data = L1_IMEMORY | PAGE_SIZE_4MB; } -} - -static void __fill_data_cplbtab(struct cplb_tab *t, int i, u32 a_start, u32 a_end) -{ - if (cplb_data[i].psize) { - fill_cplbtab(t, - cplb_data[i].start, - cplb_data[i].end, - cplb_data[i].psize, - cplb_data[i].d_conf); - } else { - fill_cplbtab(t, - cplb_data[i].start, - a_start, SIZE_1M, - cplb_data[i].d_conf); - fill_cplbtab(t, a_start, - a_end, SIZE_4M, - cplb_data[i].d_conf); - fill_cplbtab(t, a_end, - cplb_data[i].end, - SIZE_1M, - cplb_data[i].d_conf); +#ifdef CONFIG_SMP + else { + if (L1_DATA_A_LENGTH || L1_DATA_B_LENGTH) { + d_tbl[i_d].addr = COREB_L1_DATA_A_START; + d_tbl[i_d++].data = L1_DMEMORY | PAGE_SIZE_4MB; + } + i_tbl[i_i].addr = COREB_L1_CODE_START; + i_tbl[i_i++].data = L1_IMEMORY | PAGE_SIZE_4MB; } -} - -void __init generate_cpl_tables(void) -{ - - u16 i, j, process; - u32 a_start, a_end, as, ae, as_1m; - - struct cplb_tab *t_i = NULL; - struct cplb_tab *t_d = NULL; - struct s_cplb cplb; - - cplb.init_i.size = MAX_CPLBS; - cplb.init_d.size = MAX_CPLBS; - cplb.switch_i.size = MAX_SWITCH_I_CPLBS; - cplb.switch_d.size = MAX_SWITCH_D_CPLBS; +#endif + first_switched_dcplb = i_d; + first_switched_icplb = i_i; - cplb.init_i.pos = 0; - cplb.init_d.pos = 0; - cplb.switch_i.pos = 0; - cplb.switch_d.pos = 0; + BUG_ON(first_switched_dcplb > MAX_CPLBS); + BUG_ON(first_switched_icplb > MAX_CPLBS); - cplb.init_i.tab = icplb_table; - cplb.init_d.tab = dcplb_table; - cplb.switch_i.tab = ipdt_table; - cplb.switch_d.tab = dpdt_table; + while (i_d < MAX_CPLBS) + d_tbl[i_d++].data = 0; + while (i_i < MAX_CPLBS) + i_tbl[i_i++].data = 0; +} - cplb_data[SDRAM_KERN].end = memory_end; +void __init generate_cplb_tables_all(void) +{ + unsigned long uncached_end; + int i_d, i_i; + i_d = 0; + /* Normal RAM, including MTD FS. */ #ifdef CONFIG_MTD_UCLINUX - cplb_data[SDRAM_RAM_MTD].start = memory_mtd_start; - cplb_data[SDRAM_RAM_MTD].end = memory_mtd_start + mtd_size; - cplb_data[SDRAM_RAM_MTD].valid = mtd_size > 0; -# if defined(CONFIG_ROMFS_FS) - cplb_data[SDRAM_RAM_MTD].attr |= I_CPLB; - - /* - * The ROMFS_FS size is often not multiple of 1MB. - * This can cause multiple CPLB sets covering the same memory area. - * This will then cause multiple CPLB hit exceptions. - * Workaround: We ensure a contiguous memory area by extending the kernel - * memory section over the mtd section. - * For ROMFS_FS memory must be covered with ICPLBs anyways. - * So there is no difference between kernel and mtd memory setup. - */ - - cplb_data[SDRAM_KERN].end = memory_mtd_start + mtd_size;; - cplb_data[SDRAM_RAM_MTD].valid = 0; - -# endif + uncached_end = memory_mtd_start + mtd_size; #else - cplb_data[SDRAM_RAM_MTD].valid = 0; + uncached_end = memory_end; #endif - - cplb_data[SDRAM_DMAZ].start = _ramend - DMA_UNCACHED_REGION; - cplb_data[SDRAM_DMAZ].end = _ramend; - - cplb_data[RES_MEM].start = _ramend; - cplb_data[RES_MEM].end = physical_mem_end; - - if (reserved_mem_dcache_on) - cplb_data[RES_MEM].d_conf = SDRAM_DGENERIC; - else - cplb_data[RES_MEM].d_conf = SDRAM_DNON_CHBL; - - if (reserved_mem_icache_on) - cplb_data[RES_MEM].i_conf = SDRAM_IGENERIC; + /* + * if DMA uncached is less than 1MB, mark the 1MB chunk as uncached + * so that we don't have to use 4kB pages and cause CPLB thrashing + */ + if ((DMA_UNCACHED_REGION >= 1 * 1024 * 1024) || !DMA_UNCACHED_REGION || + ((_ramend - uncached_end) >= 1 * 1024 * 1024)) + dcplb_bounds[i_d].eaddr = uncached_end; else - cplb_data[RES_MEM].i_conf = SDRAM_INON_CHBL; - - for (i = ZERO_P; i < ARRAY_SIZE(cplb_data); ++i) { - if (!cplb_data[i].valid) - continue; - - as_1m = cplb_data[i].start % SIZE_1M; - - /* We need to make sure all sections are properly 1M aligned - * However between Kernel Memory and the Kernel mtd section, depending on the - * rootfs size, there can be overlapping memory areas. - */ - - if (as_1m && i != L1I_MEM && i != L1D_MEM) { -#ifdef CONFIG_MTD_UCLINUX - if (i == SDRAM_RAM_MTD) { - if ((cplb_data[SDRAM_KERN].end + 1) > cplb_data[SDRAM_RAM_MTD].start) - cplb_data[SDRAM_RAM_MTD].start = (cplb_data[i].start & (-2*SIZE_1M)) + SIZE_1M; - else - cplb_data[SDRAM_RAM_MTD].start = (cplb_data[i].start & (-2*SIZE_1M)); - } else -#endif - printk(KERN_WARNING "Unaligned Start of %s at 0x%X\n", - cplb_data[i].name, cplb_data[i].start); - } - - as = cplb_data[i].start % SIZE_4M; - ae = cplb_data[i].end % SIZE_4M; - - if (as) - a_start = cplb_data[i].start + (SIZE_4M - (as)); - else - a_start = cplb_data[i].start; - - a_end = cplb_data[i].end - ae; - - for (j = INITIAL_T; j <= SWITCH_T; j++) { - - switch (j) { - case INITIAL_T: - if (cplb_data[i].attr & INITIAL_T) { - t_i = &cplb.init_i; - t_d = &cplb.init_d; - process = 1; - } else - process = 0; - break; - case SWITCH_T: - if (cplb_data[i].attr & SWITCH_T) { - t_i = &cplb.switch_i; - t_d = &cplb.switch_d; - process = 1; - } else - process = 0; - break; - default: - process = 0; - break; - } - - if (!process) - continue; - if (cplb_data[i].attr & I_CPLB) - __fill_code_cplbtab(t_i, i, a_start, a_end); - - if (cplb_data[i].attr & D_CPLB) - __fill_data_cplbtab(t_d, i, a_start, a_end); + dcplb_bounds[i_d].eaddr = uncached_end & ~(1 * 1024 * 1024 - 1); + dcplb_bounds[i_d++].data = SDRAM_DGENERIC; + /* DMA uncached region. */ + if (DMA_UNCACHED_REGION) { + dcplb_bounds[i_d].eaddr = _ramend; + dcplb_bounds[i_d++].data = SDRAM_DNON_CHBL; + } + if (_ramend != physical_mem_end) { + /* Reserved memory. */ + dcplb_bounds[i_d].eaddr = physical_mem_end; + dcplb_bounds[i_d++].data = (reserved_mem_dcache_on ? + SDRAM_DGENERIC : SDRAM_DNON_CHBL); + } + /* Addressing hole up to the async bank. */ + dcplb_bounds[i_d].eaddr = ASYNC_BANK0_BASE; + dcplb_bounds[i_d++].data = 0; + /* ASYNC banks. */ + dcplb_bounds[i_d].eaddr = ASYNC_BANK3_BASE + ASYNC_BANK3_SIZE; + dcplb_bounds[i_d++].data = SDRAM_EBIU; + /* Addressing hole up to BootROM. */ + dcplb_bounds[i_d].eaddr = BOOT_ROM_START; + dcplb_bounds[i_d++].data = 0; + /* BootROM -- largest one should be less than 1 meg. */ + dcplb_bounds[i_d].eaddr = BOOT_ROM_START + BOOT_ROM_LENGTH; + dcplb_bounds[i_d++].data = SDRAM_DGENERIC; + if (L2_LENGTH) { + /* Addressing hole up to L2 SRAM. */ + dcplb_bounds[i_d].eaddr = L2_START; + dcplb_bounds[i_d++].data = 0; + /* L2 SRAM. */ + dcplb_bounds[i_d].eaddr = L2_START + L2_LENGTH; + dcplb_bounds[i_d++].data = L2_DMEMORY; + } + dcplb_nr_bounds = i_d; + BUG_ON(dcplb_nr_bounds > ARRAY_SIZE(dcplb_bounds)); + + i_i = 0; + /* Normal RAM, including MTD FS. */ + icplb_bounds[i_i].eaddr = uncached_end; + icplb_bounds[i_i++].data = SDRAM_IGENERIC; + if (_ramend != physical_mem_end) { + /* DMA uncached region. */ + if (DMA_UNCACHED_REGION) { + /* Normally this hole is caught by the async below. */ + icplb_bounds[i_i].eaddr = _ramend; + icplb_bounds[i_i++].data = 0; } + /* Reserved memory. */ + icplb_bounds[i_i].eaddr = physical_mem_end; + icplb_bounds[i_i++].data = (reserved_mem_icache_on ? + SDRAM_IGENERIC : SDRAM_INON_CHBL); } - -/* close tables */ - - close_cplbtab(&cplb.init_i); - close_cplbtab(&cplb.init_d); - - cplb.init_i.tab[cplb.init_i.pos] = -1; - cplb.init_d.tab[cplb.init_d.pos] = -1; - cplb.switch_i.tab[cplb.switch_i.pos] = -1; - cplb.switch_d.tab[cplb.switch_d.pos] = -1; - + /* Addressing hole up to the async bank. */ + icplb_bounds[i_i].eaddr = ASYNC_BANK0_BASE; + icplb_bounds[i_i++].data = 0; + /* ASYNC banks. */ + icplb_bounds[i_i].eaddr = ASYNC_BANK3_BASE + ASYNC_BANK3_SIZE; + icplb_bounds[i_i++].data = SDRAM_EBIU; + /* Addressing hole up to BootROM. */ + icplb_bounds[i_i].eaddr = BOOT_ROM_START; + icplb_bounds[i_i++].data = 0; + /* BootROM -- largest one should be less than 1 meg. */ + icplb_bounds[i_i].eaddr = BOOT_ROM_START + BOOT_ROM_LENGTH; + icplb_bounds[i_i++].data = SDRAM_IGENERIC; + + if (L2_LENGTH) { + /* Addressing hole up to L2 SRAM. */ + icplb_bounds[i_i].eaddr = L2_START; + icplb_bounds[i_i++].data = 0; + /* L2 SRAM. */ + icplb_bounds[i_i].eaddr = L2_START + L2_LENGTH; + icplb_bounds[i_i++].data = L2_IMEMORY; + } + icplb_nr_bounds = i_i; + BUG_ON(icplb_nr_bounds > ARRAY_SIZE(icplb_bounds)); } - -#endif - diff --git a/arch/blackfin/kernel/cplb-nompu/cplbmgr.S b/arch/blackfin/kernel/cplb-nompu/cplbmgr.S deleted file mode 100644 index f5cf3accef3..00000000000 --- a/arch/blackfin/kernel/cplb-nompu/cplbmgr.S +++ /dev/null @@ -1,646 +0,0 @@ -/* - * File: arch/blackfin/mach-common/cplbmgtr.S - * Based on: - * Author: LG Soft India - * - * Created: ? - * Description: CPLB replacement routine for CPLB mismatch - * - * Modified: - * Copyright 2004-2006 Analog Devices Inc. - * - * Bugs: Enter bugs at http://blackfin.uclinux.org/ - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, see the file COPYING, or write - * to the Free Software Foundation, Inc., - * 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA - */ - -/* Usage: int _cplb_mgr(is_data_miss,int enable_cache) - * is_data_miss==2 => Mark as Dirty, write to the clean data page - * is_data_miss==1 => Replace a data CPLB. - * is_data_miss==0 => Replace an instruction CPLB. - * - * Returns: - * CPLB_RELOADED => Successfully updated CPLB table. - * CPLB_NO_UNLOCKED => All CPLBs are locked, so cannot be evicted. - * This indicates that the CPLBs in the configuration - * tablei are badly configured, as this should never - * occur. - * CPLB_NO_ADDR_MATCH => The address being accessed, that triggered the - * exception, is not covered by any of the CPLBs in - * the configuration table. The application is - * presumably misbehaving. - * CPLB_PROT_VIOL => The address being accessed, that triggered the - * exception, was not a first-write to a clean Write - * Back Data page, and so presumably is a genuine - * violation of the page's protection attributes. - * The application is misbehaving. - */ - -#include <linux/linkage.h> -#include <asm/blackfin.h> -#include <asm/cplb.h> - -#ifdef CONFIG_EXCPT_IRQ_SYSC_L1 -.section .l1.text -#else -.text -#endif - -.align 2; -ENTRY(_cplb_mgr) - - [--SP]=( R7:4,P5:3 ); - - CC = R0 == 2; - IF CC JUMP .Ldcplb_write; - - CC = R0 == 0; - IF !CC JUMP .Ldcplb_miss_compare; - - /* ICPLB Miss Exception. We need to choose one of the - * currently-installed CPLBs, and replace it with one - * from the configuration table. - */ - - /* A multi-word instruction can cross a page boundary. This means the - * first part of the instruction can be in a valid page, but the - * second part is not, and hence generates the instruction miss. - * However, the fault address is for the start of the instruction, - * not the part that's in the bad page. Therefore, we have to check - * whether the fault address applies to a page that is already present - * in the table. - */ - - P4.L = LO(ICPLB_FAULT_ADDR); - P4.H = HI(ICPLB_FAULT_ADDR); - - P1 = 16; - P5.L = _page_size_table; - P5.H = _page_size_table; - - P0.L = LO(ICPLB_DATA0); - P0.H = HI(ICPLB_DATA0); - R4 = [P4]; /* Get faulting address*/ - R6 = 64; /* Advance past the fault address, which*/ - R6 = R6 + R4; /* we'll use if we find a match*/ - R3 = ((16 << 8) | 2); /* Extract mask, two bits at posn 16 */ - - R5 = 0; -.Lisearch: - - R1 = [P0-0x100]; /* Address for this CPLB */ - - R0 = [P0++]; /* Info for this CPLB*/ - CC = BITTST(R0,0); /* Is the CPLB valid?*/ - IF !CC JUMP .Lnomatch; /* Skip it, if not.*/ - CC = R4 < R1(IU); /* If fault address less than page start*/ - IF CC JUMP .Lnomatch; /* then skip this one.*/ - R2 = EXTRACT(R0,R3.L) (Z); /* Get page size*/ - P1 = R2; - P1 = P5 + (P1<<2); /* index into page-size table*/ - R2 = [P1]; /* Get the page size*/ - R1 = R1 + R2; /* and add to page start, to get page end*/ - CC = R4 < R1(IU); /* and see whether fault addr is in page.*/ - IF !CC R4 = R6; /* If so, advance the address and finish loop.*/ - IF !CC JUMP .Lisearch_done; -.Lnomatch: - /* Go around again*/ - R5 += 1; - CC = BITTST(R5, 4); /* i.e CC = R5 >= 16*/ - IF !CC JUMP .Lisearch; - -.Lisearch_done: - I0 = R4; /* Fault address we'll search for*/ - - /* set up pointers */ - P0.L = LO(ICPLB_DATA0); - P0.H = HI(ICPLB_DATA0); - - /* The replacement procedure for ICPLBs */ - - P4.L = LO(IMEM_CONTROL); - P4.H = HI(IMEM_CONTROL); - - /* Turn off CPLBs while we work, necessary according to HRM before - * modifying CPLB descriptors - */ - R5 = [P4]; /* Control Register*/ - BITCLR(R5,ENICPLB_P); - CLI R1; - SSYNC; /* SSYNC required before writing to IMEM_CONTROL. */ - .align 8; - [P4] = R5; - SSYNC; - STI R1; - - R1 = -1; /* end point comparison */ - R3 = 16; /* counter */ - - /* Search through CPLBs for first non-locked entry */ - /* Overwrite it by moving everyone else up by 1 */ -.Licheck_lock: - R0 = [P0++]; - R3 = R3 + R1; - CC = R3 == R1; - IF CC JUMP .Lall_locked; - CC = BITTST(R0, 0); /* an invalid entry is good */ - IF !CC JUMP .Lifound_victim; - CC = BITTST(R0,1); /* but a locked entry isn't */ - IF CC JUMP .Licheck_lock; - -.Lifound_victim: -#ifdef CONFIG_CPLB_INFO - R7 = [P0 - 0x104]; - P2.L = _ipdt_table; - P2.H = _ipdt_table; - P3.L = _ipdt_swapcount_table; - P3.H = _ipdt_swapcount_table; - P3 += -4; -.Licount: - R2 = [P2]; /* address from config table */ - P2 += 8; - P3 += 8; - CC = R2==-1; - IF CC JUMP .Licount_done; - CC = R7==R2; - IF !CC JUMP .Licount; - R7 = [P3]; - R7 += 1; - [P3] = R7; - CSYNC; -.Licount_done: -#endif - LC0=R3; - LSETUP(.Lis_move,.Lie_move) LC0; -.Lis_move: - R0 = [P0]; - [P0 - 4] = R0; - R0 = [P0 - 0x100]; - [P0-0x104] = R0; -.Lie_move: - P0+=4; - - /* Clear ICPLB_DATA15, in case we don't find a replacement - * otherwise, we would have a duplicate entry, and will crash - */ - R0 = 0; - [P0 - 4] = R0; - - /* We've made space in the ICPLB table, so that ICPLB15 - * is now free to be overwritten. Next, we have to determine - * which CPLB we need to install, from the configuration - * table. This is a matter of getting the start-of-page - * addresses and page-lengths from the config table, and - * determining whether the fault address falls within that - * range. - */ - - P2.L = _ipdt_table; - P2.H = _ipdt_table; -#ifdef CONFIG_CPLB_INFO - P3.L = _ipdt_swapcount_table; - P3.H = _ipdt_swapcount_table; - P3 += -8; -#endif - P0.L = _page_size_table; - P0.H = _page_size_table; - - /* Retrieve our fault address (which may have been advanced - * because the faulting instruction crossed a page boundary). - */ - - R0 = I0; - - /* An extraction pattern, to get the page-size bits from - * the CPLB data entry. Bits 16-17, so two bits at posn 16. - */ - - R1 = ((16<<8)|2); -.Linext: R4 = [P2++]; /* address from config table */ - R2 = [P2++]; /* data from config table */ -#ifdef CONFIG_CPLB_INFO - P3 += 8; -#endif - - CC = R4 == -1; /* End of config table*/ - IF CC JUMP .Lno_page_in_table; - - /* See if failed address > start address */ - CC = R4 <= R0(IU); - IF !CC JUMP .Linext; - - /* extract page size (17:16)*/ - R3 = EXTRACT(R2, R1.L) (Z); - - /* add page size to addr to get range */ - - P5 = R3; - P5 = P0 + (P5 << 2); /* scaled, for int access*/ - R3 = [P5]; - R3 = R3 + R4; - - /* See if failed address < (start address + page size) */ - CC = R0 < R3(IU); - IF !CC JUMP .Linext; - - /* We've found a CPLB in the config table that covers - * the faulting address, so install this CPLB into the - * last entry of the table. - */ - - P1.L = LO(ICPLB_DATA15); /* ICPLB_DATA15 */ - P1.H = HI(ICPLB_DATA15); - [P1] = R2; - [P1-0x100] = R4; -#ifdef CONFIG_CPLB_INFO - R3 = [P3]; - R3 += 1; - [P3] = R3; -#endif - - /* P4 points to IMEM_CONTROL, and R5 contains its old - * value, after we disabled ICPLBS. Re-enable them. - */ - - BITSET(R5,ENICPLB_P); - CLI R2; - SSYNC; /* SSYNC required before writing to IMEM_CONTROL. */ - .align 8; - [P4] = R5; - SSYNC; - STI R2; - - ( R7:4,P5:3 ) = [SP++]; - R0 = CPLB_RELOADED; - RTS; - -/* FAILED CASES*/ -.Lno_page_in_table: - R0 = CPLB_NO_ADDR_MATCH; - JUMP .Lfail_ret; - -.Lall_locked: - R0 = CPLB_NO_UNLOCKED; - JUMP .Lfail_ret; - -.Lprot_violation: - R0 = CPLB_PROT_VIOL; - -.Lfail_ret: - /* Make sure we turn protection/cache back on, even in the failing case */ - BITSET(R5,ENICPLB_P); - CLI R2; - SSYNC; /* SSYNC required before writing to IMEM_CONTROL. */ - .align 8; - [P4] = R5; - SSYNC; - STI R2; - - ( R7:4,P5:3 ) = [SP++]; - RTS; - -.Ldcplb_write: - - /* if a DCPLB is marked as write-back (CPLB_WT==0), and - * it is clean (CPLB_DIRTY==0), then a write to the - * CPLB's page triggers a protection violation. We have to - * mark the CPLB as dirty, to indicate that there are - * pending writes associated with the CPLB. - */ - - P4.L = LO(DCPLB_STATUS); - P4.H = HI(DCPLB_STATUS); - P3.L = LO(DCPLB_DATA0); - P3.H = HI(DCPLB_DATA0); - R5 = [P4]; - - /* A protection violation can be caused by more than just writes - * to a clean WB page, so we have to ensure that: - * - It's a write - * - to a clean WB page - * - and is allowed in the mode the access occurred. - */ - - CC = BITTST(R5, 16); /* ensure it was a write*/ - IF !CC JUMP .Lprot_violation; - - /* to check the rest, we have to retrieve the DCPLB.*/ - - /* The low half of DCPLB_STATUS is a bit mask*/ - - R2 = R5.L (Z); /* indicating which CPLB triggered the event.*/ - R3 = 30; /* so we can use this to determine the offset*/ - R2.L = SIGNBITS R2; - R2 = R2.L (Z); /* into the DCPLB table.*/ - R3 = R3 - R2; - P4 = R3; - P3 = P3 + (P4<<2); - R3 = [P3]; /* Retrieve the CPLB*/ - - /* Now we can check whether it's a clean WB page*/ - - CC = BITTST(R3, 14); /* 0==WB, 1==WT*/ - IF CC JUMP .Lprot_violation; - CC = BITTST(R3, 7); /* 0 == clean, 1 == dirty*/ - IF CC JUMP .Lprot_violation; - - /* Check whether the write is allowed in the mode that was active.*/ - - R2 = 1<<3; /* checking write in user mode*/ - CC = BITTST(R5, 17); /* 0==was user, 1==was super*/ - R5 = CC; - R2 <<= R5; /* if was super, check write in super mode*/ - R2 = R3 & R2; - CC = R2 == 0; - IF CC JUMP .Lprot_violation; - - /* It's a genuine write-to-clean-page.*/ - - BITSET(R3, 7); /* mark as dirty*/ - [P3] = R3; /* and write back.*/ - NOP; - CSYNC; - ( R7:4,P5:3 ) = [SP++]; - R0 = CPLB_RELOADED; - RTS; - -.Ldcplb_miss_compare: - - /* Data CPLB Miss event. We need to choose a CPLB to - * evict, and then locate a new CPLB to install from the - * config table, that covers the faulting address. - */ - - P1.L = LO(DCPLB_DATA15); - P1.H = HI(DCPLB_DATA15); - - P4.L = LO(DCPLB_FAULT_ADDR); - P4.H = HI(DCPLB_FAULT_ADDR); - R4 = [P4]; - I0 = R4; - - /* The replacement procedure for DCPLBs*/ - - R6 = R1; /* Save for later*/ - - /* Turn off CPLBs while we work.*/ - P4.L = LO(DMEM_CONTROL); - P4.H = HI(DMEM_CONTROL); - R5 = [P4]; - BITCLR(R5,ENDCPLB_P); - CLI R0; - SSYNC; /* SSYNC required before writing to DMEM_CONTROL. */ - .align 8; - [P4] = R5; - SSYNC; - STI R0; - - /* Start looking for a CPLB to evict. Our order of preference - * is: invalid CPLBs, clean CPLBs, dirty CPLBs. Locked CPLBs - * are no good. - */ - - I1.L = LO(DCPLB_DATA0); - I1.H = HI(DCPLB_DATA0); - P1 = 2; - P2 = 16; - I2.L = _dcplb_preference; - I2.H = _dcplb_preference; - LSETUP(.Lsdsearch1, .Ledsearch1) LC0 = P1; -.Lsdsearch1: - R0 = [I2++]; /* Get the bits we're interested in*/ - P0 = I1; /* Go back to start of table*/ - LSETUP (.Lsdsearch2, .Ledsearch2) LC1 = P2; -.Lsdsearch2: - R1 = [P0++]; /* Fetch each installed CPLB in turn*/ - R2 = R1 & R0; /* and test for interesting bits.*/ - CC = R2 == 0; /* If none are set, it'll do.*/ - IF !CC JUMP .Lskip_stack_check; - - R2 = [P0 - 0x104]; /* R2 - PageStart */ - P3.L = _page_size_table; /* retrieve end address */ - P3.H = _page_size_table; /* retrieve end address */ - R3 = 0x1002; /* 16th - position, 2 bits -length */ -#if ANOMALY_05000209 - nop; /* Anomaly 05000209 */ -#endif - R7 = EXTRACT(R1,R3.l); - R7 = R7 << 2; /* Page size index offset */ - P5 = R7; - P3 = P3 + P5; - R7 = [P3]; /* page size in bytes */ - - R7 = R2 + R7; /* R7 - PageEnd */ - R4 = SP; /* Test SP is in range */ - - CC = R7 < R4; /* if PageEnd < SP */ - IF CC JUMP .Ldfound_victim; - R3 = 0x284; /* stack length from start of trap till - * the point. - * 20 stack locations for future modifications - */ - R4 = R4 + R3; - CC = R4 < R2; /* if SP + stacklen < PageStart */ - IF CC JUMP .Ldfound_victim; -.Lskip_stack_check: - -.Ledsearch2: NOP; -.Ledsearch1: NOP; - - /* If we got here, we didn't find a DCPLB we considered - * replacable, which means all of them were locked. - */ - - JUMP .Lall_locked; -.Ldfound_victim: - -#ifdef CONFIG_CPLB_INFO - R7 = [P0 - 0x104]; - P2.L = _dpdt_table; - P2.H = _dpdt_table; - P3.L = _dpdt_swapcount_table; - P3.H = _dpdt_swapcount_table; - P3 += -4; -.Ldicount: - R2 = [P2]; - P2 += 8; - P3 += 8; - CC = R2==-1; - IF CC JUMP .Ldicount_done; - CC = R7==R2; - IF !CC JUMP .Ldicount; - R7 = [P3]; - R7 += 1; - [P3] = R7; -.Ldicount_done: -#endif - - /* Clean down the hardware loops*/ - R2 = 0; - LC1 = R2; - LC0 = R2; - - /* There's a suitable victim in [P0-4] (because we've - * advanced already). - */ - -.LDdoverwrite: - - /* [P0-4] is a suitable victim CPLB, so we want to - * overwrite it by moving all the following CPLBs - * one space closer to the start. - */ - - R1.L = LO(DCPLB_DATA16); /* DCPLB_DATA15 + 4 */ - R1.H = HI(DCPLB_DATA16); - R0 = P0; - - /* If the victim happens to be in DCPLB15, - * we don't need to move anything. - */ - - CC = R1 == R0; - IF CC JUMP .Lde_moved; - R1 = R1 - R0; - R1 >>= 2; - P1 = R1; - LSETUP(.Lds_move, .Lde_move) LC0=P1; -.Lds_move: - R0 = [P0++]; /* move data */ - [P0 - 8] = R0; - R0 = [P0-0x104] /* move address */ -.Lde_move: - [P0-0x108] = R0; - -.Lde_moved: - NOP; - - /* Clear DCPLB_DATA15, in case we don't find a replacement - * otherwise, we would have a duplicate entry, and will crash - */ - R0 = 0; - [P0 - 0x4] = R0; - - /* We've now made space in DCPLB15 for the new CPLB to be - * installed. The next stage is to locate a CPLB in the - * config table that covers the faulting address. - */ - - R0 = I0; /* Our faulting address */ - - P2.L = _dpdt_table; - P2.H = _dpdt_table; -#ifdef CONFIG_CPLB_INFO - P3.L = _dpdt_swapcount_table; - P3.H = _dpdt_swapcount_table; - P3 += -8; -#endif - - P1.L = _page_size_table; - P1.H = _page_size_table; - - /* An extraction pattern, to retrieve bits 17:16.*/ - - R1 = (16<<8)|2; -.Ldnext: R4 = [P2++]; /* address */ - R2 = [P2++]; /* data */ -#ifdef CONFIG_CPLB_INFO - P3 += 8; -#endif - - CC = R4 == -1; - IF CC JUMP .Lno_page_in_table; - - /* See if failed address > start address */ - CC = R4 <= R0(IU); - IF !CC JUMP .Ldnext; - - /* extract page size (17:16)*/ - R3 = EXTRACT(R2, R1.L) (Z); - - /* add page size to addr to get range */ - - P5 = R3; - P5 = P1 + (P5 << 2); - R3 = [P5]; - R3 = R3 + R4; - - /* See if failed address < (start address + page size) */ - CC = R0 < R3(IU); - IF !CC JUMP .Ldnext; - - /* We've found the CPLB that should be installed, so - * write it into CPLB15, masking off any caching bits - * if necessary. - */ - - P1.L = LO(DCPLB_DATA15); - P1.H = HI(DCPLB_DATA15); - - /* If the DCPLB has cache bits set, but caching hasn't - * been enabled, then we want to mask off the cache-in-L1 - * bit before installing. Moreover, if caching is off, we - * also want to ensure that the DCPLB has WT mode set, rather - * than WB, since WB pages still trigger first-write exceptions - * even when not caching is off, and the page isn't marked as - * cachable. Finally, we could mark the page as clean, not dirty, - * but we choose to leave that decision to the user; if the user - * chooses to have a CPLB pre-defined as dirty, then they always - * pay the cost of flushing during eviction, but don't pay the - * cost of first-write exceptions to mark the page as dirty. - */ - -#ifdef CONFIG_BFIN_WT - BITSET(R6, 14); /* Set WT*/ -#endif - - [P1] = R2; - [P1-0x100] = R4; -#ifdef CONFIG_CPLB_INFO - R3 = [P3]; - R3 += 1; - [P3] = R3; -#endif - - /* We've installed the CPLB, so re-enable CPLBs. P4 - * points to DMEM_CONTROL, and R5 is the value we - * last wrote to it, when we were disabling CPLBs. - */ - - BITSET(R5,ENDCPLB_P); - CLI R2; - .align 8; - [P4] = R5; - SSYNC; - STI R2; - - ( R7:4,P5:3 ) = [SP++]; - R0 = CPLB_RELOADED; - RTS; -ENDPROC(_cplb_mgr) - -.data -.align 4; -_page_size_table: -.byte4 0x00000400; /* 1K */ -.byte4 0x00001000; /* 4K */ -.byte4 0x00100000; /* 1M */ -.byte4 0x00400000; /* 4M */ - -.align 4; -_dcplb_preference: -.byte4 0x00000001; /* valid bit */ -.byte4 0x00000002; /* lock bit */ diff --git a/arch/blackfin/kernel/cplb-nompu/cplbmgr.c b/arch/blackfin/kernel/cplb-nompu/cplbmgr.c new file mode 100644 index 00000000000..79cc0f6dcdd --- /dev/null +++ b/arch/blackfin/kernel/cplb-nompu/cplbmgr.c @@ -0,0 +1,227 @@ +/* + * Based on: arch/blackfin/kernel/cplb-mpu/cplbmgr.c + * Author: Michael McTernan <mmcternan@airvana.com> + * + * Description: CPLB miss handler. + * + * Modified: + * Copyright 2008 Airvana Inc. + * Copyright 2008-2009 Analog Devices Inc. + * + * Licensed under the GPL-2 or later + */ + +#include <linux/kernel.h> +#include <asm/blackfin.h> +#include <asm/cplbinit.h> +#include <asm/cplb.h> +#include <asm/mmu_context.h> +#include <asm/traps.h> + +/* + * WARNING + * + * This file is compiled with certain -ffixed-reg options. We have to + * make sure not to call any functions here that could clobber these + * registers. + */ + +int nr_dcplb_miss[NR_CPUS], nr_icplb_miss[NR_CPUS]; +int nr_dcplb_supv_miss[NR_CPUS], nr_icplb_supv_miss[NR_CPUS]; +int nr_cplb_flush[NR_CPUS], nr_dcplb_prot[NR_CPUS]; + +#ifdef CONFIG_EXCPT_IRQ_SYSC_L1 +#define MGR_ATTR __attribute__((l1_text)) +#else +#define MGR_ATTR +#endif + +static inline void write_dcplb_data(int cpu, int idx, unsigned long data, + unsigned long addr) +{ + _disable_dcplb(); + bfin_write32(DCPLB_DATA0 + idx * 4, data); + bfin_write32(DCPLB_ADDR0 + idx * 4, addr); + _enable_dcplb(); + +#ifdef CONFIG_CPLB_INFO + dcplb_tbl[cpu][idx].addr = addr; + dcplb_tbl[cpu][idx].data = data; +#endif +} + +static inline void write_icplb_data(int cpu, int idx, unsigned long data, + unsigned long addr) +{ + _disable_icplb(); + bfin_write32(ICPLB_DATA0 + idx * 4, data); + bfin_write32(ICPLB_ADDR0 + idx * 4, addr); + _enable_icplb(); + +#ifdef CONFIG_CPLB_INFO + icplb_tbl[cpu][idx].addr = addr; + icplb_tbl[cpu][idx].data = data; +#endif +} + +/* Counters to implement round-robin replacement. */ +static int icplb_rr_index[NR_CPUS] PDT_ATTR; +static int dcplb_rr_index[NR_CPUS] PDT_ATTR; + +/* + * Find an ICPLB entry to be evicted and return its index. + */ +static int evict_one_icplb(int cpu) +{ + int i = first_switched_icplb + icplb_rr_index[cpu]; + if (i >= MAX_CPLBS) { + i -= MAX_CPLBS - first_switched_icplb; + icplb_rr_index[cpu] -= MAX_CPLBS - first_switched_icplb; + } + icplb_rr_index[cpu]++; + return i; +} + +static int evict_one_dcplb(int cpu) +{ + int i = first_switched_dcplb + dcplb_rr_index[cpu]; + if (i >= MAX_CPLBS) { + i -= MAX_CPLBS - first_switched_dcplb; + dcplb_rr_index[cpu] -= MAX_CPLBS - first_switched_dcplb; + } + dcplb_rr_index[cpu]++; + return i; +} + +MGR_ATTR static int icplb_miss(int cpu) +{ + unsigned long addr = bfin_read_ICPLB_FAULT_ADDR(); + int status = bfin_read_ICPLB_STATUS(); + int idx; + unsigned long i_data, base, addr1, eaddr; + + nr_icplb_miss[cpu]++; + if (unlikely(status & FAULT_USERSUPV)) + nr_icplb_supv_miss[cpu]++; + + base = 0; + idx = 0; + do { + eaddr = icplb_bounds[idx].eaddr; + if (addr < eaddr) + break; + base = eaddr; + } while (++idx < icplb_nr_bounds); + + if (unlikely(idx == icplb_nr_bounds)) + return CPLB_NO_ADDR_MATCH; + + i_data = icplb_bounds[idx].data; + if (unlikely(i_data == 0)) + return CPLB_NO_ADDR_MATCH; + + addr1 = addr & ~(SIZE_4M - 1); + addr &= ~(SIZE_1M - 1); + i_data |= PAGE_SIZE_1MB; + if (addr1 >= base && (addr1 + SIZE_4M) <= eaddr) { + /* + * This works because + * (PAGE_SIZE_4MB & PAGE_SIZE_1MB) == PAGE_SIZE_1MB. + */ + i_data |= PAGE_SIZE_4MB; + addr = addr1; + } + + /* Pick entry to evict */ + idx = evict_one_icplb(cpu); + + write_icplb_data(cpu, idx, i_data, addr); + + return CPLB_RELOADED; +} + +MGR_ATTR static int dcplb_miss(int cpu) +{ + unsigned long addr = bfin_read_DCPLB_FAULT_ADDR(); + int status = bfin_read_DCPLB_STATUS(); + int idx; + unsigned long d_data, base, addr1, eaddr, cplb_pagesize, cplb_pageflags; + + nr_dcplb_miss[cpu]++; + if (unlikely(status & FAULT_USERSUPV)) + nr_dcplb_supv_miss[cpu]++; + + base = 0; + idx = 0; + do { + eaddr = dcplb_bounds[idx].eaddr; + if (addr < eaddr) + break; + base = eaddr; + } while (++idx < dcplb_nr_bounds); + + if (unlikely(idx == dcplb_nr_bounds)) + return CPLB_NO_ADDR_MATCH; + + d_data = dcplb_bounds[idx].data; + if (unlikely(d_data == 0)) + return CPLB_NO_ADDR_MATCH; + + addr &= ~(SIZE_1M - 1); + d_data |= PAGE_SIZE_1MB; + + /* BF60x support large than 4M CPLB page size */ +#ifdef PAGE_SIZE_16MB + cplb_pageflags = PAGE_SIZE_16MB; + cplb_pagesize = SIZE_16M; +#else + cplb_pageflags = PAGE_SIZE_4MB; + cplb_pagesize = SIZE_4M; +#endif + +find_pagesize: + addr1 = addr & ~(cplb_pagesize - 1); + if (addr1 >= base && (addr1 + cplb_pagesize) <= eaddr) { + /* + * This works because + * (PAGE_SIZE_4MB & PAGE_SIZE_1MB) == PAGE_SIZE_1MB. + */ + d_data |= cplb_pageflags; + addr = addr1; + goto found_pagesize; + } else { + if (cplb_pagesize > SIZE_4M) { + cplb_pageflags = PAGE_SIZE_4MB; + cplb_pagesize = SIZE_4M; + goto find_pagesize; + } + } + +found_pagesize: +#ifdef CONFIG_BF60x + if ((addr >= ASYNC_BANK0_BASE) + && (addr < ASYNC_BANK3_BASE + ASYNC_BANK3_SIZE)) + d_data |= PAGE_SIZE_64MB; +#endif + + /* Pick entry to evict */ + idx = evict_one_dcplb(cpu); + + write_dcplb_data(cpu, idx, d_data, addr); + + return CPLB_RELOADED; +} + +MGR_ATTR int cplb_hdr(int seqstat, struct pt_regs *regs) +{ + int cause = seqstat & 0x3f; + unsigned int cpu = raw_smp_processor_id(); + switch (cause) { + case VEC_CPLB_I_M: + return icplb_miss(cpu); + case VEC_CPLB_M: + return dcplb_miss(cpu); + default: + return CPLB_UNKNOWN_ERR; + } +} diff --git a/arch/blackfin/kernel/cplbinfo.c b/arch/blackfin/kernel/cplbinfo.c new file mode 100644 index 00000000000..5b80d59e66e --- /dev/null +++ b/arch/blackfin/kernel/cplbinfo.c @@ -0,0 +1,180 @@ +/* + * arch/blackfin/kernel/cplbinfo.c - display CPLB status + * + * Copyright 2004-2008 Analog Devices Inc. + * + * Licensed under the GPL-2 or later. + */ + +#include <linux/ctype.h> +#include <linux/module.h> +#include <linux/kernel.h> +#include <linux/init.h> +#include <linux/proc_fs.h> +#include <linux/seq_file.h> +#include <linux/uaccess.h> + +#include <asm/cplbinit.h> +#include <asm/blackfin.h> + +static char const page_strtbl[][4] = { + "1K", "4K", "1M", "4M", +#ifdef CONFIG_BF60x + "16K", "64K", "16M", "64M", +#endif +}; +#define page(flags) (((flags) & 0x70000) >> 16) +#define strpage(flags) page_strtbl[page(flags)] + +struct cplbinfo_data { + loff_t pos; + char cplb_type; + u32 mem_control; + struct cplb_entry *tbl; + int switched; +}; + +static void cplbinfo_print_header(struct seq_file *m) +{ + seq_printf(m, "Index\tAddress\t\tData\tSize\tU/RD\tU/WR\tS/WR\tSwitch\n"); +} + +static int cplbinfo_nomore(struct cplbinfo_data *cdata) +{ + return cdata->pos >= MAX_CPLBS; +} + +static int cplbinfo_show(struct seq_file *m, void *p) +{ + struct cplbinfo_data *cdata; + unsigned long data, addr; + loff_t pos; + + cdata = p; + pos = cdata->pos; + addr = cdata->tbl[pos].addr; + data = cdata->tbl[pos].data; + + seq_printf(m, + "%d\t0x%08lx\t%05lx\t%s\t%c\t%c\t%c\t%c\n", + (int)pos, addr, data, strpage(data), + (data & CPLB_USER_RD) ? 'Y' : 'N', + (data & CPLB_USER_WR) ? 'Y' : 'N', + (data & CPLB_SUPV_WR) ? 'Y' : 'N', + pos < cdata->switched ? 'N' : 'Y'); + + return 0; +} + +static void cplbinfo_seq_init(struct cplbinfo_data *cdata, unsigned int cpu) +{ + if (cdata->cplb_type == 'I') { + cdata->mem_control = bfin_read_IMEM_CONTROL(); + cdata->tbl = icplb_tbl[cpu]; + cdata->switched = first_switched_icplb; + } else { + cdata->mem_control = bfin_read_DMEM_CONTROL(); + cdata->tbl = dcplb_tbl[cpu]; + cdata->switched = first_switched_dcplb; + } +} + +static void *cplbinfo_start(struct seq_file *m, loff_t *pos) +{ + struct cplbinfo_data *cdata = m->private; + + if (!*pos) { + seq_printf(m, "%cCPLBs are %sabled: 0x%x\n", cdata->cplb_type, + (cdata->mem_control & ENDCPLB ? "en" : "dis"), + cdata->mem_control); + cplbinfo_print_header(m); + } else if (cplbinfo_nomore(cdata)) + return NULL; + + get_cpu(); + return cdata; +} + +static void *cplbinfo_next(struct seq_file *m, void *p, loff_t *pos) +{ + struct cplbinfo_data *cdata = p; + cdata->pos = ++(*pos); + if (cplbinfo_nomore(cdata)) + return NULL; + else + return cdata; +} + +static void cplbinfo_stop(struct seq_file *m, void *p) +{ + put_cpu(); +} + +static const struct seq_operations cplbinfo_sops = { + .start = cplbinfo_start, + .next = cplbinfo_next, + .stop = cplbinfo_stop, + .show = cplbinfo_show, +}; + +#define CPLBINFO_DCPLB_FLAG 0x80000000 + +static int cplbinfo_open(struct inode *inode, struct file *file) +{ + char cplb_type; + unsigned int cpu = (unsigned long)PDE_DATA(file_inode(file)); + int ret; + struct seq_file *m; + struct cplbinfo_data *cdata; + + cplb_type = cpu & CPLBINFO_DCPLB_FLAG ? 'D' : 'I'; + cpu &= ~CPLBINFO_DCPLB_FLAG; + + if (!cpu_online(cpu)) + return -ENODEV; + + ret = seq_open_private(file, &cplbinfo_sops, sizeof(*cdata)); + if (ret) + return ret; + m = file->private_data; + cdata = m->private; + + cdata->pos = 0; + cdata->cplb_type = cplb_type; + cplbinfo_seq_init(cdata, cpu); + + return 0; +} + +static const struct file_operations cplbinfo_fops = { + .open = cplbinfo_open, + .read = seq_read, + .llseek = seq_lseek, + .release = seq_release_private, +}; + +static int __init cplbinfo_init(void) +{ + struct proc_dir_entry *cplb_dir, *cpu_dir; + char buf[10]; + unsigned int cpu; + + cplb_dir = proc_mkdir("cplbinfo", NULL); + if (!cplb_dir) + return -ENOMEM; + + for_each_possible_cpu(cpu) { + sprintf(buf, "cpu%i", cpu); + cpu_dir = proc_mkdir(buf, cplb_dir); + if (!cpu_dir) + return -ENOMEM; + + proc_create_data("icplb", S_IRUGO, cpu_dir, &cplbinfo_fops, + (void *)cpu); + proc_create_data("dcplb", S_IRUGO, cpu_dir, &cplbinfo_fops, + (void *)(cpu | CPLBINFO_DCPLB_FLAG)); + } + + return 0; +} +late_initcall(cplbinfo_init); diff --git a/arch/blackfin/kernel/debug-mmrs.c b/arch/blackfin/kernel/debug-mmrs.c new file mode 100644 index 00000000000..947ad083233 --- /dev/null +++ b/arch/blackfin/kernel/debug-mmrs.c @@ -0,0 +1,1893 @@ +/* + * debugfs interface to core/system MMRs + * + * Copyright 2007-2011 Analog Devices Inc. + * + * Licensed under the GPL-2 or later + */ + +#include <linux/debugfs.h> +#include <linux/fs.h> +#include <linux/kernel.h> +#include <linux/module.h> +#include <linux/i2c/bfin_twi.h> + +#include <asm/blackfin.h> +#include <asm/gpio.h> +#include <asm/gptimers.h> +#include <asm/bfin_can.h> +#include <asm/bfin_dma.h> +#include <asm/bfin_ppi.h> +#include <asm/bfin_serial.h> +#include <asm/bfin5xx_spi.h> +#include <asm/bfin_twi.h> + +/* Common code defines PORT_MUX on us, so redirect the MMR back locally */ +#ifdef BFIN_PORT_MUX +#undef PORT_MUX +#define PORT_MUX BFIN_PORT_MUX +#endif + +#define _d(name, bits, addr, perms) debugfs_create_x##bits(name, perms, parent, (u##bits *)(addr)) +#define d(name, bits, addr) _d(name, bits, addr, S_IRUSR|S_IWUSR) +#define d_RO(name, bits, addr) _d(name, bits, addr, S_IRUSR) +#define d_WO(name, bits, addr) _d(name, bits, addr, S_IWUSR) + +#define D_RO(name, bits) d_RO(#name, bits, name) +#define D_WO(name, bits) d_WO(#name, bits, name) +#define D32(name) d(#name, 32, name) +#define D16(name) d(#name, 16, name) + +#define REGS_OFF(peri, mmr) offsetof(struct bfin_##peri##_regs, mmr) +#define __REGS(peri, sname, rname) \ + do { \ + struct bfin_##peri##_regs r; \ + void *addr = (void *)(base + REGS_OFF(peri, rname)); \ + strcpy(_buf, sname); \ + if (sizeof(r.rname) == 2) \ + debugfs_create_x16(buf, S_IRUSR|S_IWUSR, parent, addr); \ + else \ + debugfs_create_x32(buf, S_IRUSR|S_IWUSR, parent, addr); \ + } while (0) +#define REGS_STR_PFX(buf, pfx, num) \ + ({ \ + buf + (num >= 0 ? \ + sprintf(buf, #pfx "%i_", num) : \ + sprintf(buf, #pfx "_")); \ + }) +#define REGS_STR_PFX_C(buf, pfx, num) \ + ({ \ + buf + (num >= 0 ? \ + sprintf(buf, #pfx "%c_", 'A' + num) : \ + sprintf(buf, #pfx "_")); \ + }) + +/* + * Core registers (not memory mapped) + */ +extern u32 last_seqstat; + +static int debug_cclk_get(void *data, u64 *val) +{ + *val = get_cclk(); + return 0; +} +DEFINE_SIMPLE_ATTRIBUTE(fops_debug_cclk, debug_cclk_get, NULL, "0x%08llx\n"); + +static int debug_sclk_get(void *data, u64 *val) +{ + *val = get_sclk(); + return 0; +} +DEFINE_SIMPLE_ATTRIBUTE(fops_debug_sclk, debug_sclk_get, NULL, "0x%08llx\n"); + +#define DEFINE_SYSREG(sr, pre, post) \ +static int sysreg_##sr##_get(void *data, u64 *val) \ +{ \ + unsigned long tmp; \ + pre; \ + __asm__ __volatile__("%0 = " #sr ";" : "=d"(tmp)); \ + *val = tmp; \ + return 0; \ +} \ +static int sysreg_##sr##_set(void *data, u64 val) \ +{ \ + unsigned long tmp = val; \ + __asm__ __volatile__(#sr " = %0;" : : "d"(tmp)); \ + post; \ + return 0; \ +} \ +DEFINE_SIMPLE_ATTRIBUTE(fops_sysreg_##sr, sysreg_##sr##_get, sysreg_##sr##_set, "0x%08llx\n") + +DEFINE_SYSREG(cycles, , ); +DEFINE_SYSREG(cycles2, __asm__ __volatile__("%0 = cycles;" : "=d"(tmp)), ); +DEFINE_SYSREG(emudat, , ); +DEFINE_SYSREG(seqstat, , ); +DEFINE_SYSREG(syscfg, , CSYNC()); +#define D_SYSREG(sr) debugfs_create_file(#sr, S_IRUSR|S_IWUSR, parent, NULL, &fops_sysreg_##sr) + +#ifndef CONFIG_BF60x +/* + * CAN + */ +#define CAN_OFF(mmr) REGS_OFF(can, mmr) +#define __CAN(uname, lname) __REGS(can, #uname, lname) +static void __init __maybe_unused +bfin_debug_mmrs_can(struct dentry *parent, unsigned long base, int num) +{ + static struct dentry *am, *mb; + int i, j; + char buf[32], *_buf = REGS_STR_PFX(buf, CAN, num); + + if (!am) { + am = debugfs_create_dir("am", parent); + mb = debugfs_create_dir("mb", parent); + } + + __CAN(MC1, mc1); + __CAN(MD1, md1); + __CAN(TRS1, trs1); + __CAN(TRR1, trr1); + __CAN(TA1, ta1); + __CAN(AA1, aa1); + __CAN(RMP1, rmp1); + __CAN(RML1, rml1); + __CAN(MBTIF1, mbtif1); + __CAN(MBRIF1, mbrif1); + __CAN(MBIM1, mbim1); + __CAN(RFH1, rfh1); + __CAN(OPSS1, opss1); + + __CAN(MC2, mc2); + __CAN(MD2, md2); + __CAN(TRS2, trs2); + __CAN(TRR2, trr2); + __CAN(TA2, ta2); + __CAN(AA2, aa2); + __CAN(RMP2, rmp2); + __CAN(RML2, rml2); + __CAN(MBTIF2, mbtif2); + __CAN(MBRIF2, mbrif2); + __CAN(MBIM2, mbim2); + __CAN(RFH2, rfh2); + __CAN(OPSS2, opss2); + + __CAN(CLOCK, clock); + __CAN(TIMING, timing); + __CAN(DEBUG, debug); + __CAN(STATUS, status); + __CAN(CEC, cec); + __CAN(GIS, gis); + __CAN(GIM, gim); + __CAN(GIF, gif); + __CAN(CONTROL, control); + __CAN(INTR, intr); + __CAN(VERSION, version); + __CAN(MBTD, mbtd); + __CAN(EWR, ewr); + __CAN(ESR, esr); + /*__CAN(UCREG, ucreg); no longer exists */ + __CAN(UCCNT, uccnt); + __CAN(UCRC, ucrc); + __CAN(UCCNF, uccnf); + __CAN(VERSION2, version2); + + for (i = 0; i < 32; ++i) { + sprintf(_buf, "AM%02iL", i); + debugfs_create_x16(buf, S_IRUSR|S_IWUSR, am, + (u16 *)(base + CAN_OFF(msk[i].aml))); + sprintf(_buf, "AM%02iH", i); + debugfs_create_x16(buf, S_IRUSR|S_IWUSR, am, + (u16 *)(base + CAN_OFF(msk[i].amh))); + + for (j = 0; j < 3; ++j) { + sprintf(_buf, "MB%02i_DATA%i", i, j); + debugfs_create_x16(buf, S_IRUSR|S_IWUSR, mb, + (u16 *)(base + CAN_OFF(chl[i].data[j*2]))); + } + sprintf(_buf, "MB%02i_LENGTH", i); + debugfs_create_x16(buf, S_IRUSR|S_IWUSR, mb, + (u16 *)(base + CAN_OFF(chl[i].dlc))); + sprintf(_buf, "MB%02i_TIMESTAMP", i); + debugfs_create_x16(buf, S_IRUSR|S_IWUSR, mb, + (u16 *)(base + CAN_OFF(chl[i].tsv))); + sprintf(_buf, "MB%02i_ID0", i); + debugfs_create_x16(buf, S_IRUSR|S_IWUSR, mb, + (u16 *)(base + CAN_OFF(chl[i].id0))); + sprintf(_buf, "MB%02i_ID1", i); + debugfs_create_x16(buf, S_IRUSR|S_IWUSR, mb, + (u16 *)(base + CAN_OFF(chl[i].id1))); + } +} +#define CAN(num) bfin_debug_mmrs_can(parent, CAN##num##_MC1, num) + +/* + * DMA + */ +#define __DMA(uname, lname) __REGS(dma, #uname, lname) +static void __init __maybe_unused +bfin_debug_mmrs_dma(struct dentry *parent, unsigned long base, int num, char mdma, const char *pfx) +{ + char buf[32], *_buf; + + if (mdma) + _buf = buf + sprintf(buf, "%s_%c%i_", pfx, mdma, num); + else + _buf = buf + sprintf(buf, "%s%i_", pfx, num); + + __DMA(NEXT_DESC_PTR, next_desc_ptr); + __DMA(START_ADDR, start_addr); + __DMA(CONFIG, config); + __DMA(X_COUNT, x_count); + __DMA(X_MODIFY, x_modify); + __DMA(Y_COUNT, y_count); + __DMA(Y_MODIFY, y_modify); + __DMA(CURR_DESC_PTR, curr_desc_ptr); + __DMA(CURR_ADDR, curr_addr); + __DMA(IRQ_STATUS, irq_status); +#ifndef CONFIG_BF60x + if (strcmp(pfx, "IMDMA") != 0) + __DMA(PERIPHERAL_MAP, peripheral_map); +#endif + __DMA(CURR_X_COUNT, curr_x_count); + __DMA(CURR_Y_COUNT, curr_y_count); +} +#define _DMA(num, base, mdma, pfx) bfin_debug_mmrs_dma(parent, base, num, mdma, pfx "DMA") +#define DMA(num) _DMA(num, DMA##num##_NEXT_DESC_PTR, 0, "") +#define _MDMA(num, x) \ + do { \ + _DMA(num, x##DMA_D##num##_NEXT_DESC_PTR, 'D', #x); \ + _DMA(num, x##DMA_S##num##_NEXT_DESC_PTR, 'S', #x); \ + } while (0) +#define MDMA(num) _MDMA(num, M) +#define IMDMA(num) _MDMA(num, IM) + +/* + * EPPI + */ +#define __EPPI(uname, lname) __REGS(eppi, #uname, lname) +static void __init __maybe_unused +bfin_debug_mmrs_eppi(struct dentry *parent, unsigned long base, int num) +{ + char buf[32], *_buf = REGS_STR_PFX(buf, EPPI, num); + __EPPI(STATUS, status); + __EPPI(HCOUNT, hcount); + __EPPI(HDELAY, hdelay); + __EPPI(VCOUNT, vcount); + __EPPI(VDELAY, vdelay); + __EPPI(FRAME, frame); + __EPPI(LINE, line); + __EPPI(CLKDIV, clkdiv); + __EPPI(CONTROL, control); + __EPPI(FS1W_HBL, fs1w_hbl); + __EPPI(FS1P_AVPL, fs1p_avpl); + __EPPI(FS2W_LVB, fs2w_lvb); + __EPPI(FS2P_LAVF, fs2p_lavf); + __EPPI(CLIP, clip); +} +#define EPPI(num) bfin_debug_mmrs_eppi(parent, EPPI##num##_STATUS, num) + +/* + * General Purpose Timers + */ +#define __GPTIMER(uname, lname) __REGS(gptimer, #uname, lname) +static void __init __maybe_unused +bfin_debug_mmrs_gptimer(struct dentry *parent, unsigned long base, int num) +{ + char buf[32], *_buf = REGS_STR_PFX(buf, TIMER, num); + __GPTIMER(CONFIG, config); + __GPTIMER(COUNTER, counter); + __GPTIMER(PERIOD, period); + __GPTIMER(WIDTH, width); +} +#define GPTIMER(num) bfin_debug_mmrs_gptimer(parent, TIMER##num##_CONFIG, num) + +#define GPTIMER_GROUP_OFF(mmr) REGS_OFF(gptimer_group, mmr) +#define __GPTIMER_GROUP(uname, lname) __REGS(gptimer_group, #uname, lname) +static void __init __maybe_unused +bfin_debug_mmrs_gptimer_group(struct dentry *parent, unsigned long base, int num) +{ + char buf[32], *_buf; + + if (num == -1) { + _buf = buf + sprintf(buf, "TIMER_"); + __GPTIMER_GROUP(ENABLE, enable); + __GPTIMER_GROUP(DISABLE, disable); + __GPTIMER_GROUP(STATUS, status); + } else { + /* These MMRs are a bit odd as the group # is a suffix */ + _buf = buf + sprintf(buf, "TIMER_ENABLE%i", num); + d(buf, 16, base + GPTIMER_GROUP_OFF(enable)); + + _buf = buf + sprintf(buf, "TIMER_DISABLE%i", num); + d(buf, 16, base + GPTIMER_GROUP_OFF(disable)); + + _buf = buf + sprintf(buf, "TIMER_STATUS%i", num); + d(buf, 32, base + GPTIMER_GROUP_OFF(status)); + } +} +#define GPTIMER_GROUP(mmr, num) bfin_debug_mmrs_gptimer_group(parent, mmr, num) + +/* + * Handshake MDMA + */ +#define __HMDMA(uname, lname) __REGS(hmdma, #uname, lname) +static void __init __maybe_unused +bfin_debug_mmrs_hmdma(struct dentry *parent, unsigned long base, int num) +{ + char buf[32], *_buf = REGS_STR_PFX(buf, HMDMA, num); + __HMDMA(CONTROL, control); + __HMDMA(ECINIT, ecinit); + __HMDMA(BCINIT, bcinit); + __HMDMA(ECURGENT, ecurgent); + __HMDMA(ECOVERFLOW, ecoverflow); + __HMDMA(ECOUNT, ecount); + __HMDMA(BCOUNT, bcount); +} +#define HMDMA(num) bfin_debug_mmrs_hmdma(parent, HMDMA##num##_CONTROL, num) + +/* + * Peripheral Interrupts (PINT/GPIO) + */ +#ifdef PINT0_MASK_SET +#define __PINT(uname, lname) __REGS(pint, #uname, lname) +static void __init __maybe_unused +bfin_debug_mmrs_pint(struct dentry *parent, unsigned long base, int num) +{ + char buf[32], *_buf = REGS_STR_PFX(buf, PINT, num); + __PINT(MASK_SET, mask_set); + __PINT(MASK_CLEAR, mask_clear); + __PINT(REQUEST, request); + __PINT(ASSIGN, assign); + __PINT(EDGE_SET, edge_set); + __PINT(EDGE_CLEAR, edge_clear); + __PINT(INVERT_SET, invert_set); + __PINT(INVERT_CLEAR, invert_clear); + __PINT(PINSTATE, pinstate); + __PINT(LATCH, latch); +} +#define PINT(num) bfin_debug_mmrs_pint(parent, PINT##num##_MASK_SET, num) +#endif + +/* + * Port/GPIO + */ +#define bfin_gpio_regs gpio_port_t +#define __PORT(uname, lname) __REGS(gpio, #uname, lname) +static void __init __maybe_unused +bfin_debug_mmrs_port(struct dentry *parent, unsigned long base, int num) +{ + char buf[32], *_buf; +#ifdef __ADSPBF54x__ + _buf = REGS_STR_PFX_C(buf, PORT, num); + __PORT(FER, port_fer); + __PORT(SET, data_set); + __PORT(CLEAR, data_clear); + __PORT(DIR_SET, dir_set); + __PORT(DIR_CLEAR, dir_clear); + __PORT(INEN, inen); + __PORT(MUX, port_mux); +#else + _buf = buf + sprintf(buf, "PORT%cIO_", num); + __PORT(CLEAR, data_clear); + __PORT(SET, data_set); + __PORT(TOGGLE, toggle); + __PORT(MASKA, maska); + __PORT(MASKA_CLEAR, maska_clear); + __PORT(MASKA_SET, maska_set); + __PORT(MASKA_TOGGLE, maska_toggle); + __PORT(MASKB, maskb); + __PORT(MASKB_CLEAR, maskb_clear); + __PORT(MASKB_SET, maskb_set); + __PORT(MASKB_TOGGLE, maskb_toggle); + __PORT(DIR, dir); + __PORT(POLAR, polar); + __PORT(EDGE, edge); + __PORT(BOTH, both); + __PORT(INEN, inen); +#endif + _buf[-1] = '\0'; + d(buf, 16, base + REGS_OFF(gpio, data)); +} +#define PORT(base, num) bfin_debug_mmrs_port(parent, base, num) + +/* + * PPI + */ +#define __PPI(uname, lname) __REGS(ppi, #uname, lname) +static void __init __maybe_unused +bfin_debug_mmrs_ppi(struct dentry *parent, unsigned long base, int num) +{ + char buf[32], *_buf = REGS_STR_PFX(buf, PPI, num); + __PPI(CONTROL, control); + __PPI(STATUS, status); + __PPI(COUNT, count); + __PPI(DELAY, delay); + __PPI(FRAME, frame); +} +#define PPI(num) bfin_debug_mmrs_ppi(parent, PPI##num##_CONTROL, num) + +/* + * SPI + */ +#define __SPI(uname, lname) __REGS(spi, #uname, lname) +static void __init __maybe_unused +bfin_debug_mmrs_spi(struct dentry *parent, unsigned long base, int num) +{ + char buf[32], *_buf = REGS_STR_PFX(buf, SPI, num); + __SPI(CTL, ctl); + __SPI(FLG, flg); + __SPI(STAT, stat); + __SPI(TDBR, tdbr); + __SPI(RDBR, rdbr); + __SPI(BAUD, baud); + __SPI(SHADOW, shadow); +} +#define SPI(num) bfin_debug_mmrs_spi(parent, SPI##num##_REGBASE, num) + +/* + * SPORT + */ +static inline int sport_width(void *mmr) +{ + unsigned long lmmr = (unsigned long)mmr; + if ((lmmr & 0xff) == 0x10) + /* SPORT#_TX has 0x10 offset -> SPORT#_TCR2 has 0x04 offset */ + lmmr -= 0xc; + else + /* SPORT#_RX has 0x18 offset -> SPORT#_RCR2 has 0x24 offset */ + lmmr += 0xc; + /* extract SLEN field from control register 2 and add 1 */ + return (bfin_read16(lmmr) & 0x1f) + 1; +} +static int sport_set(void *mmr, u64 val) +{ + unsigned long flags; + local_irq_save(flags); + if (sport_width(mmr) <= 16) + bfin_write16(mmr, val); + else + bfin_write32(mmr, val); + local_irq_restore(flags); + return 0; +} +static int sport_get(void *mmr, u64 *val) +{ + unsigned long flags; + local_irq_save(flags); + if (sport_width(mmr) <= 16) + *val = bfin_read16(mmr); + else + *val = bfin_read32(mmr); + local_irq_restore(flags); + return 0; +} +DEFINE_SIMPLE_ATTRIBUTE(fops_sport, sport_get, sport_set, "0x%08llx\n"); +/*DEFINE_SIMPLE_ATTRIBUTE(fops_sport_ro, sport_get, NULL, "0x%08llx\n");*/ +DEFINE_SIMPLE_ATTRIBUTE(fops_sport_wo, NULL, sport_set, "0x%08llx\n"); +#define SPORT_OFF(mmr) (SPORT0_##mmr - SPORT0_TCR1) +#define _D_SPORT(name, perms, fops) \ + do { \ + strcpy(_buf, #name); \ + debugfs_create_file(buf, perms, parent, (void *)(base + SPORT_OFF(name)), fops); \ + } while (0) +#define __SPORT_RW(name) _D_SPORT(name, S_IRUSR|S_IWUSR, &fops_sport) +#define __SPORT_RO(name) _D_SPORT(name, S_IRUSR, &fops_sport_ro) +#define __SPORT_WO(name) _D_SPORT(name, S_IWUSR, &fops_sport_wo) +#define __SPORT(name, bits) \ + do { \ + strcpy(_buf, #name); \ + debugfs_create_x##bits(buf, S_IRUSR|S_IWUSR, parent, (u##bits *)(base + SPORT_OFF(name))); \ + } while (0) +static void __init __maybe_unused +bfin_debug_mmrs_sport(struct dentry *parent, unsigned long base, int num) +{ + char buf[32], *_buf = REGS_STR_PFX(buf, SPORT, num); + __SPORT(CHNL, 16); + __SPORT(MCMC1, 16); + __SPORT(MCMC2, 16); + __SPORT(MRCS0, 32); + __SPORT(MRCS1, 32); + __SPORT(MRCS2, 32); + __SPORT(MRCS3, 32); + __SPORT(MTCS0, 32); + __SPORT(MTCS1, 32); + __SPORT(MTCS2, 32); + __SPORT(MTCS3, 32); + __SPORT(RCLKDIV, 16); + __SPORT(RCR1, 16); + __SPORT(RCR2, 16); + __SPORT(RFSDIV, 16); + __SPORT_RW(RX); + __SPORT(STAT, 16); + __SPORT(TCLKDIV, 16); + __SPORT(TCR1, 16); + __SPORT(TCR2, 16); + __SPORT(TFSDIV, 16); + __SPORT_WO(TX); +} +#define SPORT(num) bfin_debug_mmrs_sport(parent, SPORT##num##_TCR1, num) + +/* + * TWI + */ +#define __TWI(uname, lname) __REGS(twi, #uname, lname) +static void __init __maybe_unused +bfin_debug_mmrs_twi(struct dentry *parent, unsigned long base, int num) +{ + char buf[32], *_buf = REGS_STR_PFX(buf, TWI, num); + __TWI(CLKDIV, clkdiv); + __TWI(CONTROL, control); + __TWI(SLAVE_CTL, slave_ctl); + __TWI(SLAVE_STAT, slave_stat); + __TWI(SLAVE_ADDR, slave_addr); + __TWI(MASTER_CTL, master_ctl); + __TWI(MASTER_STAT, master_stat); + __TWI(MASTER_ADDR, master_addr); + __TWI(INT_STAT, int_stat); + __TWI(INT_MASK, int_mask); + __TWI(FIFO_CTL, fifo_ctl); + __TWI(FIFO_STAT, fifo_stat); + __TWI(XMT_DATA8, xmt_data8); + __TWI(XMT_DATA16, xmt_data16); + __TWI(RCV_DATA8, rcv_data8); + __TWI(RCV_DATA16, rcv_data16); +} +#define TWI(num) bfin_debug_mmrs_twi(parent, TWI##num##_CLKDIV, num) + +/* + * UART + */ +#define __UART(uname, lname) __REGS(uart, #uname, lname) +static void __init __maybe_unused +bfin_debug_mmrs_uart(struct dentry *parent, unsigned long base, int num) +{ + char buf[32], *_buf = REGS_STR_PFX(buf, UART, num); +#ifdef BFIN_UART_BF54X_STYLE + __UART(DLL, dll); + __UART(DLH, dlh); + __UART(GCTL, gctl); + __UART(LCR, lcr); + __UART(MCR, mcr); + __UART(LSR, lsr); + __UART(MSR, msr); + __UART(SCR, scr); + __UART(IER_SET, ier_set); + __UART(IER_CLEAR, ier_clear); + __UART(THR, thr); + __UART(RBR, rbr); +#else + __UART(DLL, dll); + __UART(THR, thr); + __UART(RBR, rbr); + __UART(DLH, dlh); + __UART(IER, ier); + __UART(IIR, iir); + __UART(LCR, lcr); + __UART(MCR, mcr); + __UART(LSR, lsr); + __UART(MSR, msr); + __UART(SCR, scr); + __UART(GCTL, gctl); +#endif +} +#define UART(num) bfin_debug_mmrs_uart(parent, UART##num##_DLL, num) +#endif /* CONFIG_BF60x */ +/* + * The actual debugfs generation + */ +static struct dentry *debug_mmrs_dentry; + +static int __init bfin_debug_mmrs_init(void) +{ + struct dentry *top, *parent; + + pr_info("debug-mmrs: setting up Blackfin MMR debugfs\n"); + + top = debugfs_create_dir("blackfin", NULL); + if (top == NULL) + return -1; + + parent = debugfs_create_dir("core_regs", top); + debugfs_create_file("cclk", S_IRUSR, parent, NULL, &fops_debug_cclk); + debugfs_create_file("sclk", S_IRUSR, parent, NULL, &fops_debug_sclk); + debugfs_create_x32("last_seqstat", S_IRUSR, parent, &last_seqstat); + D_SYSREG(cycles); + D_SYSREG(cycles2); + D_SYSREG(emudat); + D_SYSREG(seqstat); + D_SYSREG(syscfg); + + /* Core MMRs */ + parent = debugfs_create_dir("ctimer", top); + D32(TCNTL); + D32(TCOUNT); + D32(TPERIOD); + D32(TSCALE); + + parent = debugfs_create_dir("cec", top); + D32(EVT0); + D32(EVT1); + D32(EVT2); + D32(EVT3); + D32(EVT4); + D32(EVT5); + D32(EVT6); + D32(EVT7); + D32(EVT8); + D32(EVT9); + D32(EVT10); + D32(EVT11); + D32(EVT12); + D32(EVT13); + D32(EVT14); + D32(EVT15); + D32(EVT_OVERRIDE); + D32(IMASK); + D32(IPEND); + D32(ILAT); + D32(IPRIO); + + parent = debugfs_create_dir("debug", top); + D32(DBGSTAT); + D32(DSPID); + + parent = debugfs_create_dir("mmu", top); + D32(SRAM_BASE_ADDRESS); + D32(DCPLB_ADDR0); + D32(DCPLB_ADDR10); + D32(DCPLB_ADDR11); + D32(DCPLB_ADDR12); + D32(DCPLB_ADDR13); + D32(DCPLB_ADDR14); + D32(DCPLB_ADDR15); + D32(DCPLB_ADDR1); + D32(DCPLB_ADDR2); + D32(DCPLB_ADDR3); + D32(DCPLB_ADDR4); + D32(DCPLB_ADDR5); + D32(DCPLB_ADDR6); + D32(DCPLB_ADDR7); + D32(DCPLB_ADDR8); + D32(DCPLB_ADDR9); + D32(DCPLB_DATA0); + D32(DCPLB_DATA10); + D32(DCPLB_DATA11); + D32(DCPLB_DATA12); + D32(DCPLB_DATA13); + D32(DCPLB_DATA14); + D32(DCPLB_DATA15); + D32(DCPLB_DATA1); + D32(DCPLB_DATA2); + D32(DCPLB_DATA3); + D32(DCPLB_DATA4); + D32(DCPLB_DATA5); + D32(DCPLB_DATA6); + D32(DCPLB_DATA7); + D32(DCPLB_DATA8); + D32(DCPLB_DATA9); + D32(DCPLB_FAULT_ADDR); + D32(DCPLB_STATUS); + D32(DMEM_CONTROL); + D32(DTEST_COMMAND); + D32(DTEST_DATA0); + D32(DTEST_DATA1); + + D32(ICPLB_ADDR0); + D32(ICPLB_ADDR1); + D32(ICPLB_ADDR2); + D32(ICPLB_ADDR3); + D32(ICPLB_ADDR4); + D32(ICPLB_ADDR5); + D32(ICPLB_ADDR6); + D32(ICPLB_ADDR7); + D32(ICPLB_ADDR8); + D32(ICPLB_ADDR9); + D32(ICPLB_ADDR10); + D32(ICPLB_ADDR11); + D32(ICPLB_ADDR12); + D32(ICPLB_ADDR13); + D32(ICPLB_ADDR14); + D32(ICPLB_ADDR15); + D32(ICPLB_DATA0); + D32(ICPLB_DATA1); + D32(ICPLB_DATA2); + D32(ICPLB_DATA3); + D32(ICPLB_DATA4); + D32(ICPLB_DATA5); + D32(ICPLB_DATA6); + D32(ICPLB_DATA7); + D32(ICPLB_DATA8); + D32(ICPLB_DATA9); + D32(ICPLB_DATA10); + D32(ICPLB_DATA11); + D32(ICPLB_DATA12); + D32(ICPLB_DATA13); + D32(ICPLB_DATA14); + D32(ICPLB_DATA15); + D32(ICPLB_FAULT_ADDR); + D32(ICPLB_STATUS); + D32(IMEM_CONTROL); + if (!ANOMALY_05000481) { + D32(ITEST_COMMAND); + D32(ITEST_DATA0); + D32(ITEST_DATA1); + } + + parent = debugfs_create_dir("perf", top); + D32(PFCNTR0); + D32(PFCNTR1); + D32(PFCTL); + + parent = debugfs_create_dir("trace", top); + D32(TBUF); + D32(TBUFCTL); + D32(TBUFSTAT); + + parent = debugfs_create_dir("watchpoint", top); + D32(WPIACTL); + D32(WPIA0); + D32(WPIA1); + D32(WPIA2); + D32(WPIA3); + D32(WPIA4); + D32(WPIA5); + D32(WPIACNT0); + D32(WPIACNT1); + D32(WPIACNT2); + D32(WPIACNT3); + D32(WPIACNT4); + D32(WPIACNT5); + D32(WPDACTL); + D32(WPDA0); + D32(WPDA1); + D32(WPDACNT0); + D32(WPDACNT1); + D32(WPSTAT); +#ifndef CONFIG_BF60x + /* System MMRs */ +#ifdef ATAPI_CONTROL + parent = debugfs_create_dir("atapi", top); + D16(ATAPI_CONTROL); + D16(ATAPI_DEV_ADDR); + D16(ATAPI_DEV_RXBUF); + D16(ATAPI_DEV_TXBUF); + D16(ATAPI_DMA_TFRCNT); + D16(ATAPI_INT_MASK); + D16(ATAPI_INT_STATUS); + D16(ATAPI_LINE_STATUS); + D16(ATAPI_MULTI_TIM_0); + D16(ATAPI_MULTI_TIM_1); + D16(ATAPI_MULTI_TIM_2); + D16(ATAPI_PIO_TFRCNT); + D16(ATAPI_PIO_TIM_0); + D16(ATAPI_PIO_TIM_1); + D16(ATAPI_REG_TIM_0); + D16(ATAPI_SM_STATE); + D16(ATAPI_STATUS); + D16(ATAPI_TERMINATE); + D16(ATAPI_UDMAOUT_TFRCNT); + D16(ATAPI_ULTRA_TIM_0); + D16(ATAPI_ULTRA_TIM_1); + D16(ATAPI_ULTRA_TIM_2); + D16(ATAPI_ULTRA_TIM_3); + D16(ATAPI_UMAIN_TFRCNT); + D16(ATAPI_XFER_LEN); +#endif + +#if defined(CAN_MC1) || defined(CAN0_MC1) || defined(CAN1_MC1) + parent = debugfs_create_dir("can", top); +# ifdef CAN_MC1 + bfin_debug_mmrs_can(parent, CAN_MC1, -1); +# endif +# ifdef CAN0_MC1 + CAN(0); +# endif +# ifdef CAN1_MC1 + CAN(1); +# endif +#endif + +#ifdef CNT_COMMAND + parent = debugfs_create_dir("counter", top); + D16(CNT_COMMAND); + D16(CNT_CONFIG); + D32(CNT_COUNTER); + D16(CNT_DEBOUNCE); + D16(CNT_IMASK); + D32(CNT_MAX); + D32(CNT_MIN); + D16(CNT_STATUS); +#endif + + parent = debugfs_create_dir("dmac", top); +#ifdef DMAC_TC_CNT + D16(DMAC_TC_CNT); + D16(DMAC_TC_PER); +#endif +#ifdef DMAC0_TC_CNT + D16(DMAC0_TC_CNT); + D16(DMAC0_TC_PER); +#endif +#ifdef DMAC1_TC_CNT + D16(DMAC1_TC_CNT); + D16(DMAC1_TC_PER); +#endif +#ifdef DMAC1_PERIMUX + D16(DMAC1_PERIMUX); +#endif + +#ifdef __ADSPBF561__ + /* XXX: should rewrite the MMR map */ +# define DMA0_NEXT_DESC_PTR DMA2_0_NEXT_DESC_PTR +# define DMA1_NEXT_DESC_PTR DMA2_1_NEXT_DESC_PTR +# define DMA2_NEXT_DESC_PTR DMA2_2_NEXT_DESC_PTR +# define DMA3_NEXT_DESC_PTR DMA2_3_NEXT_DESC_PTR +# define DMA4_NEXT_DESC_PTR DMA2_4_NEXT_DESC_PTR +# define DMA5_NEXT_DESC_PTR DMA2_5_NEXT_DESC_PTR +# define DMA6_NEXT_DESC_PTR DMA2_6_NEXT_DESC_PTR +# define DMA7_NEXT_DESC_PTR DMA2_7_NEXT_DESC_PTR +# define DMA8_NEXT_DESC_PTR DMA2_8_NEXT_DESC_PTR +# define DMA9_NEXT_DESC_PTR DMA2_9_NEXT_DESC_PTR +# define DMA10_NEXT_DESC_PTR DMA2_10_NEXT_DESC_PTR +# define DMA11_NEXT_DESC_PTR DMA2_11_NEXT_DESC_PTR +# define DMA12_NEXT_DESC_PTR DMA1_0_NEXT_DESC_PTR +# define DMA13_NEXT_DESC_PTR DMA1_1_NEXT_DESC_PTR +# define DMA14_NEXT_DESC_PTR DMA1_2_NEXT_DESC_PTR +# define DMA15_NEXT_DESC_PTR DMA1_3_NEXT_DESC_PTR +# define DMA16_NEXT_DESC_PTR DMA1_4_NEXT_DESC_PTR +# define DMA17_NEXT_DESC_PTR DMA1_5_NEXT_DESC_PTR +# define DMA18_NEXT_DESC_PTR DMA1_6_NEXT_DESC_PTR +# define DMA19_NEXT_DESC_PTR DMA1_7_NEXT_DESC_PTR +# define DMA20_NEXT_DESC_PTR DMA1_8_NEXT_DESC_PTR +# define DMA21_NEXT_DESC_PTR DMA1_9_NEXT_DESC_PTR +# define DMA22_NEXT_DESC_PTR DMA1_10_NEXT_DESC_PTR +# define DMA23_NEXT_DESC_PTR DMA1_11_NEXT_DESC_PTR +#endif + parent = debugfs_create_dir("dma", top); + DMA(0); + DMA(1); + DMA(1); + DMA(2); + DMA(3); + DMA(4); + DMA(5); + DMA(6); + DMA(7); +#ifdef DMA8_NEXT_DESC_PTR + DMA(8); + DMA(9); + DMA(10); + DMA(11); +#endif +#ifdef DMA12_NEXT_DESC_PTR + DMA(12); + DMA(13); + DMA(14); + DMA(15); + DMA(16); + DMA(17); + DMA(18); + DMA(19); +#endif +#ifdef DMA20_NEXT_DESC_PTR + DMA(20); + DMA(21); + DMA(22); + DMA(23); +#endif + + parent = debugfs_create_dir("ebiu_amc", top); + D32(EBIU_AMBCTL0); + D32(EBIU_AMBCTL1); + D16(EBIU_AMGCTL); +#ifdef EBIU_MBSCTL + D16(EBIU_MBSCTL); + D32(EBIU_ARBSTAT); + D32(EBIU_MODE); + D16(EBIU_FCTL); +#endif + +#ifdef EBIU_SDGCTL + parent = debugfs_create_dir("ebiu_sdram", top); +# ifdef __ADSPBF561__ + D32(EBIU_SDBCTL); +# else + D16(EBIU_SDBCTL); +# endif + D32(EBIU_SDGCTL); + D16(EBIU_SDRRC); + D16(EBIU_SDSTAT); +#endif + +#ifdef EBIU_DDRACCT + parent = debugfs_create_dir("ebiu_ddr", top); + D32(EBIU_DDRACCT); + D32(EBIU_DDRARCT); + D32(EBIU_DDRBRC0); + D32(EBIU_DDRBRC1); + D32(EBIU_DDRBRC2); + D32(EBIU_DDRBRC3); + D32(EBIU_DDRBRC4); + D32(EBIU_DDRBRC5); + D32(EBIU_DDRBRC6); + D32(EBIU_DDRBRC7); + D32(EBIU_DDRBWC0); + D32(EBIU_DDRBWC1); + D32(EBIU_DDRBWC2); + D32(EBIU_DDRBWC3); + D32(EBIU_DDRBWC4); + D32(EBIU_DDRBWC5); + D32(EBIU_DDRBWC6); + D32(EBIU_DDRBWC7); + D32(EBIU_DDRCTL0); + D32(EBIU_DDRCTL1); + D32(EBIU_DDRCTL2); + D32(EBIU_DDRCTL3); + D32(EBIU_DDRGC0); + D32(EBIU_DDRGC1); + D32(EBIU_DDRGC2); + D32(EBIU_DDRGC3); + D32(EBIU_DDRMCCL); + D32(EBIU_DDRMCEN); + D32(EBIU_DDRQUE); + D32(EBIU_DDRTACT); + D32(EBIU_ERRADD); + D16(EBIU_ERRMST); + D16(EBIU_RSTCTL); +#endif + +#ifdef EMAC_ADDRHI + parent = debugfs_create_dir("emac", top); + D32(EMAC_ADDRHI); + D32(EMAC_ADDRLO); + D32(EMAC_FLC); + D32(EMAC_HASHHI); + D32(EMAC_HASHLO); + D32(EMAC_MMC_CTL); + D32(EMAC_MMC_RIRQE); + D32(EMAC_MMC_RIRQS); + D32(EMAC_MMC_TIRQE); + D32(EMAC_MMC_TIRQS); + D32(EMAC_OPMODE); + D32(EMAC_RXC_ALIGN); + D32(EMAC_RXC_ALLFRM); + D32(EMAC_RXC_ALLOCT); + D32(EMAC_RXC_BROAD); + D32(EMAC_RXC_DMAOVF); + D32(EMAC_RXC_EQ64); + D32(EMAC_RXC_FCS); + D32(EMAC_RXC_GE1024); + D32(EMAC_RXC_LNERRI); + D32(EMAC_RXC_LNERRO); + D32(EMAC_RXC_LONG); + D32(EMAC_RXC_LT1024); + D32(EMAC_RXC_LT128); + D32(EMAC_RXC_LT256); + D32(EMAC_RXC_LT512); + D32(EMAC_RXC_MACCTL); + D32(EMAC_RXC_MULTI); + D32(EMAC_RXC_OCTET); + D32(EMAC_RXC_OK); + D32(EMAC_RXC_OPCODE); + D32(EMAC_RXC_PAUSE); + D32(EMAC_RXC_SHORT); + D32(EMAC_RXC_TYPED); + D32(EMAC_RXC_UNICST); + D32(EMAC_RX_IRQE); + D32(EMAC_RX_STAT); + D32(EMAC_RX_STKY); + D32(EMAC_STAADD); + D32(EMAC_STADAT); + D32(EMAC_SYSCTL); + D32(EMAC_SYSTAT); + D32(EMAC_TXC_1COL); + D32(EMAC_TXC_ABORT); + D32(EMAC_TXC_ALLFRM); + D32(EMAC_TXC_ALLOCT); + D32(EMAC_TXC_BROAD); + D32(EMAC_TXC_CRSERR); + D32(EMAC_TXC_DEFER); + D32(EMAC_TXC_DMAUND); + D32(EMAC_TXC_EQ64); + D32(EMAC_TXC_GE1024); + D32(EMAC_TXC_GT1COL); + D32(EMAC_TXC_LATECL); + D32(EMAC_TXC_LT1024); + D32(EMAC_TXC_LT128); + D32(EMAC_TXC_LT256); + D32(EMAC_TXC_LT512); + D32(EMAC_TXC_MACCTL); + D32(EMAC_TXC_MULTI); + D32(EMAC_TXC_OCTET); + D32(EMAC_TXC_OK); + D32(EMAC_TXC_UNICST); + D32(EMAC_TXC_XS_COL); + D32(EMAC_TXC_XS_DFR); + D32(EMAC_TX_IRQE); + D32(EMAC_TX_STAT); + D32(EMAC_TX_STKY); + D32(EMAC_VLAN1); + D32(EMAC_VLAN2); + D32(EMAC_WKUP_CTL); + D32(EMAC_WKUP_FFCMD); + D32(EMAC_WKUP_FFCRC0); + D32(EMAC_WKUP_FFCRC1); + D32(EMAC_WKUP_FFMSK0); + D32(EMAC_WKUP_FFMSK1); + D32(EMAC_WKUP_FFMSK2); + D32(EMAC_WKUP_FFMSK3); + D32(EMAC_WKUP_FFOFF); +# ifdef EMAC_PTP_ACCR + D32(EMAC_PTP_ACCR); + D32(EMAC_PTP_ADDEND); + D32(EMAC_PTP_ALARMHI); + D32(EMAC_PTP_ALARMLO); + D16(EMAC_PTP_CTL); + D32(EMAC_PTP_FOFF); + D32(EMAC_PTP_FV1); + D32(EMAC_PTP_FV2); + D32(EMAC_PTP_FV3); + D16(EMAC_PTP_ID_OFF); + D32(EMAC_PTP_ID_SNAP); + D16(EMAC_PTP_IE); + D16(EMAC_PTP_ISTAT); + D32(EMAC_PTP_OFFSET); + D32(EMAC_PTP_PPS_PERIOD); + D32(EMAC_PTP_PPS_STARTHI); + D32(EMAC_PTP_PPS_STARTLO); + D32(EMAC_PTP_RXSNAPHI); + D32(EMAC_PTP_RXSNAPLO); + D32(EMAC_PTP_TIMEHI); + D32(EMAC_PTP_TIMELO); + D32(EMAC_PTP_TXSNAPHI); + D32(EMAC_PTP_TXSNAPLO); +# endif +#endif + +#if defined(EPPI0_STATUS) || defined(EPPI1_STATUS) || defined(EPPI2_STATUS) + parent = debugfs_create_dir("eppi", top); +# ifdef EPPI0_STATUS + EPPI(0); +# endif +# ifdef EPPI1_STATUS + EPPI(1); +# endif +# ifdef EPPI2_STATUS + EPPI(2); +# endif +#endif + + parent = debugfs_create_dir("gptimer", top); +#ifdef TIMER_ENABLE + GPTIMER_GROUP(TIMER_ENABLE, -1); +#endif +#ifdef TIMER_ENABLE0 + GPTIMER_GROUP(TIMER_ENABLE0, 0); +#endif +#ifdef TIMER_ENABLE1 + GPTIMER_GROUP(TIMER_ENABLE1, 1); +#endif + /* XXX: Should convert BF561 MMR names */ +#ifdef TMRS4_DISABLE + GPTIMER_GROUP(TMRS4_ENABLE, 0); + GPTIMER_GROUP(TMRS8_ENABLE, 1); +#endif + GPTIMER(0); + GPTIMER(1); + GPTIMER(2); +#ifdef TIMER3_CONFIG + GPTIMER(3); + GPTIMER(4); + GPTIMER(5); + GPTIMER(6); + GPTIMER(7); +#endif +#ifdef TIMER8_CONFIG + GPTIMER(8); + GPTIMER(9); + GPTIMER(10); +#endif +#ifdef TIMER11_CONFIG + GPTIMER(11); +#endif + +#ifdef HMDMA0_CONTROL + parent = debugfs_create_dir("hmdma", top); + HMDMA(0); + HMDMA(1); +#endif + +#ifdef HOST_CONTROL + parent = debugfs_create_dir("hostdp", top); + D16(HOST_CONTROL); + D16(HOST_STATUS); + D16(HOST_TIMEOUT); +#endif + +#ifdef IMDMA_S0_CONFIG + parent = debugfs_create_dir("imdma", top); + IMDMA(0); + IMDMA(1); +#endif + +#ifdef KPAD_CTL + parent = debugfs_create_dir("keypad", top); + D16(KPAD_CTL); + D16(KPAD_PRESCALE); + D16(KPAD_MSEL); + D16(KPAD_ROWCOL); + D16(KPAD_STAT); + D16(KPAD_SOFTEVAL); +#endif + + parent = debugfs_create_dir("mdma", top); + MDMA(0); + MDMA(1); +#ifdef MDMA_D2_CONFIG + MDMA(2); + MDMA(3); +#endif + +#ifdef MXVR_CONFIG + parent = debugfs_create_dir("mxvr", top); + D16(MXVR_CONFIG); +# ifdef MXVR_PLL_CTL_0 + D32(MXVR_PLL_CTL_0); +# endif + D32(MXVR_STATE_0); + D32(MXVR_STATE_1); + D32(MXVR_INT_STAT_0); + D32(MXVR_INT_STAT_1); + D32(MXVR_INT_EN_0); + D32(MXVR_INT_EN_1); + D16(MXVR_POSITION); + D16(MXVR_MAX_POSITION); + D16(MXVR_DELAY); + D16(MXVR_MAX_DELAY); + D32(MXVR_LADDR); + D16(MXVR_GADDR); + D32(MXVR_AADDR); + D32(MXVR_ALLOC_0); + D32(MXVR_ALLOC_1); + D32(MXVR_ALLOC_2); + D32(MXVR_ALLOC_3); + D32(MXVR_ALLOC_4); + D32(MXVR_ALLOC_5); + D32(MXVR_ALLOC_6); + D32(MXVR_ALLOC_7); + D32(MXVR_ALLOC_8); + D32(MXVR_ALLOC_9); + D32(MXVR_ALLOC_10); + D32(MXVR_ALLOC_11); + D32(MXVR_ALLOC_12); + D32(MXVR_ALLOC_13); + D32(MXVR_ALLOC_14); + D32(MXVR_SYNC_LCHAN_0); + D32(MXVR_SYNC_LCHAN_1); + D32(MXVR_SYNC_LCHAN_2); + D32(MXVR_SYNC_LCHAN_3); + D32(MXVR_SYNC_LCHAN_4); + D32(MXVR_SYNC_LCHAN_5); + D32(MXVR_SYNC_LCHAN_6); + D32(MXVR_SYNC_LCHAN_7); + D32(MXVR_DMA0_CONFIG); + D32(MXVR_DMA0_START_ADDR); + D16(MXVR_DMA0_COUNT); + D32(MXVR_DMA0_CURR_ADDR); + D16(MXVR_DMA0_CURR_COUNT); + D32(MXVR_DMA1_CONFIG); + D32(MXVR_DMA1_START_ADDR); + D16(MXVR_DMA1_COUNT); + D32(MXVR_DMA1_CURR_ADDR); + D16(MXVR_DMA1_CURR_COUNT); + D32(MXVR_DMA2_CONFIG); + D32(MXVR_DMA2_START_ADDR); + D16(MXVR_DMA2_COUNT); + D32(MXVR_DMA2_CURR_ADDR); + D16(MXVR_DMA2_CURR_COUNT); + D32(MXVR_DMA3_CONFIG); + D32(MXVR_DMA3_START_ADDR); + D16(MXVR_DMA3_COUNT); + D32(MXVR_DMA3_CURR_ADDR); + D16(MXVR_DMA3_CURR_COUNT); + D32(MXVR_DMA4_CONFIG); + D32(MXVR_DMA4_START_ADDR); + D16(MXVR_DMA4_COUNT); + D32(MXVR_DMA4_CURR_ADDR); + D16(MXVR_DMA4_CURR_COUNT); + D32(MXVR_DMA5_CONFIG); + D32(MXVR_DMA5_START_ADDR); + D16(MXVR_DMA5_COUNT); + D32(MXVR_DMA5_CURR_ADDR); + D16(MXVR_DMA5_CURR_COUNT); + D32(MXVR_DMA6_CONFIG); + D32(MXVR_DMA6_START_ADDR); + D16(MXVR_DMA6_COUNT); + D32(MXVR_DMA6_CURR_ADDR); + D16(MXVR_DMA6_CURR_COUNT); + D32(MXVR_DMA7_CONFIG); + D32(MXVR_DMA7_START_ADDR); + D16(MXVR_DMA7_COUNT); + D32(MXVR_DMA7_CURR_ADDR); + D16(MXVR_DMA7_CURR_COUNT); + D16(MXVR_AP_CTL); + D32(MXVR_APRB_START_ADDR); + D32(MXVR_APRB_CURR_ADDR); + D32(MXVR_APTB_START_ADDR); + D32(MXVR_APTB_CURR_ADDR); + D32(MXVR_CM_CTL); + D32(MXVR_CMRB_START_ADDR); + D32(MXVR_CMRB_CURR_ADDR); + D32(MXVR_CMTB_START_ADDR); + D32(MXVR_CMTB_CURR_ADDR); + D32(MXVR_RRDB_START_ADDR); + D32(MXVR_RRDB_CURR_ADDR); + D32(MXVR_PAT_DATA_0); + D32(MXVR_PAT_EN_0); + D32(MXVR_PAT_DATA_1); + D32(MXVR_PAT_EN_1); + D16(MXVR_FRAME_CNT_0); + D16(MXVR_FRAME_CNT_1); + D32(MXVR_ROUTING_0); + D32(MXVR_ROUTING_1); + D32(MXVR_ROUTING_2); + D32(MXVR_ROUTING_3); + D32(MXVR_ROUTING_4); + D32(MXVR_ROUTING_5); + D32(MXVR_ROUTING_6); + D32(MXVR_ROUTING_7); + D32(MXVR_ROUTING_8); + D32(MXVR_ROUTING_9); + D32(MXVR_ROUTING_10); + D32(MXVR_ROUTING_11); + D32(MXVR_ROUTING_12); + D32(MXVR_ROUTING_13); + D32(MXVR_ROUTING_14); +# ifdef MXVR_PLL_CTL_1 + D32(MXVR_PLL_CTL_1); +# endif + D16(MXVR_BLOCK_CNT); +# ifdef MXVR_CLK_CTL + D32(MXVR_CLK_CTL); +# endif +# ifdef MXVR_CDRPLL_CTL + D32(MXVR_CDRPLL_CTL); +# endif +# ifdef MXVR_FMPLL_CTL + D32(MXVR_FMPLL_CTL); +# endif +# ifdef MXVR_PIN_CTL + D16(MXVR_PIN_CTL); +# endif +# ifdef MXVR_SCLK_CNT + D16(MXVR_SCLK_CNT); +# endif +#endif + +#ifdef NFC_ADDR + parent = debugfs_create_dir("nfc", top); + D_WO(NFC_ADDR, 16); + D_WO(NFC_CMD, 16); + D_RO(NFC_COUNT, 16); + D16(NFC_CTL); + D_WO(NFC_DATA_RD, 16); + D_WO(NFC_DATA_WR, 16); + D_RO(NFC_ECC0, 16); + D_RO(NFC_ECC1, 16); + D_RO(NFC_ECC2, 16); + D_RO(NFC_ECC3, 16); + D16(NFC_IRQMASK); + D16(NFC_IRQSTAT); + D_WO(NFC_PGCTL, 16); + D_RO(NFC_READ, 16); + D16(NFC_RST); + D_RO(NFC_STAT, 16); +#endif + +#ifdef OTP_CONTROL + parent = debugfs_create_dir("otp", top); + D16(OTP_CONTROL); + D16(OTP_BEN); + D16(OTP_STATUS); + D32(OTP_TIMING); + D32(OTP_DATA0); + D32(OTP_DATA1); + D32(OTP_DATA2); + D32(OTP_DATA3); +#endif + +#ifdef PINT0_MASK_SET + parent = debugfs_create_dir("pint", top); + PINT(0); + PINT(1); + PINT(2); + PINT(3); +#endif + +#ifdef PIXC_CTL + parent = debugfs_create_dir("pixc", top); + D16(PIXC_CTL); + D16(PIXC_PPL); + D16(PIXC_LPF); + D16(PIXC_AHSTART); + D16(PIXC_AHEND); + D16(PIXC_AVSTART); + D16(PIXC_AVEND); + D16(PIXC_ATRANSP); + D16(PIXC_BHSTART); + D16(PIXC_BHEND); + D16(PIXC_BVSTART); + D16(PIXC_BVEND); + D16(PIXC_BTRANSP); + D16(PIXC_INTRSTAT); + D32(PIXC_RYCON); + D32(PIXC_GUCON); + D32(PIXC_BVCON); + D32(PIXC_CCBIAS); + D32(PIXC_TC); +#endif + + parent = debugfs_create_dir("pll", top); + D16(PLL_CTL); + D16(PLL_DIV); + D16(PLL_LOCKCNT); + D16(PLL_STAT); + D16(VR_CTL); + D32(CHIPID); /* it's part of this hardware block */ + +#if defined(PPI_CONTROL) || defined(PPI0_CONTROL) || defined(PPI1_CONTROL) + parent = debugfs_create_dir("ppi", top); +# ifdef PPI_CONTROL + bfin_debug_mmrs_ppi(parent, PPI_CONTROL, -1); +# endif +# ifdef PPI0_CONTROL + PPI(0); +# endif +# ifdef PPI1_CONTROL + PPI(1); +# endif +#endif + +#ifdef PWM_CTRL + parent = debugfs_create_dir("pwm", top); + D16(PWM_CTRL); + D16(PWM_STAT); + D16(PWM_TM); + D16(PWM_DT); + D16(PWM_GATE); + D16(PWM_CHA); + D16(PWM_CHB); + D16(PWM_CHC); + D16(PWM_SEG); + D16(PWM_SYNCWT); + D16(PWM_CHAL); + D16(PWM_CHBL); + D16(PWM_CHCL); + D16(PWM_LSI); + D16(PWM_STAT2); +#endif + +#ifdef RSI_CONFIG + parent = debugfs_create_dir("rsi", top); + D32(RSI_ARGUMENT); + D16(RSI_CEATA_CONTROL); + D16(RSI_CLK_CONTROL); + D16(RSI_COMMAND); + D16(RSI_CONFIG); + D16(RSI_DATA_CNT); + D16(RSI_DATA_CONTROL); + D16(RSI_DATA_LGTH); + D32(RSI_DATA_TIMER); + D16(RSI_EMASK); + D16(RSI_ESTAT); + D32(RSI_FIFO); + D16(RSI_FIFO_CNT); + D32(RSI_MASK0); + D32(RSI_MASK1); + D16(RSI_PID0); + D16(RSI_PID1); + D16(RSI_PID2); + D16(RSI_PID3); + D16(RSI_PID4); + D16(RSI_PID5); + D16(RSI_PID6); + D16(RSI_PID7); + D16(RSI_PWR_CONTROL); + D16(RSI_RD_WAIT_EN); + D32(RSI_RESPONSE0); + D32(RSI_RESPONSE1); + D32(RSI_RESPONSE2); + D32(RSI_RESPONSE3); + D16(RSI_RESP_CMD); + D32(RSI_STATUS); + D_WO(RSI_STATUSCL, 16); +#endif + +#ifdef RTC_ALARM + parent = debugfs_create_dir("rtc", top); + D32(RTC_ALARM); + D16(RTC_ICTL); + D16(RTC_ISTAT); + D16(RTC_PREN); + D32(RTC_STAT); + D16(RTC_SWCNT); +#endif + +#ifdef SDH_CFG + parent = debugfs_create_dir("sdh", top); + D32(SDH_ARGUMENT); + D16(SDH_CFG); + D16(SDH_CLK_CTL); + D16(SDH_COMMAND); + D_RO(SDH_DATA_CNT, 16); + D16(SDH_DATA_CTL); + D16(SDH_DATA_LGTH); + D32(SDH_DATA_TIMER); + D16(SDH_E_MASK); + D16(SDH_E_STATUS); + D32(SDH_FIFO); + D_RO(SDH_FIFO_CNT, 16); + D32(SDH_MASK0); + D32(SDH_MASK1); + D_RO(SDH_PID0, 16); + D_RO(SDH_PID1, 16); + D_RO(SDH_PID2, 16); + D_RO(SDH_PID3, 16); + D_RO(SDH_PID4, 16); + D_RO(SDH_PID5, 16); + D_RO(SDH_PID6, 16); + D_RO(SDH_PID7, 16); + D16(SDH_PWR_CTL); + D16(SDH_RD_WAIT_EN); + D_RO(SDH_RESPONSE0, 32); + D_RO(SDH_RESPONSE1, 32); + D_RO(SDH_RESPONSE2, 32); + D_RO(SDH_RESPONSE3, 32); + D_RO(SDH_RESP_CMD, 16); + D_RO(SDH_STATUS, 32); + D_WO(SDH_STATUS_CLR, 16); +#endif + +#ifdef SECURE_CONTROL + parent = debugfs_create_dir("security", top); + D16(SECURE_CONTROL); + D16(SECURE_STATUS); + D32(SECURE_SYSSWT); +#endif + + parent = debugfs_create_dir("sic", top); + D16(SWRST); + D16(SYSCR); + D16(SIC_RVECT); + D32(SIC_IAR0); + D32(SIC_IAR1); + D32(SIC_IAR2); +#ifdef SIC_IAR3 + D32(SIC_IAR3); +#endif +#ifdef SIC_IAR4 + D32(SIC_IAR4); + D32(SIC_IAR5); + D32(SIC_IAR6); +#endif +#ifdef SIC_IAR7 + D32(SIC_IAR7); +#endif +#ifdef SIC_IAR8 + D32(SIC_IAR8); + D32(SIC_IAR9); + D32(SIC_IAR10); + D32(SIC_IAR11); +#endif +#ifdef SIC_IMASK + D32(SIC_IMASK); + D32(SIC_ISR); + D32(SIC_IWR); +#endif +#ifdef SIC_IMASK0 + D32(SIC_IMASK0); + D32(SIC_IMASK1); + D32(SIC_ISR0); + D32(SIC_ISR1); + D32(SIC_IWR0); + D32(SIC_IWR1); +#endif +#ifdef SIC_IMASK2 + D32(SIC_IMASK2); + D32(SIC_ISR2); + D32(SIC_IWR2); +#endif +#ifdef SICB_RVECT + D16(SICB_SWRST); + D16(SICB_SYSCR); + D16(SICB_RVECT); + D32(SICB_IAR0); + D32(SICB_IAR1); + D32(SICB_IAR2); + D32(SICB_IAR3); + D32(SICB_IAR4); + D32(SICB_IAR5); + D32(SICB_IAR6); + D32(SICB_IAR7); + D32(SICB_IMASK0); + D32(SICB_IMASK1); + D32(SICB_ISR0); + D32(SICB_ISR1); + D32(SICB_IWR0); + D32(SICB_IWR1); +#endif + + parent = debugfs_create_dir("spi", top); +#ifdef SPI0_REGBASE + SPI(0); +#endif +#ifdef SPI1_REGBASE + SPI(1); +#endif +#ifdef SPI2_REGBASE + SPI(2); +#endif + + parent = debugfs_create_dir("sport", top); +#ifdef SPORT0_STAT + SPORT(0); +#endif +#ifdef SPORT1_STAT + SPORT(1); +#endif +#ifdef SPORT2_STAT + SPORT(2); +#endif +#ifdef SPORT3_STAT + SPORT(3); +#endif + +#if defined(TWI_CLKDIV) || defined(TWI0_CLKDIV) || defined(TWI1_CLKDIV) + parent = debugfs_create_dir("twi", top); +# ifdef TWI_CLKDIV + bfin_debug_mmrs_twi(parent, TWI_CLKDIV, -1); +# endif +# ifdef TWI0_CLKDIV + TWI(0); +# endif +# ifdef TWI1_CLKDIV + TWI(1); +# endif +#endif + + parent = debugfs_create_dir("uart", top); +#ifdef BFIN_UART_DLL + bfin_debug_mmrs_uart(parent, BFIN_UART_DLL, -1); +#endif +#ifdef UART0_DLL + UART(0); +#endif +#ifdef UART1_DLL + UART(1); +#endif +#ifdef UART2_DLL + UART(2); +#endif +#ifdef UART3_DLL + UART(3); +#endif + +#ifdef USB_FADDR + parent = debugfs_create_dir("usb", top); + D16(USB_FADDR); + D16(USB_POWER); + D16(USB_INTRTX); + D16(USB_INTRRX); + D16(USB_INTRTXE); + D16(USB_INTRRXE); + D16(USB_INTRUSB); + D16(USB_INTRUSBE); + D16(USB_FRAME); + D16(USB_INDEX); + D16(USB_TESTMODE); + D16(USB_GLOBINTR); + D16(USB_GLOBAL_CTL); + D16(USB_TX_MAX_PACKET); + D16(USB_CSR0); + D16(USB_TXCSR); + D16(USB_RX_MAX_PACKET); + D16(USB_RXCSR); + D16(USB_COUNT0); + D16(USB_RXCOUNT); + D16(USB_TXTYPE); + D16(USB_NAKLIMIT0); + D16(USB_TXINTERVAL); + D16(USB_RXTYPE); + D16(USB_RXINTERVAL); + D16(USB_TXCOUNT); + D16(USB_EP0_FIFO); + D16(USB_EP1_FIFO); + D16(USB_EP2_FIFO); + D16(USB_EP3_FIFO); + D16(USB_EP4_FIFO); + D16(USB_EP5_FIFO); + D16(USB_EP6_FIFO); + D16(USB_EP7_FIFO); + D16(USB_OTG_DEV_CTL); + D16(USB_OTG_VBUS_IRQ); + D16(USB_OTG_VBUS_MASK); + D16(USB_LINKINFO); + D16(USB_VPLEN); + D16(USB_HS_EOF1); + D16(USB_FS_EOF1); + D16(USB_LS_EOF1); + D16(USB_APHY_CNTRL); + D16(USB_APHY_CALIB); + D16(USB_APHY_CNTRL2); + D16(USB_PHY_TEST); + D16(USB_PLLOSC_CTRL); + D16(USB_SRP_CLKDIV); + D16(USB_EP_NI0_TXMAXP); + D16(USB_EP_NI0_TXCSR); + D16(USB_EP_NI0_RXMAXP); + D16(USB_EP_NI0_RXCSR); + D16(USB_EP_NI0_RXCOUNT); + D16(USB_EP_NI0_TXTYPE); + D16(USB_EP_NI0_TXINTERVAL); + D16(USB_EP_NI0_RXTYPE); + D16(USB_EP_NI0_RXINTERVAL); + D16(USB_EP_NI0_TXCOUNT); + D16(USB_EP_NI1_TXMAXP); + D16(USB_EP_NI1_TXCSR); + D16(USB_EP_NI1_RXMAXP); + D16(USB_EP_NI1_RXCSR); + D16(USB_EP_NI1_RXCOUNT); + D16(USB_EP_NI1_TXTYPE); + D16(USB_EP_NI1_TXINTERVAL); + D16(USB_EP_NI1_RXTYPE); + D16(USB_EP_NI1_RXINTERVAL); + D16(USB_EP_NI1_TXCOUNT); + D16(USB_EP_NI2_TXMAXP); + D16(USB_EP_NI2_TXCSR); + D16(USB_EP_NI2_RXMAXP); + D16(USB_EP_NI2_RXCSR); + D16(USB_EP_NI2_RXCOUNT); + D16(USB_EP_NI2_TXTYPE); + D16(USB_EP_NI2_TXINTERVAL); + D16(USB_EP_NI2_RXTYPE); + D16(USB_EP_NI2_RXINTERVAL); + D16(USB_EP_NI2_TXCOUNT); + D16(USB_EP_NI3_TXMAXP); + D16(USB_EP_NI3_TXCSR); + D16(USB_EP_NI3_RXMAXP); + D16(USB_EP_NI3_RXCSR); + D16(USB_EP_NI3_RXCOUNT); + D16(USB_EP_NI3_TXTYPE); + D16(USB_EP_NI3_TXINTERVAL); + D16(USB_EP_NI3_RXTYPE); + D16(USB_EP_NI3_RXINTERVAL); + D16(USB_EP_NI3_TXCOUNT); + D16(USB_EP_NI4_TXMAXP); + D16(USB_EP_NI4_TXCSR); + D16(USB_EP_NI4_RXMAXP); + D16(USB_EP_NI4_RXCSR); + D16(USB_EP_NI4_RXCOUNT); + D16(USB_EP_NI4_TXTYPE); + D16(USB_EP_NI4_TXINTERVAL); + D16(USB_EP_NI4_RXTYPE); + D16(USB_EP_NI4_RXINTERVAL); + D16(USB_EP_NI4_TXCOUNT); + D16(USB_EP_NI5_TXMAXP); + D16(USB_EP_NI5_TXCSR); + D16(USB_EP_NI5_RXMAXP); + D16(USB_EP_NI5_RXCSR); + D16(USB_EP_NI5_RXCOUNT); + D16(USB_EP_NI5_TXTYPE); + D16(USB_EP_NI5_TXINTERVAL); + D16(USB_EP_NI5_RXTYPE); + D16(USB_EP_NI5_RXINTERVAL); + D16(USB_EP_NI5_TXCOUNT); + D16(USB_EP_NI6_TXMAXP); + D16(USB_EP_NI6_TXCSR); + D16(USB_EP_NI6_RXMAXP); + D16(USB_EP_NI6_RXCSR); + D16(USB_EP_NI6_RXCOUNT); + D16(USB_EP_NI6_TXTYPE); + D16(USB_EP_NI6_TXINTERVAL); + D16(USB_EP_NI6_RXTYPE); + D16(USB_EP_NI6_RXINTERVAL); + D16(USB_EP_NI6_TXCOUNT); + D16(USB_EP_NI7_TXMAXP); + D16(USB_EP_NI7_TXCSR); + D16(USB_EP_NI7_RXMAXP); + D16(USB_EP_NI7_RXCSR); + D16(USB_EP_NI7_RXCOUNT); + D16(USB_EP_NI7_TXTYPE); + D16(USB_EP_NI7_TXINTERVAL); + D16(USB_EP_NI7_RXTYPE); + D16(USB_EP_NI7_RXINTERVAL); + D16(USB_EP_NI7_TXCOUNT); + D16(USB_DMA_INTERRUPT); + D16(USB_DMA0CONTROL); + D16(USB_DMA0ADDRLOW); + D16(USB_DMA0ADDRHIGH); + D16(USB_DMA0COUNTLOW); + D16(USB_DMA0COUNTHIGH); + D16(USB_DMA1CONTROL); + D16(USB_DMA1ADDRLOW); + D16(USB_DMA1ADDRHIGH); + D16(USB_DMA1COUNTLOW); + D16(USB_DMA1COUNTHIGH); + D16(USB_DMA2CONTROL); + D16(USB_DMA2ADDRLOW); + D16(USB_DMA2ADDRHIGH); + D16(USB_DMA2COUNTLOW); + D16(USB_DMA2COUNTHIGH); + D16(USB_DMA3CONTROL); + D16(USB_DMA3ADDRLOW); + D16(USB_DMA3ADDRHIGH); + D16(USB_DMA3COUNTLOW); + D16(USB_DMA3COUNTHIGH); + D16(USB_DMA4CONTROL); + D16(USB_DMA4ADDRLOW); + D16(USB_DMA4ADDRHIGH); + D16(USB_DMA4COUNTLOW); + D16(USB_DMA4COUNTHIGH); + D16(USB_DMA5CONTROL); + D16(USB_DMA5ADDRLOW); + D16(USB_DMA5ADDRHIGH); + D16(USB_DMA5COUNTLOW); + D16(USB_DMA5COUNTHIGH); + D16(USB_DMA6CONTROL); + D16(USB_DMA6ADDRLOW); + D16(USB_DMA6ADDRHIGH); + D16(USB_DMA6COUNTLOW); + D16(USB_DMA6COUNTHIGH); + D16(USB_DMA7CONTROL); + D16(USB_DMA7ADDRLOW); + D16(USB_DMA7ADDRHIGH); + D16(USB_DMA7COUNTLOW); + D16(USB_DMA7COUNTHIGH); +#endif + +#ifdef WDOG_CNT + parent = debugfs_create_dir("watchdog", top); + D32(WDOG_CNT); + D16(WDOG_CTL); + D32(WDOG_STAT); +#endif +#ifdef WDOGA_CNT + parent = debugfs_create_dir("watchdog", top); + D32(WDOGA_CNT); + D16(WDOGA_CTL); + D32(WDOGA_STAT); + D32(WDOGB_CNT); + D16(WDOGB_CTL); + D32(WDOGB_STAT); +#endif + + /* BF533 glue */ +#ifdef FIO_FLAG_D +#define PORTFIO FIO_FLAG_D +#endif + /* BF561 glue */ +#ifdef FIO0_FLAG_D +#define PORTFIO FIO0_FLAG_D +#endif +#ifdef FIO1_FLAG_D +#define PORTGIO FIO1_FLAG_D +#endif +#ifdef FIO2_FLAG_D +#define PORTHIO FIO2_FLAG_D +#endif + parent = debugfs_create_dir("port", top); +#ifdef PORTFIO + PORT(PORTFIO, 'F'); +#endif +#ifdef PORTGIO + PORT(PORTGIO, 'G'); +#endif +#ifdef PORTHIO + PORT(PORTHIO, 'H'); +#endif + +#ifdef __ADSPBF51x__ + D16(PORTF_FER); + D16(PORTF_DRIVE); + D16(PORTF_HYSTERESIS); + D16(PORTF_MUX); + + D16(PORTG_FER); + D16(PORTG_DRIVE); + D16(PORTG_HYSTERESIS); + D16(PORTG_MUX); + + D16(PORTH_FER); + D16(PORTH_DRIVE); + D16(PORTH_HYSTERESIS); + D16(PORTH_MUX); + + D16(MISCPORT_DRIVE); + D16(MISCPORT_HYSTERESIS); +#endif /* BF51x */ + +#ifdef __ADSPBF52x__ + D16(PORTF_FER); + D16(PORTF_DRIVE); + D16(PORTF_HYSTERESIS); + D16(PORTF_MUX); + D16(PORTF_SLEW); + + D16(PORTG_FER); + D16(PORTG_DRIVE); + D16(PORTG_HYSTERESIS); + D16(PORTG_MUX); + D16(PORTG_SLEW); + + D16(PORTH_FER); + D16(PORTH_DRIVE); + D16(PORTH_HYSTERESIS); + D16(PORTH_MUX); + D16(PORTH_SLEW); + + D16(MISCPORT_DRIVE); + D16(MISCPORT_HYSTERESIS); + D16(MISCPORT_SLEW); +#endif /* BF52x */ + +#ifdef BF537_FAMILY + D16(PORTF_FER); + D16(PORTG_FER); + D16(PORTH_FER); + D16(PORT_MUX); +#endif /* BF534 BF536 BF537 */ + +#ifdef BF538_FAMILY + D16(PORTCIO_FER); + D16(PORTCIO); + D16(PORTCIO_CLEAR); + D16(PORTCIO_SET); + D16(PORTCIO_TOGGLE); + D16(PORTCIO_DIR); + D16(PORTCIO_INEN); + + D16(PORTDIO); + D16(PORTDIO_CLEAR); + D16(PORTDIO_DIR); + D16(PORTDIO_FER); + D16(PORTDIO_INEN); + D16(PORTDIO_SET); + D16(PORTDIO_TOGGLE); + + D16(PORTEIO); + D16(PORTEIO_CLEAR); + D16(PORTEIO_DIR); + D16(PORTEIO_FER); + D16(PORTEIO_INEN); + D16(PORTEIO_SET); + D16(PORTEIO_TOGGLE); +#endif /* BF538 BF539 */ + +#ifdef __ADSPBF54x__ + { + int num; + unsigned long base; + + base = PORTA_FER; + for (num = 0; num < 10; ++num) { + PORT(base, num); + base += sizeof(struct bfin_gpio_regs); + } + + } +#endif /* BF54x */ +#endif /* CONFIG_BF60x */ + debug_mmrs_dentry = top; + + return 0; +} +module_init(bfin_debug_mmrs_init); + +static void __exit bfin_debug_mmrs_exit(void) +{ + debugfs_remove_recursive(debug_mmrs_dentry); +} +module_exit(bfin_debug_mmrs_exit); + +MODULE_LICENSE("GPL"); diff --git a/arch/blackfin/kernel/dma-mapping.c b/arch/blackfin/kernel/dma-mapping.c index d6b61d56b65..df437e52d9d 100644 --- a/arch/blackfin/kernel/dma-mapping.c +++ b/arch/blackfin/kernel/dma-mapping.c @@ -1,57 +1,33 @@ /* - * File: arch/blackfin/kernel/dma-mapping.c - * Based on: - * Author: + * Dynamic DMA mapping support * - * Created: - * Description: Dynamic DMA mapping support. + * Copyright 2005-2009 Analog Devices Inc. * - * Modified: - * Copyright 2004-2006 Analog Devices Inc. - * - * Bugs: Enter bugs at http://blackfin.uclinux.org/ - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, see the file COPYING, or write - * to the Free Software Foundation, Inc., - * 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA + * Licensed under the GPL-2 or later */ #include <linux/types.h> -#include <linux/mm.h> +#include <linux/gfp.h> #include <linux/string.h> -#include <linux/bootmem.h> #include <linux/spinlock.h> -#include <linux/device.h> #include <linux/dma-mapping.h> -#include <linux/io.h> #include <linux/scatterlist.h> -#include <asm/cacheflush.h> -#include <asm/bfin-global.h> +#include <linux/export.h> +#include <linux/bitmap.h> static spinlock_t dma_page_lock; -static unsigned int *dma_page; +static unsigned long *dma_page; static unsigned int dma_pages; static unsigned long dma_base; static unsigned long dma_size; static unsigned int dma_initialized; -void dma_alloc_init(unsigned long start, unsigned long end) +static void dma_alloc_init(unsigned long start, unsigned long end) { spin_lock_init(&dma_page_lock); dma_initialized = 0; - dma_page = (unsigned int *)__get_free_page(GFP_KERNEL); + dma_page = (unsigned long *)__get_free_page(GFP_KERNEL); memset(dma_page, 0, PAGE_SIZE); dma_base = PAGE_ALIGN(start); dma_size = PAGE_ALIGN(end) - PAGE_ALIGN(start); @@ -59,7 +35,7 @@ void dma_alloc_init(unsigned long start, unsigned long end) memset((void *)dma_base, 0, DMA_UNCACHED_REGION); dma_initialized = 1; - printk(KERN_INFO "%s: dma_page @ 0x%p - %d pages at 0x%08lx\n", __FUNCTION__, + printk(KERN_INFO "%s: dma_page @ 0x%p - %d pages at 0x%08lx\n", __func__, dma_page, dma_pages, dma_base); } @@ -71,23 +47,17 @@ static inline unsigned int get_pages(size_t size) static unsigned long __alloc_dma_pages(unsigned int pages) { unsigned long ret = 0, flags; - int i, count = 0; + unsigned long start; if (dma_initialized == 0) dma_alloc_init(_ramend - DMA_UNCACHED_REGION, _ramend); spin_lock_irqsave(&dma_page_lock, flags); - for (i = 0; i < dma_pages;) { - if (dma_page[i++] == 0) { - if (++count == pages) { - while (count--) - dma_page[--i] = 1; - ret = dma_base + (i << PAGE_SHIFT); - break; - } - } else - count = 0; + start = bitmap_find_next_zero_area(dma_page, dma_pages, 0, pages, 0); + if (start < dma_pages) { + ret = dma_base + (start << PAGE_SHIFT); + bitmap_set(dma_page, start, pages); } spin_unlock_irqrestore(&dma_page_lock, flags); return ret; @@ -97,22 +67,19 @@ static void __free_dma_pages(unsigned long addr, unsigned int pages) { unsigned long page = (addr - dma_base) >> PAGE_SHIFT; unsigned long flags; - int i; if ((page + pages) > dma_pages) { - printk(KERN_ERR "%s: freeing outside range.\n", __FUNCTION__); + printk(KERN_ERR "%s: freeing outside range.\n", __func__); BUG(); } spin_lock_irqsave(&dma_page_lock, flags); - for (i = page; i < page + pages; i++) { - dma_page[i] = 0; - } + bitmap_clear(dma_page, page, pages); spin_unlock_irqrestore(&dma_page_lock, flags); } void *dma_alloc_coherent(struct device *dev, size_t size, - dma_addr_t * dma_handle, gfp_t gfp) + dma_addr_t *dma_handle, gfp_t gfp) { void *ret; @@ -136,52 +103,40 @@ dma_free_coherent(struct device *dev, size_t size, void *vaddr, EXPORT_SYMBOL(dma_free_coherent); /* - * Dummy functions defined for some existing drivers + * Streaming DMA mappings */ - -dma_addr_t -dma_map_single(struct device *dev, void *ptr, size_t size, - enum dma_data_direction direction) +void __dma_sync(dma_addr_t addr, size_t size, + enum dma_data_direction dir) { - BUG_ON(direction == DMA_NONE); - - invalidate_dcache_range((unsigned long)ptr, - (unsigned long)ptr + size); - - return (dma_addr_t) ptr; + __dma_sync_inline(addr, size, dir); } -EXPORT_SYMBOL(dma_map_single); +EXPORT_SYMBOL(__dma_sync); int -dma_map_sg(struct device *dev, struct scatterlist *sg, int nents, +dma_map_sg(struct device *dev, struct scatterlist *sg_list, int nents, enum dma_data_direction direction) { + struct scatterlist *sg; int i; - BUG_ON(direction == DMA_NONE); - - for (i = 0; i < nents; i++, sg++) { + for_each_sg(sg_list, sg, nents, i) { sg->dma_address = (dma_addr_t) sg_virt(sg); - - invalidate_dcache_range(sg_dma_address(sg), - sg_dma_address(sg) + - sg_dma_len(sg)); + __dma_sync(sg_dma_address(sg), sg_dma_len(sg), direction); } return nents; } EXPORT_SYMBOL(dma_map_sg); -void dma_unmap_single(struct device *dev, dma_addr_t dma_addr, size_t size, - enum dma_data_direction direction) +void dma_sync_sg_for_device(struct device *dev, struct scatterlist *sg_list, + int nelems, enum dma_data_direction direction) { - BUG_ON(direction == DMA_NONE); -} -EXPORT_SYMBOL(dma_unmap_single); + struct scatterlist *sg; + int i; -void dma_unmap_sg(struct device *dev, struct scatterlist *sg, - int nhwentries, enum dma_data_direction direction) -{ - BUG_ON(direction == DMA_NONE); + for_each_sg(sg_list, sg, nelems, i) { + sg->dma_address = (dma_addr_t) sg_virt(sg); + __dma_sync(sg_dma_address(sg), sg_dma_len(sg), direction); + } } -EXPORT_SYMBOL(dma_unmap_sg); +EXPORT_SYMBOL(dma_sync_sg_for_device); diff --git a/arch/blackfin/kernel/dualcore_test.c b/arch/blackfin/kernel/dualcore_test.c deleted file mode 100644 index 0fcba74840b..00000000000 --- a/arch/blackfin/kernel/dualcore_test.c +++ /dev/null @@ -1,49 +0,0 @@ -/* - * File: arch/blackfin/kernel/dualcore_test.c - * Based on: - * Author: - * - * Created: - * Description: Small test code for CoreB on a BF561 - * - * Modified: - * Copyright 2004-2006 Analog Devices Inc. - * - * Bugs: Enter bugs at http://blackfin.uclinux.org/ - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, see the file COPYING, or write - * to the Free Software Foundation, Inc., - * 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA - */ - -#include <linux/init.h> -#include <linux/module.h> - -static int *testarg = (int *)0xfeb00000; - -static int test_init(void) -{ - *testarg = 1; - printk(KERN_INFO "Dual core test module inserted: set testarg = [%d]\n @ [%p]\n", - *testarg, testarg); - return 0; -} - -static void test_exit(void) -{ - printk(KERN_INFO "Dual core test module removed: testarg = [%d]\n", *testarg); -} - -module_init(test_init); -module_exit(test_exit); diff --git a/arch/blackfin/kernel/dumpstack.c b/arch/blackfin/kernel/dumpstack.c new file mode 100644 index 00000000000..95ba6d9e9a3 --- /dev/null +++ b/arch/blackfin/kernel/dumpstack.c @@ -0,0 +1,175 @@ +/* Provide basic stack dumping functions + * + * Copyright 2004-2009 Analog Devices Inc. + * + * Licensed under the GPL-2 or later + */ + +#include <linux/kernel.h> +#include <linux/thread_info.h> +#include <linux/mm.h> +#include <linux/uaccess.h> +#include <linux/module.h> +#include <asm/trace.h> + +/* + * Checks to see if the address pointed to is either a + * 16-bit CALL instruction, or a 32-bit CALL instruction + */ +static bool is_bfin_call(unsigned short *addr) +{ + unsigned int opcode; + + if (!get_instruction(&opcode, addr)) + return false; + + if ((opcode >= 0x0060 && opcode <= 0x0067) || + (opcode >= 0x0070 && opcode <= 0x0077) || + (opcode >= 0xE3000000 && opcode <= 0xE3FFFFFF)) + return true; + + return false; + +} + +void show_stack(struct task_struct *task, unsigned long *stack) +{ +#ifdef CONFIG_PRINTK + unsigned int *addr, *endstack, *fp = 0, *frame; + unsigned short *ins_addr; + char buf[150]; + unsigned int i, j, ret_addr, frame_no = 0; + + /* + * If we have been passed a specific stack, use that one otherwise + * if we have been passed a task structure, use that, otherwise + * use the stack of where the variable "stack" exists + */ + + if (stack == NULL) { + if (task) { + /* We know this is a kernel stack, so this is the start/end */ + stack = (unsigned long *)task->thread.ksp; + endstack = (unsigned int *)(((unsigned int)(stack) & ~(THREAD_SIZE - 1)) + THREAD_SIZE); + } else { + /* print out the existing stack info */ + stack = (unsigned long *)&stack; + endstack = (unsigned int *)PAGE_ALIGN((unsigned int)stack); + } + } else + endstack = (unsigned int *)PAGE_ALIGN((unsigned int)stack); + + printk(KERN_NOTICE "Stack info:\n"); + decode_address(buf, (unsigned int)stack); + printk(KERN_NOTICE " SP: [0x%p] %s\n", stack, buf); + + if (!access_ok(VERIFY_READ, stack, (unsigned int)endstack - (unsigned int)stack)) { + printk(KERN_NOTICE "Invalid stack pointer\n"); + return; + } + + /* First thing is to look for a frame pointer */ + for (addr = (unsigned int *)((unsigned int)stack & ~0xF); addr < endstack; addr++) { + if (*addr & 0x1) + continue; + ins_addr = (unsigned short *)*addr; + ins_addr--; + if (is_bfin_call(ins_addr)) + fp = addr - 1; + + if (fp) { + /* Let's check to see if it is a frame pointer */ + while (fp >= (addr - 1) && fp < endstack + && fp && ((unsigned int) fp & 0x3) == 0) + fp = (unsigned int *)*fp; + if (fp == 0 || fp == endstack) { + fp = addr - 1; + break; + } + fp = 0; + } + } + if (fp) { + frame = fp; + printk(KERN_NOTICE " FP: (0x%p)\n", fp); + } else + frame = 0; + + /* + * Now that we think we know where things are, we + * walk the stack again, this time printing things out + * incase there is no frame pointer, we still look for + * valid return addresses + */ + + /* First time print out data, next time, print out symbols */ + for (j = 0; j <= 1; j++) { + if (j) + printk(KERN_NOTICE "Return addresses in stack:\n"); + else + printk(KERN_NOTICE " Memory from 0x%08lx to %p", ((long unsigned int)stack & ~0xF), endstack); + + fp = frame; + frame_no = 0; + + for (addr = (unsigned int *)((unsigned int)stack & ~0xF), i = 0; + addr < endstack; addr++, i++) { + + ret_addr = 0; + if (!j && i % 8 == 0) + printk(KERN_NOTICE "%p:", addr); + + /* if it is an odd address, or zero, just skip it */ + if (*addr & 0x1 || !*addr) + goto print; + + ins_addr = (unsigned short *)*addr; + + /* Go back one instruction, and see if it is a CALL */ + ins_addr--; + ret_addr = is_bfin_call(ins_addr); + print: + if (!j && stack == (unsigned long *)addr) + printk("[%08x]", *addr); + else if (ret_addr) + if (j) { + decode_address(buf, (unsigned int)*addr); + if (frame == addr) { + printk(KERN_NOTICE " frame %2i : %s\n", frame_no, buf); + continue; + } + printk(KERN_NOTICE " address : %s\n", buf); + } else + printk("<%08x>", *addr); + else if (fp == addr) { + if (j) + frame = addr+1; + else + printk("(%08x)", *addr); + + fp = (unsigned int *)*addr; + frame_no++; + + } else if (!j) + printk(" %08x ", *addr); + } + if (!j) + printk("\n"); + } +#endif +} +EXPORT_SYMBOL(show_stack); + +void dump_stack(void) +{ + unsigned long stack; +#ifdef CONFIG_DEBUG_BFIN_HWTRACE_ON + int tflags; +#endif + trace_buffer_save(tflags); + dump_bfin_trace_buffer(); + dump_stack_print_info(KERN_DEFAULT); + show_stack(current, &stack); + trace_buffer_restore(tflags); +} +EXPORT_SYMBOL(dump_stack); diff --git a/arch/blackfin/kernel/early_printk.c b/arch/blackfin/kernel/early_printk.c index 60f67f90fe3..61fbd2de993 100644 --- a/arch/blackfin/kernel/early_printk.c +++ b/arch/blackfin/kernel/early_printk.c @@ -1,25 +1,10 @@ /* - * File: arch/blackfin/kernel/early_printk.c - * Based on: arch/x86_64/kernel/early_printk.c - * Author: Robin Getz <rgetz@blackfin.uclinux.org + * allow a console to be used for early printk + * derived from arch/x86/kernel/early_printk.c * - * Created: 14Aug2007 - * Description: allow a console to be used for early printk + * Copyright 2007-2009 Analog Devices Inc. * - * Modified: - * Copyright 2004-2007 Analog Devices Inc. - * - * Bugs: Enter bugs at http://blackfin.uclinux.org/ - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. + * Licensed under the GPL-2 */ #include <linux/kernel.h> @@ -27,6 +12,7 @@ #include <linux/serial_core.h> #include <linux/console.h> #include <linux/string.h> +#include <linux/reboot.h> #include <asm/blackfin.h> #include <asm/irq_handler.h> #include <asm/early_printk.h> @@ -35,8 +21,9 @@ extern struct console *bfin_earlyserial_init(unsigned int port, unsigned int cflag); #endif - -static struct console *early_console; +#ifdef CONFIG_BFIN_JTAG_COMM +extern struct console *bfin_jc_early_init(void); +#endif /* Default console */ #define DEFAULT_PORT 0 @@ -102,10 +89,10 @@ static struct console * __init earlyserial_init(char *buf) cflag |= CS5; break; case 6: - cflag |= CS5; + cflag |= CS6; break; case 7: - cflag |= CS5; + cflag |= CS7; break; default: cflag |= CS8; @@ -142,6 +129,15 @@ int __init setup_early_printk(char *buf) early_console = earlyserial_init(buf); } #endif + +#ifdef CONFIG_BFIN_JTAG_COMM + /* Check for Blackfin JTAG */ + if (!strncmp(buf, "jtag", 4)) { + buf += 4; + early_console = bfin_jc_early_init(); + } +#endif + #ifdef CONFIG_FB /* TODO: add framebuffer console support */ #endif @@ -166,25 +162,31 @@ int __init setup_early_printk(char *buf) asmlinkage void __init init_early_exception_vectors(void) { + u32 evt; SSYNC(); + /* + * This starts up the shadow buffer, incase anything crashes before + * setup arch + */ + mark_shadow_error(); + early_shadow_puts(linux_banner); + early_shadow_stamp(); + + if (CPUID != bfin_cpuid()) { + early_shadow_puts("Running on wrong machine type, expected"); + early_shadow_reg(CPUID, 16); + early_shadow_puts(", but running on"); + early_shadow_reg(bfin_cpuid(), 16); + early_shadow_puts("\n"); + } + /* cannot program in software: * evt0 - emulation (jtag) * evt1 - reset */ - bfin_write_EVT2(early_trap); - bfin_write_EVT3(early_trap); - bfin_write_EVT5(early_trap); - bfin_write_EVT6(early_trap); - bfin_write_EVT7(early_trap); - bfin_write_EVT8(early_trap); - bfin_write_EVT9(early_trap); - bfin_write_EVT10(early_trap); - bfin_write_EVT11(early_trap); - bfin_write_EVT12(early_trap); - bfin_write_EVT13(early_trap); - bfin_write_EVT14(early_trap); - bfin_write_EVT15(early_trap); + for (evt = EVT2; evt <= EVT15; evt += 4) + bfin_write32(evt, early_trap); CSYNC(); /* Set all the return from interrupt, exception, NMI to a known place @@ -197,17 +199,70 @@ asmlinkage void __init init_early_exception_vectors(void) } +__attribute__((__noreturn__)) asmlinkage void __init early_trap_c(struct pt_regs *fp, void *retaddr) { /* This can happen before the uart is initialized, so initialize - * the UART now + * the UART now (but only if we are running on the processor we think + * we are compiled for - otherwise we write to MMRs that don't exist, + * and cause other problems. Nothing comes out the UART, but it does + * end up in the __buf_log. */ - if (likely(early_console == NULL)) + if (likely(early_console == NULL) && CPUID == bfin_cpuid()) setup_early_printk(DEFAULT_EARLY_PORT); - dump_bfin_mem(fp); - show_regs(fp); - dump_bfin_trace_buffer(); + if (!shadow_console_enabled()) { + /* crap - we crashed before setup_arch() */ + early_shadow_puts("panic before setup_arch\n"); + early_shadow_puts("IPEND:"); + early_shadow_reg(fp->ipend, 16); + if (fp->seqstat & SEQSTAT_EXCAUSE) { + early_shadow_puts("\nEXCAUSE:"); + early_shadow_reg(fp->seqstat & SEQSTAT_EXCAUSE, 8); + } + if (fp->seqstat & SEQSTAT_HWERRCAUSE) { + early_shadow_puts("\nHWERRCAUSE:"); + early_shadow_reg( + (fp->seqstat & SEQSTAT_HWERRCAUSE) >> 14, 8); + } + early_shadow_puts("\nErr @"); + if (fp->ipend & EVT_EVX) + early_shadow_reg(fp->retx, 32); + else + early_shadow_reg(fp->pc, 32); +#ifdef CONFIG_DEBUG_BFIN_HWTRACE_ON + early_shadow_puts("\nTrace:"); + if (likely(bfin_read_TBUFSTAT() & TBUFCNT)) { + while (bfin_read_TBUFSTAT() & TBUFCNT) { + early_shadow_puts("\nT :"); + early_shadow_reg(bfin_read_TBUF(), 32); + early_shadow_puts("\n S :"); + early_shadow_reg(bfin_read_TBUF(), 32); + } + } +#endif + early_shadow_puts("\nUse bfin-elf-addr2line to determine " + "function names\n"); + /* + * We should panic(), but we can't - since panic calls printk, + * and printk uses memcpy. + * we want to reboot, but if the machine type is different, + * can't due to machine specific reboot sequences + */ + if (CPUID == bfin_cpuid()) { + early_shadow_puts("Trying to restart\n"); + machine_restart(""); + } + + early_shadow_puts("Halting, since it is not safe to restart\n"); + while (1) + asm volatile ("EMUEXCPT; IDLE;\n"); + + } else { + printk(KERN_EMERG "Early panic\n"); + show_regs(fp); + dump_bfin_trace_buffer(); + } panic("Died early"); } diff --git a/arch/blackfin/kernel/entry.S b/arch/blackfin/kernel/entry.S index 65f4e67a65c..4071265fc4f 100644 --- a/arch/blackfin/kernel/entry.S +++ b/arch/blackfin/kernel/entry.S @@ -1,38 +1,16 @@ /* - * File: arch/blackfin/kernel/entry.S - * Based on: - * Author: + * Copyright 2004-2009 Analog Devices Inc. * - * Created: - * Description: - * - * Modified: - * Copyright 2004-2006 Analog Devices Inc. - * - * Bugs: Enter bugs at http://blackfin.uclinux.org/ - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, see the file COPYING, or write - * to the Free Software Foundation, Inc., - * 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA + * Licensed under the GPL-2 or later */ #include <linux/linkage.h> #include <asm/thread_info.h> #include <asm/errno.h> +#include <asm/blackfin.h> #include <asm/asm-offsets.h> -#include <asm/mach-common/context.S> +#include <asm/context.S> #ifdef CONFIG_EXCPT_IRQ_SYSC_L1 .section .l1.text @@ -41,61 +19,41 @@ #endif ENTRY(_ret_from_fork) +#ifdef CONFIG_IPIPE + /* + * Hw IRQs are off on entry, and we don't want the scheduling tail + * code to starve high priority domains from interrupts while it + * runs. Therefore we first stall the root stage to have the + * virtual interrupt state reflect IMASK. + */ + p0.l = ___ipipe_root_status; + p0.h = ___ipipe_root_status; + r4 = [p0]; + bitset(r4, 0); + [p0] = r4; + /* + * Then we may enable hw IRQs, allowing preemption from high + * priority domains. schedule_tail() will do local_irq_enable() + * since Blackfin does not define __ARCH_WANT_UNLOCKED_CTXSW, so + * there is no need to unstall the root domain by ourselves + * afterwards. + */ + p0.l = _bfin_irq_flags; + p0.h = _bfin_irq_flags; + r4 = [p0]; + sti r4; +#endif /* CONFIG_IPIPE */ SP += -12; - call _schedule_tail; + pseudo_long_call _schedule_tail, p5; SP += 12; - r0 = [sp + PT_IPEND]; - cc = bittst(r0,1); - if cc jump .Lin_kernel; + p1 = [sp++]; + r0 = [sp++]; + cc = p1 == 0; + if cc jump .Lfork; + sp += -12; + call (p1); + sp += 12; +.Lfork: RESTORE_CONTEXT rti; -.Lin_kernel: - bitclr(r0,1); - [sp + PT_IPEND] = r0; - /* do a 'fake' RTI by jumping to [RETI] - * to avoid clearing supervisor mode in child - */ - r0 = [sp + PT_PC]; - [sp + PT_P0] = r0; - - RESTORE_ALL_SYS - jump (p0); ENDPROC(_ret_from_fork) - -ENTRY(_sys_fork) - r0 = -EINVAL; - rts; -ENDPROC(_sys_fork) - -ENTRY(_sys_vfork) - r0 = sp; - r0 += 24; - [--sp] = rets; - SP += -12; - call _bfin_vfork; - SP += 12; - rets = [sp++]; - rts; -ENDPROC(_sys_vfork) - -ENTRY(_sys_clone) - r0 = sp; - r0 += 24; - [--sp] = rets; - SP += -12; - call _bfin_clone; - SP += 12; - rets = [sp++]; - rts; -ENDPROC(_sys_clone) - -ENTRY(_sys_rt_sigreturn) - r0 = sp; - r0 += 24; - [--sp] = rets; - SP += -12; - call _do_rt_sigreturn; - SP += 12; - rets = [sp++]; - rts; -ENDPROC(_sys_rt_sigreturn) diff --git a/arch/blackfin/kernel/exception.c b/arch/blackfin/kernel/exception.c new file mode 100644 index 00000000000..9208b5fd518 --- /dev/null +++ b/arch/blackfin/kernel/exception.c @@ -0,0 +1,45 @@ +/* Basic functions for adding/removing custom exception handlers + * + * Copyright 2004-2009 Analog Devices Inc. + * + * Licensed under the GPL-2 or later + */ + +#include <linux/module.h> +#include <asm/irq_handler.h> + +int bfin_request_exception(unsigned int exception, void (*handler)(void)) +{ + void (*curr_handler)(void); + + if (exception > 0x3F) + return -EINVAL; + + curr_handler = ex_table[exception]; + + if (curr_handler != ex_replaceable) + return -EBUSY; + + ex_table[exception] = handler; + + return 0; +} +EXPORT_SYMBOL(bfin_request_exception); + +int bfin_free_exception(unsigned int exception, void (*handler)(void)) +{ + void (*curr_handler)(void); + + if (exception > 0x3F) + return -EINVAL; + + curr_handler = ex_table[exception]; + + if (curr_handler != handler) + return -EBUSY; + + ex_table[exception] = ex_replaceable; + + return 0; +} +EXPORT_SYMBOL(bfin_free_exception); diff --git a/arch/blackfin/kernel/fixed_code.S b/arch/blackfin/kernel/fixed_code.S index 5ed47228a39..0565917f23b 100644 --- a/arch/blackfin/kernel/fixed_code.S +++ b/arch/blackfin/kernel/fixed_code.S @@ -1,17 +1,24 @@ /* * This file contains sequences of code that will be copied to a - * fixed location, defined in <asm/atomic_seq.h>. The interrupt + * fixed location, defined in <asm/fixed_code.h>. The interrupt * handlers ensure that these sequences appear to be atomic when * executed from userspace. * These are aligned to 16 bytes, so that we have some space to replace * these sequences with something else (e.g. kernel traps if we ever do * BF561 SMP). + * + * Copyright 2007-2008 Analog Devices Inc. + * + * Licensed under the GPL-2 or later. */ + #include <linux/linkage.h> +#include <linux/init.h> #include <linux/unistd.h> #include <asm/entry.h> -.text +__INIT + ENTRY(_fixed_code_start) .align 16 @@ -144,3 +151,5 @@ ENTRY(_safe_user_instruction) ENDPROC(_safe_user_instruction) ENTRY(_fixed_code_end) + +__FINIT diff --git a/arch/blackfin/kernel/flat.c b/arch/blackfin/kernel/flat.c index d188b243053..a88daddbf07 100644 --- a/arch/blackfin/kernel/flat.c +++ b/arch/blackfin/kernel/flat.c @@ -1,21 +1,7 @@ /* - * arch/blackfin/kernel/flat.c + * Copyright 2007 Analog Devices Inc. * - * Copyright (C) 2007 Analog Devices, Inc. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA + * Licensed under the GPL-2. */ #include <linux/module.h> diff --git a/arch/blackfin/kernel/ftrace-entry.S b/arch/blackfin/kernel/ftrace-entry.S new file mode 100644 index 00000000000..7eed00bbd26 --- /dev/null +++ b/arch/blackfin/kernel/ftrace-entry.S @@ -0,0 +1,225 @@ +/* + * mcount and friends -- ftrace stuff + * + * Copyright (C) 2009-2010 Analog Devices Inc. + * Licensed under the GPL-2 or later. + */ + +#include <linux/linkage.h> +#include <asm/ftrace.h> + +.text + +#ifdef CONFIG_DYNAMIC_FTRACE + +/* Simple stub so we can boot the kernel until runtime patching has + * disabled all calls to this. Then it'll be unused. + */ +ENTRY(__mcount) +# if ANOMALY_05000371 + nop; nop; nop; nop; +# endif + rts; +ENDPROC(__mcount) + +/* GCC will have called us before setting up the function prologue, so we + * can clobber the normal scratch registers, but we need to make sure to + * save/restore the registers used for argument passing (R0-R2) in case + * the profiled function is using them. With data registers, R3 is the + * only one we can blow away. With pointer registers, we have P0-P2. + * + * Upon entry, the RETS will point to the top of the current profiled + * function. And since GCC pushed the previous RETS for us, the previous + * function will be waiting there. mmmm pie. + */ +ENTRY(_ftrace_caller) +# ifdef CONFIG_HAVE_FUNCTION_TRACE_MCOUNT_TEST + /* optional micro optimization: return if stopped */ + p1.l = _function_trace_stop; + p1.h = _function_trace_stop; + r3 = [p1]; + cc = r3 == 0; + if ! cc jump _ftrace_stub (bp); +# endif + + /* save first/second/third function arg and the return register */ + [--sp] = r2; + [--sp] = r0; + [--sp] = r1; + [--sp] = rets; + + /* function_trace_call(unsigned long ip, unsigned long parent_ip): + * ip: this point was called by ... + * parent_ip: ... this function + * the ip itself will need adjusting for the mcount call + */ + r0 = rets; + r1 = [sp + 16]; /* skip the 4 local regs on stack */ + r0 += -MCOUNT_INSN_SIZE; + +.globl _ftrace_call +_ftrace_call: + call _ftrace_stub + +# ifdef CONFIG_FUNCTION_GRAPH_TRACER +.globl _ftrace_graph_call +_ftrace_graph_call: + nop; /* jump _ftrace_graph_caller; */ +# endif + + /* restore state and get out of dodge */ +.Lfinish_trace: + rets = [sp++]; + r1 = [sp++]; + r0 = [sp++]; + r2 = [sp++]; + +.globl _ftrace_stub +_ftrace_stub: + rts; +ENDPROC(_ftrace_caller) + +#else + +/* See documentation for _ftrace_caller */ +ENTRY(__mcount) +# ifdef CONFIG_HAVE_FUNCTION_TRACE_MCOUNT_TEST + /* optional micro optimization: return if stopped */ + p1.l = _function_trace_stop; + p1.h = _function_trace_stop; + r3 = [p1]; + cc = r3 == 0; + if ! cc jump _ftrace_stub (bp); +# endif + + /* save third function arg early so we can do testing below */ + [--sp] = r2; + + /* load the function pointer to the tracer */ + p0.l = _ftrace_trace_function; + p0.h = _ftrace_trace_function; + r3 = [p0]; + + /* optional micro optimization: don't call the stub tracer */ + r2.l = _ftrace_stub; + r2.h = _ftrace_stub; + cc = r2 == r3; + if ! cc jump .Ldo_trace; + +# ifdef CONFIG_FUNCTION_GRAPH_TRACER + /* if the ftrace_graph_return function pointer is not set to + * the ftrace_stub entry, call prepare_ftrace_return(). + */ + p0.l = _ftrace_graph_return; + p0.h = _ftrace_graph_return; + r3 = [p0]; + cc = r2 == r3; + if ! cc jump _ftrace_graph_caller; + + /* similarly, if the ftrace_graph_entry function pointer is not + * set to the ftrace_graph_entry_stub entry, ... + */ + p0.l = _ftrace_graph_entry; + p0.h = _ftrace_graph_entry; + r2.l = _ftrace_graph_entry_stub; + r2.h = _ftrace_graph_entry_stub; + r3 = [p0]; + cc = r2 == r3; + if ! cc jump _ftrace_graph_caller; +# endif + + r2 = [sp++]; + rts; + +.Ldo_trace: + + /* save first/second function arg and the return register */ + [--sp] = r0; + [--sp] = r1; + [--sp] = rets; + + /* setup the tracer function */ + p0 = r3; + + /* function_trace_call(unsigned long ip, unsigned long parent_ip): + * ip: this point was called by ... + * parent_ip: ... this function + * the ip itself will need adjusting for the mcount call + */ + r0 = rets; + r1 = [sp + 16]; /* skip the 4 local regs on stack */ + r0 += -MCOUNT_INSN_SIZE; + + /* call the tracer */ + call (p0); + + /* restore state and get out of dodge */ +.Lfinish_trace: + rets = [sp++]; + r1 = [sp++]; + r0 = [sp++]; + r2 = [sp++]; + +.globl _ftrace_stub +_ftrace_stub: + rts; +ENDPROC(__mcount) + +#endif + +#ifdef CONFIG_FUNCTION_GRAPH_TRACER +/* The prepare_ftrace_return() function is similar to the trace function + * except it takes a pointer to the location of the frompc. This is so + * the prepare_ftrace_return() can hijack it temporarily for probing + * purposes. + */ +ENTRY(_ftrace_graph_caller) +# ifndef CONFIG_DYNAMIC_FTRACE + /* save first/second function arg and the return register */ + [--sp] = r0; + [--sp] = r1; + [--sp] = rets; + + /* prepare_ftrace_return(parent, self_addr, frame_pointer) */ + r0 = sp; /* unsigned long *parent */ + r1 = rets; /* unsigned long self_addr */ +# else + r0 = sp; /* unsigned long *parent */ + r1 = [sp]; /* unsigned long self_addr */ +# endif +# ifdef CONFIG_HAVE_FUNCTION_GRAPH_FP_TEST + r2 = fp; /* unsigned long frame_pointer */ +# endif + r0 += 16; /* skip the 4 local regs on stack */ + r1 += -MCOUNT_INSN_SIZE; + call _prepare_ftrace_return; + + jump .Lfinish_trace; +ENDPROC(_ftrace_graph_caller) + +/* Undo the rewrite caused by ftrace_graph_caller(). The common function + * ftrace_return_to_handler() will return the original rets so we can + * restore it and be on our way. + */ +ENTRY(_return_to_handler) + /* make sure original return values are saved */ + [--sp] = p0; + [--sp] = r0; + [--sp] = r1; + + /* get original return address */ +# ifdef CONFIG_HAVE_FUNCTION_GRAPH_FP_TEST + r0 = fp; /* Blackfin is sane, so omit this */ +# endif + call _ftrace_return_to_handler; + rets = r0; + + /* anomaly 05000371 - make sure we have at least three instructions + * between rets setting and the return + */ + r1 = [sp++]; + r0 = [sp++]; + p0 = [sp++]; + rts; +ENDPROC(_return_to_handler) +#endif diff --git a/arch/blackfin/kernel/ftrace.c b/arch/blackfin/kernel/ftrace.c new file mode 100644 index 00000000000..095de0fa044 --- /dev/null +++ b/arch/blackfin/kernel/ftrace.c @@ -0,0 +1,125 @@ +/* + * ftrace graph code + * + * Copyright (C) 2009-2010 Analog Devices Inc. + * Licensed under the GPL-2 or later. + */ + +#include <linux/ftrace.h> +#include <linux/kernel.h> +#include <linux/sched.h> +#include <linux/uaccess.h> +#include <linux/atomic.h> +#include <asm/cacheflush.h> + +#ifdef CONFIG_DYNAMIC_FTRACE + +static const unsigned char mnop[] = { + 0x03, 0xc0, 0x00, 0x18, /* MNOP; */ + 0x03, 0xc0, 0x00, 0x18, /* MNOP; */ +}; + +static void bfin_make_pcrel24(unsigned char *insn, unsigned long src, + unsigned long dst) +{ + uint32_t pcrel = (dst - src) >> 1; + insn[0] = pcrel >> 16; + insn[1] = 0xe3; + insn[2] = pcrel; + insn[3] = pcrel >> 8; +} +#define bfin_make_pcrel24(insn, src, dst) bfin_make_pcrel24(insn, src, (unsigned long)(dst)) + +static int ftrace_modify_code(unsigned long ip, const unsigned char *code, + unsigned long len) +{ + int ret = probe_kernel_write((void *)ip, (void *)code, len); + flush_icache_range(ip, ip + len); + return ret; +} + +int ftrace_make_nop(struct module *mod, struct dyn_ftrace *rec, + unsigned long addr) +{ + /* Turn the mcount call site into two MNOPs as those are 32bit insns */ + return ftrace_modify_code(rec->ip, mnop, sizeof(mnop)); +} + +int ftrace_make_call(struct dyn_ftrace *rec, unsigned long addr) +{ + /* Restore the mcount call site */ + unsigned char call[8]; + call[0] = 0x67; /* [--SP] = RETS; */ + call[1] = 0x01; + bfin_make_pcrel24(&call[2], rec->ip + 2, addr); + call[6] = 0x27; /* RETS = [SP++]; */ + call[7] = 0x01; + return ftrace_modify_code(rec->ip, call, sizeof(call)); +} + +int ftrace_update_ftrace_func(ftrace_func_t func) +{ + unsigned char call[4]; + unsigned long ip = (unsigned long)&ftrace_call; + bfin_make_pcrel24(call, ip, func); + return ftrace_modify_code(ip, call, sizeof(call)); +} + +int __init ftrace_dyn_arch_init(void) +{ + return 0; +} + +#endif + +#ifdef CONFIG_FUNCTION_GRAPH_TRACER + +# ifdef CONFIG_DYNAMIC_FTRACE + +extern void ftrace_graph_call(void); + +int ftrace_enable_ftrace_graph_caller(void) +{ + unsigned long ip = (unsigned long)&ftrace_graph_call; + uint16_t jump_pcrel12 = ((unsigned long)&ftrace_graph_caller - ip) >> 1; + jump_pcrel12 |= 0x2000; + return ftrace_modify_code(ip, (void *)&jump_pcrel12, sizeof(jump_pcrel12)); +} + +int ftrace_disable_ftrace_graph_caller(void) +{ + return ftrace_modify_code((unsigned long)&ftrace_graph_call, empty_zero_page, 2); +} + +# endif + +/* + * Hook the return address and push it in the stack of return addrs + * in current thread info. + */ +void prepare_ftrace_return(unsigned long *parent, unsigned long self_addr, + unsigned long frame_pointer) +{ + struct ftrace_graph_ent trace; + unsigned long return_hooker = (unsigned long)&return_to_handler; + + if (unlikely(atomic_read(¤t->tracing_graph_pause))) + return; + + if (ftrace_push_return_trace(*parent, self_addr, &trace.depth, + frame_pointer) == -EBUSY) + return; + + trace.func = self_addr; + + /* Only trace if the calling function expects to */ + if (!ftrace_graph_entry(&trace)) { + current->curr_ret_stack--; + return; + } + + /* all is well in the world ! hijack RETS ... */ + *parent = return_hooker; +} + +#endif diff --git a/arch/blackfin/kernel/gptimers.c b/arch/blackfin/kernel/gptimers.c index 1904d8b5332..d776773d386 100644 --- a/arch/blackfin/kernel/gptimers.c +++ b/arch/blackfin/kernel/gptimers.c @@ -10,8 +10,8 @@ #include <linux/kernel.h> #include <linux/module.h> +#include <linux/io.h> -#include <asm/io.h> #include <asm/blackfin.h> #include <asm/gptimers.h> @@ -23,49 +23,39 @@ printk(KERN_DEBUG "%s:%s:%i: Assertion failed: " #expr "\n", __FILE__, __func__, __LINE__); #endif -#define BFIN_TIMER_NUM_GROUP (BFIN_TIMER_OCTET(MAX_BLACKFIN_GPTIMERS - 1) + 1) - -typedef struct { - uint16_t config; - uint16_t __pad; - uint32_t counter; - uint32_t period; - uint32_t width; -} GPTIMER_timer_regs; - -typedef struct { - uint16_t enable; - uint16_t __pad0; - uint16_t disable; - uint16_t __pad1; - uint32_t status; -} GPTIMER_group_regs; - -static volatile GPTIMER_timer_regs *const timer_regs[MAX_BLACKFIN_GPTIMERS] = -{ - (GPTIMER_timer_regs *)TIMER0_CONFIG, - (GPTIMER_timer_regs *)TIMER1_CONFIG, - (GPTIMER_timer_regs *)TIMER2_CONFIG, -#if (MAX_BLACKFIN_GPTIMERS > 3) - (GPTIMER_timer_regs *)TIMER3_CONFIG, - (GPTIMER_timer_regs *)TIMER4_CONFIG, - (GPTIMER_timer_regs *)TIMER5_CONFIG, - (GPTIMER_timer_regs *)TIMER6_CONFIG, - (GPTIMER_timer_regs *)TIMER7_CONFIG, +#ifndef CONFIG_BF60x +# define BFIN_TIMER_NUM_GROUP (BFIN_TIMER_OCTET(MAX_BLACKFIN_GPTIMERS - 1) + 1) +#else +# define BFIN_TIMER_NUM_GROUP 1 #endif -#if (MAX_BLACKFIN_GPTIMERS > 8) - (GPTIMER_timer_regs *)TIMER8_CONFIG, - (GPTIMER_timer_regs *)TIMER9_CONFIG, - (GPTIMER_timer_regs *)TIMER10_CONFIG, - (GPTIMER_timer_regs *)TIMER11_CONFIG, + +static struct bfin_gptimer_regs * const timer_regs[MAX_BLACKFIN_GPTIMERS] = +{ + (void *)TIMER0_CONFIG, + (void *)TIMER1_CONFIG, + (void *)TIMER2_CONFIG, +#if (MAX_BLACKFIN_GPTIMERS > 3) + (void *)TIMER3_CONFIG, + (void *)TIMER4_CONFIG, + (void *)TIMER5_CONFIG, + (void *)TIMER6_CONFIG, + (void *)TIMER7_CONFIG, +# if (MAX_BLACKFIN_GPTIMERS > 8) + (void *)TIMER8_CONFIG, + (void *)TIMER9_CONFIG, + (void *)TIMER10_CONFIG, +# if (MAX_BLACKFIN_GPTIMERS > 11) + (void *)TIMER11_CONFIG, +# endif +# endif #endif }; -static volatile GPTIMER_group_regs *const group_regs[BFIN_TIMER_NUM_GROUP] = +static struct bfin_gptimer_group_regs * const group_regs[BFIN_TIMER_NUM_GROUP] = { - (GPTIMER_group_regs *)TIMER0_GROUP_REG, + (void *)TIMER0_GROUP_REG, #if (MAX_BLACKFIN_GPTIMERS > 8) - (GPTIMER_group_regs *)TIMER8_GROUP_REG, + (void *)TIMER8_GROUP_REG, #endif }; @@ -80,12 +70,14 @@ static uint32_t const trun_mask[MAX_BLACKFIN_GPTIMERS] = TIMER_STATUS_TRUN5, TIMER_STATUS_TRUN6, TIMER_STATUS_TRUN7, -#endif -#if (MAX_BLACKFIN_GPTIMERS > 8) +# if (MAX_BLACKFIN_GPTIMERS > 8) TIMER_STATUS_TRUN8, TIMER_STATUS_TRUN9, TIMER_STATUS_TRUN10, +# if (MAX_BLACKFIN_GPTIMERS > 11) TIMER_STATUS_TRUN11, +# endif +# endif #endif }; @@ -100,12 +92,14 @@ static uint32_t const tovf_mask[MAX_BLACKFIN_GPTIMERS] = TIMER_STATUS_TOVF5, TIMER_STATUS_TOVF6, TIMER_STATUS_TOVF7, -#endif -#if (MAX_BLACKFIN_GPTIMERS > 8) +# if (MAX_BLACKFIN_GPTIMERS > 8) TIMER_STATUS_TOVF8, TIMER_STATUS_TOVF9, TIMER_STATUS_TOVF10, +# if (MAX_BLACKFIN_GPTIMERS > 11) TIMER_STATUS_TOVF11, +# endif +# endif #endif }; @@ -120,150 +114,256 @@ static uint32_t const timil_mask[MAX_BLACKFIN_GPTIMERS] = TIMER_STATUS_TIMIL5, TIMER_STATUS_TIMIL6, TIMER_STATUS_TIMIL7, -#endif -#if (MAX_BLACKFIN_GPTIMERS > 8) +# if (MAX_BLACKFIN_GPTIMERS > 8) TIMER_STATUS_TIMIL8, TIMER_STATUS_TIMIL9, TIMER_STATUS_TIMIL10, +# if (MAX_BLACKFIN_GPTIMERS > 11) TIMER_STATUS_TIMIL11, +# endif +# endif #endif }; -void set_gptimer_pwidth(int timer_id, uint32_t value) +void set_gptimer_pwidth(unsigned int timer_id, uint32_t value) { tassert(timer_id < MAX_BLACKFIN_GPTIMERS); - timer_regs[timer_id]->width = value; + bfin_write(&timer_regs[timer_id]->width, value); SSYNC(); } EXPORT_SYMBOL(set_gptimer_pwidth); -uint32_t get_gptimer_pwidth(int timer_id) +uint32_t get_gptimer_pwidth(unsigned int timer_id) { tassert(timer_id < MAX_BLACKFIN_GPTIMERS); - return timer_regs[timer_id]->width; + return bfin_read(&timer_regs[timer_id]->width); } EXPORT_SYMBOL(get_gptimer_pwidth); -void set_gptimer_period(int timer_id, uint32_t period) +void set_gptimer_period(unsigned int timer_id, uint32_t period) { tassert(timer_id < MAX_BLACKFIN_GPTIMERS); - timer_regs[timer_id]->period = period; + bfin_write(&timer_regs[timer_id]->period, period); SSYNC(); } EXPORT_SYMBOL(set_gptimer_period); -uint32_t get_gptimer_period(int timer_id) +uint32_t get_gptimer_period(unsigned int timer_id) { tassert(timer_id < MAX_BLACKFIN_GPTIMERS); - return timer_regs[timer_id]->period; + return bfin_read(&timer_regs[timer_id]->period); } EXPORT_SYMBOL(get_gptimer_period); -uint32_t get_gptimer_count(int timer_id) +uint32_t get_gptimer_count(unsigned int timer_id) { tassert(timer_id < MAX_BLACKFIN_GPTIMERS); - return timer_regs[timer_id]->counter; + return bfin_read(&timer_regs[timer_id]->counter); } EXPORT_SYMBOL(get_gptimer_count); -uint32_t get_gptimer_status(int group) +#ifdef CONFIG_BF60x +void set_gptimer_delay(unsigned int timer_id, uint32_t delay) +{ + tassert(timer_id < MAX_BLACKFIN_GPTIMERS); + bfin_write(&timer_regs[timer_id]->delay, delay); + SSYNC(); +} +EXPORT_SYMBOL(set_gptimer_delay); + +uint32_t get_gptimer_delay(unsigned int timer_id) +{ + tassert(timer_id < MAX_BLACKFIN_GPTIMERS); + return bfin_read(&timer_regs[timer_id]->delay); +} +EXPORT_SYMBOL(get_gptimer_delay); +#endif + +#ifdef CONFIG_BF60x +int get_gptimer_intr(unsigned int timer_id) +{ + tassert(timer_id < MAX_BLACKFIN_GPTIMERS); + return !!(bfin_read(&group_regs[BFIN_TIMER_OCTET(timer_id)]->data_ilat) & timil_mask[timer_id]); +} +EXPORT_SYMBOL(get_gptimer_intr); + +void clear_gptimer_intr(unsigned int timer_id) +{ + tassert(timer_id < MAX_BLACKFIN_GPTIMERS); + bfin_write(&group_regs[BFIN_TIMER_OCTET(timer_id)]->data_ilat, timil_mask[timer_id]); +} +EXPORT_SYMBOL(clear_gptimer_intr); + +int get_gptimer_over(unsigned int timer_id) +{ + tassert(timer_id < MAX_BLACKFIN_GPTIMERS); + return !!(bfin_read(&group_regs[BFIN_TIMER_OCTET(timer_id)]->stat_ilat) & tovf_mask[timer_id]); +} +EXPORT_SYMBOL(get_gptimer_over); + +void clear_gptimer_over(unsigned int timer_id) +{ + tassert(timer_id < MAX_BLACKFIN_GPTIMERS); + bfin_write(&group_regs[BFIN_TIMER_OCTET(timer_id)]->stat_ilat, tovf_mask[timer_id]); +} +EXPORT_SYMBOL(clear_gptimer_over); + +int get_gptimer_run(unsigned int timer_id) +{ + tassert(timer_id < MAX_BLACKFIN_GPTIMERS); + return !!(bfin_read(&group_regs[BFIN_TIMER_OCTET(timer_id)]->run) & trun_mask[timer_id]); +} +EXPORT_SYMBOL(get_gptimer_run); + +uint32_t get_gptimer_status(unsigned int group) +{ + tassert(group < BFIN_TIMER_NUM_GROUP); + return bfin_read(&group_regs[group]->data_ilat); +} +EXPORT_SYMBOL(get_gptimer_status); + +void set_gptimer_status(unsigned int group, uint32_t value) +{ + tassert(group < BFIN_TIMER_NUM_GROUP); + bfin_write(&group_regs[group]->data_ilat, value); + SSYNC(); +} +EXPORT_SYMBOL(set_gptimer_status); +#else +uint32_t get_gptimer_status(unsigned int group) { tassert(group < BFIN_TIMER_NUM_GROUP); - return group_regs[group]->status; + return bfin_read(&group_regs[group]->status); } EXPORT_SYMBOL(get_gptimer_status); -void set_gptimer_status(int group, uint32_t value) +void set_gptimer_status(unsigned int group, uint32_t value) { tassert(group < BFIN_TIMER_NUM_GROUP); - group_regs[group]->status = value; + bfin_write(&group_regs[group]->status, value); SSYNC(); } EXPORT_SYMBOL(set_gptimer_status); -uint16_t get_gptimer_intr(int timer_id) +static uint32_t read_gptimer_status(unsigned int timer_id) +{ + return bfin_read(&group_regs[BFIN_TIMER_OCTET(timer_id)]->status); +} + +int get_gptimer_intr(unsigned int timer_id) { tassert(timer_id < MAX_BLACKFIN_GPTIMERS); - return (group_regs[BFIN_TIMER_OCTET(timer_id)]->status & timil_mask[timer_id]) ? 1 : 0; + return !!(read_gptimer_status(timer_id) & timil_mask[timer_id]); } EXPORT_SYMBOL(get_gptimer_intr); -void clear_gptimer_intr(int timer_id) +void clear_gptimer_intr(unsigned int timer_id) { tassert(timer_id < MAX_BLACKFIN_GPTIMERS); - group_regs[BFIN_TIMER_OCTET(timer_id)]->status = timil_mask[timer_id]; + bfin_write(&group_regs[BFIN_TIMER_OCTET(timer_id)]->status, timil_mask[timer_id]); } EXPORT_SYMBOL(clear_gptimer_intr); -uint16_t get_gptimer_over(int timer_id) +int get_gptimer_over(unsigned int timer_id) { tassert(timer_id < MAX_BLACKFIN_GPTIMERS); - return (group_regs[BFIN_TIMER_OCTET(timer_id)]->status & tovf_mask[timer_id]) ? 1 : 0; + return !!(read_gptimer_status(timer_id) & tovf_mask[timer_id]); } EXPORT_SYMBOL(get_gptimer_over); -void clear_gptimer_over(int timer_id) +void clear_gptimer_over(unsigned int timer_id) { tassert(timer_id < MAX_BLACKFIN_GPTIMERS); - group_regs[BFIN_TIMER_OCTET(timer_id)]->status = tovf_mask[timer_id]; + bfin_write(&group_regs[BFIN_TIMER_OCTET(timer_id)]->status, tovf_mask[timer_id]); } EXPORT_SYMBOL(clear_gptimer_over); -void set_gptimer_config(int timer_id, uint16_t config) +int get_gptimer_run(unsigned int timer_id) +{ + tassert(timer_id < MAX_BLACKFIN_GPTIMERS); + return !!(read_gptimer_status(timer_id) & trun_mask[timer_id]); +} +EXPORT_SYMBOL(get_gptimer_run); +#endif + +void set_gptimer_config(unsigned int timer_id, uint16_t config) { tassert(timer_id < MAX_BLACKFIN_GPTIMERS); - timer_regs[timer_id]->config = config; + bfin_write(&timer_regs[timer_id]->config, config); SSYNC(); } EXPORT_SYMBOL(set_gptimer_config); -uint16_t get_gptimer_config(int timer_id) +uint16_t get_gptimer_config(unsigned int timer_id) { tassert(timer_id < MAX_BLACKFIN_GPTIMERS); - return timer_regs[timer_id]->config; + return bfin_read(&timer_regs[timer_id]->config); } EXPORT_SYMBOL(get_gptimer_config); void enable_gptimers(uint16_t mask) { int i; +#ifdef CONFIG_BF60x + uint16_t imask; + imask = bfin_read16(TIMER_DATA_IMSK); + imask &= ~mask; + bfin_write16(TIMER_DATA_IMSK, imask); +#endif tassert((mask & ~BLACKFIN_GPTIMER_IDMASK) == 0); for (i = 0; i < BFIN_TIMER_NUM_GROUP; ++i) { - group_regs[i]->enable = mask & 0xFF; + bfin_write(&group_regs[i]->enable, mask & 0xFF); mask >>= 8; } SSYNC(); } EXPORT_SYMBOL(enable_gptimers); -void disable_gptimers(uint16_t mask) +static void _disable_gptimers(uint16_t mask) { int i; uint16_t m = mask; tassert((mask & ~BLACKFIN_GPTIMER_IDMASK) == 0); for (i = 0; i < BFIN_TIMER_NUM_GROUP; ++i) { - group_regs[i]->disable = m & 0xFF; + bfin_write(&group_regs[i]->disable, m & 0xFF); m >>= 8; } +} + +void disable_gptimers(uint16_t mask) +{ +#ifndef CONFIG_BF60x + int i; + _disable_gptimers(mask); for (i = 0; i < MAX_BLACKFIN_GPTIMERS; ++i) if (mask & (1 << i)) - group_regs[BFIN_TIMER_OCTET(i)]->status |= trun_mask[i]; + bfin_write(&group_regs[BFIN_TIMER_OCTET(i)]->status, trun_mask[i]); SSYNC(); +#else + _disable_gptimers(mask); +#endif } EXPORT_SYMBOL(disable_gptimers); -void set_gptimer_pulse_hi(int timer_id) +void disable_gptimers_sync(uint16_t mask) +{ + _disable_gptimers(mask); + SSYNC(); +} +EXPORT_SYMBOL(disable_gptimers_sync); + +void set_gptimer_pulse_hi(unsigned int timer_id) { tassert(timer_id < MAX_BLACKFIN_GPTIMERS); - timer_regs[timer_id]->config |= TIMER_PULSE_HI; + bfin_write_or(&timer_regs[timer_id]->config, TIMER_PULSE_HI); SSYNC(); } EXPORT_SYMBOL(set_gptimer_pulse_hi); -void clear_gptimer_pulse_hi(int timer_id) +void clear_gptimer_pulse_hi(unsigned int timer_id) { tassert(timer_id < MAX_BLACKFIN_GPTIMERS); - timer_regs[timer_id]->config &= ~TIMER_PULSE_HI; + bfin_write_and(&timer_regs[timer_id]->config, ~TIMER_PULSE_HI); SSYNC(); } EXPORT_SYMBOL(clear_gptimer_pulse_hi); @@ -273,7 +373,7 @@ uint16_t get_enabled_gptimers(void) int i; uint16_t result = 0; for (i = 0; i < BFIN_TIMER_NUM_GROUP; ++i) - result |= (group_regs[i]->enable << (i << 3)); + result |= (bfin_read(&group_regs[i]->enable) << (i << 3)); return result; } EXPORT_SYMBOL(get_enabled_gptimers); diff --git a/arch/blackfin/kernel/init_task.c b/arch/blackfin/kernel/init_task.c deleted file mode 100644 index c640154030e..00000000000 --- a/arch/blackfin/kernel/init_task.c +++ /dev/null @@ -1,61 +0,0 @@ -/* - * File: arch/blackfin/kernel/init_task.c - * Based on: - * Author: - * - * Created: - * Description: This file contains the simple DMA Implementation for Blackfin - * - * Modified: - * Copyright 2004-2006 Analog Devices Inc. - * - * Bugs: Enter bugs at http://blackfin.uclinux.org/ - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, see the file COPYING, or write - * to the Free Software Foundation, Inc., - * 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA - */ - -#include <linux/mm.h> -#include <linux/module.h> -#include <linux/init_task.h> -#include <linux/mqueue.h> -#include <linux/fs.h> - -static struct fs_struct init_fs = INIT_FS; -static struct files_struct init_files = INIT_FILES; -static struct signal_struct init_signals = INIT_SIGNALS(init_signals); -static struct sighand_struct init_sighand = INIT_SIGHAND(init_sighand); - -struct mm_struct init_mm = INIT_MM(init_mm); -EXPORT_SYMBOL(init_mm); - -/* - * Initial task structure. - * - * All other task structs will be allocated on slabs in fork.c - */ -struct task_struct init_task = INIT_TASK(init_task); -EXPORT_SYMBOL(init_task); - -/* - * Initial thread structure. - * - * We need to make sure that this is 8192-byte aligned due to the - * way process stacks are handled. This is done by having a special - * "init_task" linker map entry. - */ -union thread_union init_thread_union - __attribute__ ((__section__(".init_task.data"))) = { -INIT_THREAD_INFO(init_task)}; diff --git a/arch/blackfin/kernel/ipipe.c b/arch/blackfin/kernel/ipipe.c new file mode 100644 index 00000000000..f657b38163e --- /dev/null +++ b/arch/blackfin/kernel/ipipe.c @@ -0,0 +1,397 @@ +/* -*- linux-c -*- + * linux/arch/blackfin/kernel/ipipe.c + * + * Copyright (C) 2005-2007 Philippe Gerum. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation, Inc., 675 Mass Ave, Cambridge MA 02139, + * USA; either version 2 of the License, or (at your option) any later + * version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. + * + * Architecture-dependent I-pipe support for the Blackfin. + */ + +#include <linux/kernel.h> +#include <linux/sched.h> +#include <linux/module.h> +#include <linux/interrupt.h> +#include <linux/percpu.h> +#include <linux/bitops.h> +#include <linux/errno.h> +#include <linux/kthread.h> +#include <linux/unistd.h> +#include <linux/io.h> +#include <linux/atomic.h> +#include <asm/irq_handler.h> + +DEFINE_PER_CPU(struct pt_regs, __ipipe_tick_regs); + +asmlinkage void asm_do_IRQ(unsigned int irq, struct pt_regs *regs); + +static void __ipipe_no_irqtail(void); + +unsigned long __ipipe_irq_tail_hook = (unsigned long)&__ipipe_no_irqtail; +EXPORT_SYMBOL(__ipipe_irq_tail_hook); + +unsigned long __ipipe_core_clock; +EXPORT_SYMBOL(__ipipe_core_clock); + +unsigned long __ipipe_freq_scale; +EXPORT_SYMBOL(__ipipe_freq_scale); + +atomic_t __ipipe_irq_lvdepth[IVG15 + 1]; + +unsigned long __ipipe_irq_lvmask = bfin_no_irqs; +EXPORT_SYMBOL(__ipipe_irq_lvmask); + +static void __ipipe_ack_irq(unsigned irq, struct irq_desc *desc) +{ + desc->ipipe_ack(irq, desc); +} + +/* + * __ipipe_enable_pipeline() -- We are running on the boot CPU, hw + * interrupts are off, and secondary CPUs are still lost in space. + */ +void __ipipe_enable_pipeline(void) +{ + unsigned irq; + + __ipipe_core_clock = get_cclk(); /* Fetch this once. */ + __ipipe_freq_scale = 1000000000UL / __ipipe_core_clock; + + for (irq = 0; irq < NR_IRQS; ++irq) + ipipe_virtualize_irq(ipipe_root_domain, + irq, + (ipipe_irq_handler_t)&asm_do_IRQ, + NULL, + &__ipipe_ack_irq, + IPIPE_HANDLE_MASK | IPIPE_PASS_MASK); +} + +/* + * __ipipe_handle_irq() -- IPIPE's generic IRQ handler. An optimistic + * interrupt protection log is maintained here for each domain. Hw + * interrupts are masked on entry. + */ +void __ipipe_handle_irq(unsigned irq, struct pt_regs *regs) +{ + struct ipipe_percpu_domain_data *p = ipipe_root_cpudom_ptr(); + struct ipipe_domain *this_domain, *next_domain; + struct list_head *head, *pos; + struct ipipe_irqdesc *idesc; + int m_ack, s = -1; + + /* + * Software-triggered IRQs do not need any ack. The contents + * of the register frame should only be used when processing + * the timer interrupt, but not for handling any other + * interrupt. + */ + m_ack = (regs == NULL || irq == IRQ_SYSTMR || irq == IRQ_CORETMR); + this_domain = __ipipe_current_domain; + idesc = &this_domain->irqs[irq]; + + if (unlikely(test_bit(IPIPE_STICKY_FLAG, &idesc->control))) + head = &this_domain->p_link; + else { + head = __ipipe_pipeline.next; + next_domain = list_entry(head, struct ipipe_domain, p_link); + idesc = &next_domain->irqs[irq]; + if (likely(test_bit(IPIPE_WIRED_FLAG, &idesc->control))) { + if (!m_ack && idesc->acknowledge != NULL) + idesc->acknowledge(irq, irq_to_desc(irq)); + if (test_bit(IPIPE_SYNCDEFER_FLAG, &p->status)) + s = __test_and_set_bit(IPIPE_STALL_FLAG, + &p->status); + __ipipe_dispatch_wired(next_domain, irq); + goto out; + } + } + + /* Ack the interrupt. */ + + pos = head; + while (pos != &__ipipe_pipeline) { + next_domain = list_entry(pos, struct ipipe_domain, p_link); + idesc = &next_domain->irqs[irq]; + if (test_bit(IPIPE_HANDLE_FLAG, &idesc->control)) { + __ipipe_set_irq_pending(next_domain, irq); + if (!m_ack && idesc->acknowledge != NULL) { + idesc->acknowledge(irq, irq_to_desc(irq)); + m_ack = 1; + } + } + if (!test_bit(IPIPE_PASS_FLAG, &idesc->control)) + break; + pos = next_domain->p_link.next; + } + + /* + * Now walk the pipeline, yielding control to the highest + * priority domain that has pending interrupt(s) or + * immediately to the current domain if the interrupt has been + * marked as 'sticky'. This search does not go beyond the + * current domain in the pipeline. We also enforce the + * additional root stage lock (blackfin-specific). + */ + if (test_bit(IPIPE_SYNCDEFER_FLAG, &p->status)) + s = __test_and_set_bit(IPIPE_STALL_FLAG, &p->status); + + /* + * If the interrupt preempted the head domain, then do not + * even try to walk the pipeline, unless an interrupt is + * pending for it. + */ + if (test_bit(IPIPE_AHEAD_FLAG, &this_domain->flags) && + !__ipipe_ipending_p(ipipe_head_cpudom_ptr())) + goto out; + + __ipipe_walk_pipeline(head); +out: + if (!s) + __clear_bit(IPIPE_STALL_FLAG, &p->status); +} + +void __ipipe_enable_irqdesc(struct ipipe_domain *ipd, unsigned irq) +{ + struct irq_desc *desc = irq_to_desc(irq); + int prio = __ipipe_get_irq_priority(irq); + + desc->depth = 0; + if (ipd != &ipipe_root && + atomic_inc_return(&__ipipe_irq_lvdepth[prio]) == 1) + __set_bit(prio, &__ipipe_irq_lvmask); +} +EXPORT_SYMBOL(__ipipe_enable_irqdesc); + +void __ipipe_disable_irqdesc(struct ipipe_domain *ipd, unsigned irq) +{ + int prio = __ipipe_get_irq_priority(irq); + + if (ipd != &ipipe_root && + atomic_dec_and_test(&__ipipe_irq_lvdepth[prio])) + __clear_bit(prio, &__ipipe_irq_lvmask); +} +EXPORT_SYMBOL(__ipipe_disable_irqdesc); + +asmlinkage int __ipipe_syscall_root(struct pt_regs *regs) +{ + struct ipipe_percpu_domain_data *p; + void (*hook)(void); + int ret; + + WARN_ON_ONCE(irqs_disabled_hw()); + + /* + * We need to run the IRQ tail hook each time we intercept a + * syscall, because we know that important operations might be + * pending there (e.g. Xenomai deferred rescheduling). + */ + hook = (__typeof__(hook))__ipipe_irq_tail_hook; + hook(); + + /* + * This routine either returns: + * 0 -- if the syscall is to be passed to Linux; + * >0 -- if the syscall should not be passed to Linux, and no + * tail work should be performed; + * <0 -- if the syscall should not be passed to Linux but the + * tail work has to be performed (for handling signals etc). + */ + + if (!__ipipe_syscall_watched_p(current, regs->orig_p0) || + !__ipipe_event_monitored_p(IPIPE_EVENT_SYSCALL)) + return 0; + + ret = __ipipe_dispatch_event(IPIPE_EVENT_SYSCALL, regs); + + hard_local_irq_disable(); + + /* + * This is the end of the syscall path, so we may + * safely assume a valid Linux task stack here. + */ + if (current->ipipe_flags & PF_EVTRET) { + current->ipipe_flags &= ~PF_EVTRET; + __ipipe_dispatch_event(IPIPE_EVENT_RETURN, regs); + } + + if (!__ipipe_root_domain_p) + ret = -1; + else { + p = ipipe_root_cpudom_ptr(); + if (__ipipe_ipending_p(p)) + __ipipe_sync_pipeline(); + } + + hard_local_irq_enable(); + + return -ret; +} + +static void __ipipe_no_irqtail(void) +{ +} + +int ipipe_get_sysinfo(struct ipipe_sysinfo *info) +{ + info->sys_nr_cpus = num_online_cpus(); + info->sys_cpu_freq = ipipe_cpu_freq(); + info->sys_hrtimer_irq = IPIPE_TIMER_IRQ; + info->sys_hrtimer_freq = __ipipe_core_clock; + info->sys_hrclock_freq = __ipipe_core_clock; + + return 0; +} + +/* + * ipipe_trigger_irq() -- Push the interrupt at front of the pipeline + * just like if it has been actually received from a hw source. Also + * works for virtual interrupts. + */ +int ipipe_trigger_irq(unsigned irq) +{ + unsigned long flags; + +#ifdef CONFIG_IPIPE_DEBUG + if (irq >= IPIPE_NR_IRQS || + (ipipe_virtual_irq_p(irq) + && !test_bit(irq - IPIPE_VIRQ_BASE, &__ipipe_virtual_irq_map))) + return -EINVAL; +#endif + + flags = hard_local_irq_save(); + __ipipe_handle_irq(irq, NULL); + hard_local_irq_restore(flags); + + return 1; +} + +asmlinkage void __ipipe_sync_root(void) +{ + void (*irq_tail_hook)(void) = (void (*)(void))__ipipe_irq_tail_hook; + struct ipipe_percpu_domain_data *p; + unsigned long flags; + + BUG_ON(irqs_disabled()); + + flags = hard_local_irq_save(); + + if (irq_tail_hook) + irq_tail_hook(); + + clear_thread_flag(TIF_IRQ_SYNC); + + p = ipipe_root_cpudom_ptr(); + if (__ipipe_ipending_p(p)) + __ipipe_sync_pipeline(); + + hard_local_irq_restore(flags); +} + +void ___ipipe_sync_pipeline(void) +{ + if (__ipipe_root_domain_p && + test_bit(IPIPE_SYNCDEFER_FLAG, &ipipe_root_cpudom_var(status))) + return; + + __ipipe_sync_stage(); +} + +void __ipipe_disable_root_irqs_hw(void) +{ + /* + * This code is called by the ins{bwl} routines (see + * arch/blackfin/lib/ins.S), which are heavily used by the + * network stack. It masks all interrupts but those handled by + * non-root domains, so that we keep decent network transfer + * rates for Linux without inducing pathological jitter for + * the real-time domain. + */ + bfin_sti(__ipipe_irq_lvmask); + __set_bit(IPIPE_STALL_FLAG, &ipipe_root_cpudom_var(status)); +} + +void __ipipe_enable_root_irqs_hw(void) +{ + __clear_bit(IPIPE_STALL_FLAG, &ipipe_root_cpudom_var(status)); + bfin_sti(bfin_irq_flags); +} + +/* + * We could use standard atomic bitops in the following root status + * manipulation routines, but let's prepare for SMP support in the + * same move, preventing CPU migration as required. + */ +void __ipipe_stall_root(void) +{ + unsigned long *p, flags; + + flags = hard_local_irq_save(); + p = &__ipipe_root_status; + __set_bit(IPIPE_STALL_FLAG, p); + hard_local_irq_restore(flags); +} +EXPORT_SYMBOL(__ipipe_stall_root); + +unsigned long __ipipe_test_and_stall_root(void) +{ + unsigned long *p, flags; + int x; + + flags = hard_local_irq_save(); + p = &__ipipe_root_status; + x = __test_and_set_bit(IPIPE_STALL_FLAG, p); + hard_local_irq_restore(flags); + + return x; +} +EXPORT_SYMBOL(__ipipe_test_and_stall_root); + +unsigned long __ipipe_test_root(void) +{ + const unsigned long *p; + unsigned long flags; + int x; + + flags = hard_local_irq_save_smp(); + p = &__ipipe_root_status; + x = test_bit(IPIPE_STALL_FLAG, p); + hard_local_irq_restore_smp(flags); + + return x; +} +EXPORT_SYMBOL(__ipipe_test_root); + +void __ipipe_lock_root(void) +{ + unsigned long *p, flags; + + flags = hard_local_irq_save(); + p = &__ipipe_root_status; + __set_bit(IPIPE_SYNCDEFER_FLAG, p); + hard_local_irq_restore(flags); +} +EXPORT_SYMBOL(__ipipe_lock_root); + +void __ipipe_unlock_root(void) +{ + unsigned long *p, flags; + + flags = hard_local_irq_save(); + p = &__ipipe_root_status; + __clear_bit(IPIPE_SYNCDEFER_FLAG, p); + hard_local_irq_restore(flags); +} +EXPORT_SYMBOL(__ipipe_unlock_root); diff --git a/arch/blackfin/kernel/irqchip.c b/arch/blackfin/kernel/irqchip.c index 73647c15877..0ba25764b8c 100644 --- a/arch/blackfin/kernel/irqchip.c +++ b/arch/blackfin/kernel/irqchip.c @@ -1,30 +1,7 @@ /* - * File: arch/blackfin/kernel/irqchip.c - * Based on: - * Author: + * Copyright 2005-2009 Analog Devices Inc. * - * Created: - * Description: This file contains the simple DMA Implementation for Blackfin - * - * Modified: - * Copyright 2004-2006 Analog Devices Inc. - * - * Bugs: Enter bugs at http://blackfin.uclinux.org/ - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, see the file COPYING, or write - * to the Free Software Foundation, Inc., - * 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA + * Licensed under the GPL-2 or later */ #include <linux/kernel_stat.h> @@ -34,100 +11,108 @@ #include <linux/kallsyms.h> #include <linux/interrupt.h> #include <linux/irq.h> +#include <linux/seq_file.h> +#include <asm/irq_handler.h> #include <asm/trace.h> +#include <asm/pda.h> -static unsigned long irq_err_count; -static spinlock_t irq_controller_lock; - -/* - * Dummy mask/unmask handler - */ -void dummy_mask_unmask_irq(unsigned int irq) -{ -} - +static atomic_t irq_err_count; void ack_bad_irq(unsigned int irq) { - irq_err_count += 1; + atomic_inc(&irq_err_count); printk(KERN_ERR "IRQ: spurious interrupt %d\n", irq); } -EXPORT_SYMBOL(ack_bad_irq); - -static struct irq_chip bad_chip = { - .ack = dummy_mask_unmask_irq, - .mask = dummy_mask_unmask_irq, - .unmask = dummy_mask_unmask_irq, -}; static struct irq_desc bad_irq_desc = { - .chip = &bad_chip, .handle_irq = handle_bad_irq, - .depth = 1, + .lock = __RAW_SPIN_LOCK_UNLOCKED(bad_irq_desc.lock), }; -int show_interrupts(struct seq_file *p, void *v) +#ifdef CONFIG_CPUMASK_OFFSTACK +/* We are not allocating a variable-sized bad_irq_desc.affinity */ +#error "Blackfin architecture does not support CONFIG_CPUMASK_OFFSTACK." +#endif + +#ifdef CONFIG_PROC_FS +int arch_show_interrupts(struct seq_file *p, int prec) { - int i = *(loff_t *) v; - struct irqaction *action; - unsigned long flags; - - if (i < NR_IRQS) { - spin_lock_irqsave(&irq_desc[i].lock, flags); - action = irq_desc[i].action; - if (!action) - goto unlock; - - seq_printf(p, "%3d: %10u ", i, kstat_irqs(i)); - seq_printf(p, " %s", action->name); - for (action = action->next; action; action = action->next) - seq_printf(p, ", %s", action->name); - - seq_putc(p, '\n'); - unlock: - spin_unlock_irqrestore(&irq_desc[i].lock, flags); - } else if (i == NR_IRQS) { - seq_printf(p, "Err: %10lu\n", irq_err_count); - } + int j; + + seq_printf(p, "%*s: ", prec, "NMI"); + for_each_online_cpu(j) + seq_printf(p, "%10u ", cpu_pda[j].__nmi_count); + seq_printf(p, " CORE Non Maskable Interrupt\n"); + seq_printf(p, "%*s: %10u\n", prec, "ERR", atomic_read(&irq_err_count)); return 0; } +#endif + +#ifdef CONFIG_DEBUG_STACKOVERFLOW +static void check_stack_overflow(int irq) +{ + /* Debugging check for stack overflow: is there less than STACK_WARN free? */ + long sp = __get_SP() & (THREAD_SIZE - 1); + + if (unlikely(sp < (sizeof(struct thread_info) + STACK_WARN))) { + dump_stack(); + pr_emerg("irq%i: possible stack overflow only %ld bytes free\n", + irq, sp - sizeof(struct thread_info)); + } +} +#else +static inline void check_stack_overflow(int irq) { } +#endif + +#ifndef CONFIG_IPIPE +static void maybe_lower_to_irq14(void) +{ + unsigned short pending, other_ints; + + /* + * If we're the only interrupt running (ignoring IRQ15 which + * is for syscalls), lower our priority to IRQ14 so that + * softirqs run at that level. If there's another, + * lower-level interrupt, irq_exit will defer softirqs to + * that. If the interrupt pipeline is enabled, we are already + * running at IRQ14 priority, so we don't need this code. + */ + CSYNC(); + pending = bfin_read_IPEND() & ~0x8000; + other_ints = pending & (pending - 1); + if (other_ints == 0) + lower_to_irq14(); +} +#else +static inline void maybe_lower_to_irq14(void) { } +#endif /* * do_IRQ handles all hardware IRQs. Decoded IRQs should not * come via this function. Instead, they should provide their * own 'handler' */ - #ifdef CONFIG_DO_IRQ_L1 __attribute__((l1_text)) #endif asmlinkage void asm_do_IRQ(unsigned int irq, struct pt_regs *regs) { - struct pt_regs *old_regs; - struct irq_desc *desc = irq_desc + irq; - unsigned short pending, other_ints; + struct pt_regs *old_regs = set_irq_regs(regs); + + irq_enter(); - old_regs = set_irq_regs(regs); + check_stack_overflow(irq); /* * Some hardware gives randomly wrong interrupts. Rather * than crashing, do something sensible. */ if (irq >= NR_IRQS) - desc = &bad_irq_desc; + handle_bad_irq(irq, &bad_irq_desc); + else + generic_handle_irq(irq); - irq_enter(); + maybe_lower_to_irq14(); - generic_handle_irq(irq); - - /* If we're the only interrupt running (ignoring IRQ15 which is for - syscalls), lower our priority to IRQ14 so that softirqs run at - that level. If there's another, lower-level interrupt, irq_exit - will defer softirqs to that. */ - CSYNC(); - pending = bfin_read_IPEND() & ~0x8000; - other_ints = pending & (pending - 1); - if (other_ints == 0) - lower_to_irq14(); irq_exit(); set_irq_regs(old_regs); @@ -135,14 +120,6 @@ asmlinkage void asm_do_IRQ(unsigned int irq, struct pt_regs *regs) void __init init_IRQ(void) { - struct irq_desc *desc; - int irq; - - spin_lock_init(&irq_controller_lock); - for (irq = 0, desc = irq_desc; irq < NR_IRQS; irq++, desc++) { - *desc = bad_irq_desc; - } - init_arch_irq(); #ifdef CONFIG_DEBUG_BFIN_HWTRACE_EXPAND diff --git a/arch/blackfin/kernel/kgdb.c b/arch/blackfin/kernel/kgdb.c index a9c15515bfd..fa53faeeb0e 100644 --- a/arch/blackfin/kernel/kgdb.c +++ b/arch/blackfin/kernel/kgdb.c @@ -1,62 +1,17 @@ /* - * File: arch/blackfin/kernel/kgdb.c - * Based on: - * Author: Sonic Zhang + * arch/blackfin/kernel/kgdb.c - Blackfin kgdb pieces * - * Created: - * Description: + * Copyright 2005-2008 Analog Devices Inc. * - * Rev: $Id: kgdb_bfin_linux-2.6.x.patch 4934 2007-02-13 09:32:11Z sonicz $ - * - * Modified: - * Copyright 2005-2006 Analog Devices Inc. - * - * Bugs: Enter bugs at http://blackfin.uclinux.org/ - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, see the file COPYING, or write - * to the Free Software Foundation, Inc., - * 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA + * Licensed under the GPL-2 or later. */ -#include <linux/string.h> -#include <linux/kernel.h> -#include <linux/sched.h> -#include <linux/smp.h> -#include <linux/spinlock.h> -#include <linux/delay.h> #include <linux/ptrace.h> /* for linux pt_regs struct */ #include <linux/kgdb.h> -#include <linux/console.h> -#include <linux/init.h> -#include <linux/debugger.h> -#include <linux/errno.h> -#include <linux/irq.h> -#include <asm/system.h> -#include <asm/traps.h> -#include <asm/blackfin.h> - -/* Put the error code here just in case the user cares. */ -int gdb_bf533errcode; -/* Likewise, the vector number here (since GDB only gets the signal - number through the usual means, and that's not very specific). */ -int gdb_bf533vector = -1; - -#if KGDB_MAX_NO_CPUS != 8 -#error change the definition of slavecpulocks -#endif +#include <linux/uaccess.h> +#include <asm/irq_regs.h> -void regs_to_gdb_regs(unsigned long *gdb_regs, struct pt_regs *regs) +void pt_regs_to_gdb_regs(unsigned long *gdb_regs, struct pt_regs *regs) { gdb_regs[BFIN_R0] = regs->r0; gdb_regs[BFIN_R1] = regs->r1; @@ -112,7 +67,7 @@ void regs_to_gdb_regs(unsigned long *gdb_regs, struct pt_regs *regs) gdb_regs[BFIN_RETN] = regs->retn; gdb_regs[BFIN_RETE] = regs->rete; gdb_regs[BFIN_PC] = regs->pc; - gdb_regs[BFIN_CC] = 0; + gdb_regs[BFIN_CC] = (regs->astat >> 5) & 1; gdb_regs[BFIN_EXTRA1] = 0; gdb_regs[BFIN_EXTRA2] = 0; gdb_regs[BFIN_EXTRA3] = 0; @@ -123,7 +78,7 @@ void regs_to_gdb_regs(unsigned long *gdb_regs, struct pt_regs *regs) * Extracts ebp, esp and eip values understandable by gdb from the values * saved by switch_to. * thread.esp points to ebp. flags and ebp are pushed in switch_to hence esp - * prior to entering switch_to is 8 greater then the value that is saved. + * prior to entering switch_to is 8 greater than the value that is saved. * If switch_to changes, change following code appropriately. */ void sleeping_thread_to_gdb_regs(unsigned long *gdb_regs, struct task_struct *p) @@ -133,7 +88,7 @@ void sleeping_thread_to_gdb_regs(unsigned long *gdb_regs, struct task_struct *p) gdb_regs[BFIN_SEQSTAT] = p->thread.seqstat; } -void gdb_regs_to_regs(unsigned long *gdb_regs, struct pt_regs *regs) +void gdb_regs_to_pt_regs(unsigned long *gdb_regs, struct pt_regs *regs) { regs->r0 = gdb_regs[BFIN_R0]; regs->r1 = gdb_regs[BFIN_R1]; @@ -179,7 +134,7 @@ void gdb_regs_to_regs(unsigned long *gdb_regs, struct pt_regs *regs) regs->lb1 = gdb_regs[BFIN_LB1]; regs->usp = gdb_regs[BFIN_USP]; regs->syscfg = gdb_regs[BFIN_SYSCFG]; - regs->retx = gdb_regs[BFIN_PC]; + regs->retx = gdb_regs[BFIN_RETX]; regs->retn = gdb_regs[BFIN_RETN]; regs->rete = gdb_regs[BFIN_RETE]; regs->pc = gdb_regs[BFIN_PC]; @@ -191,7 +146,7 @@ void gdb_regs_to_regs(unsigned long *gdb_regs, struct pt_regs *regs) #endif } -struct hw_breakpoint { +static struct hw_breakpoint { unsigned int occupied:1; unsigned int skip:1; unsigned int enabled:1; @@ -199,175 +154,233 @@ struct hw_breakpoint { unsigned int dataacc:2; unsigned short count; unsigned int addr; -} breakinfo[HW_BREAKPOINT_NUM]; - -int kgdb_arch_init(void) -{ - kgdb_remove_all_hw_break(); - return 0; -} +} breakinfo[HW_WATCHPOINT_NUM]; -int kgdb_set_hw_break(unsigned long addr) +static int bfin_set_hw_break(unsigned long addr, int len, enum kgdb_bptype type) { int breakno; - for (breakno = 0; breakno < HW_BREAKPOINT_NUM; breakno++) - if (!breakinfo[breakno].occupied) { + int bfin_type; + int dataacc = 0; + + switch (type) { + case BP_HARDWARE_BREAKPOINT: + bfin_type = TYPE_INST_WATCHPOINT; + break; + case BP_WRITE_WATCHPOINT: + dataacc = 1; + bfin_type = TYPE_DATA_WATCHPOINT; + break; + case BP_READ_WATCHPOINT: + dataacc = 2; + bfin_type = TYPE_DATA_WATCHPOINT; + break; + case BP_ACCESS_WATCHPOINT: + dataacc = 3; + bfin_type = TYPE_DATA_WATCHPOINT; + break; + default: + return -ENOSPC; + } + + /* Because hardware data watchpoint impelemented in current + * Blackfin can not trigger an exception event as the hardware + * instrction watchpoint does, we ignaore all data watch point here. + * They can be turned on easily after future blackfin design + * supports this feature. + */ + for (breakno = 0; breakno < HW_INST_WATCHPOINT_NUM; breakno++) + if (bfin_type == breakinfo[breakno].type + && !breakinfo[breakno].occupied) { breakinfo[breakno].occupied = 1; + breakinfo[breakno].skip = 0; breakinfo[breakno].enabled = 1; - breakinfo[breakno].type = 1; breakinfo[breakno].addr = addr; + breakinfo[breakno].dataacc = dataacc; + breakinfo[breakno].count = 0; return 0; } return -ENOSPC; } -int kgdb_remove_hw_break(unsigned long addr) +static int bfin_remove_hw_break(unsigned long addr, int len, enum kgdb_bptype type) { int breakno; - for (breakno = 0; breakno < HW_BREAKPOINT_NUM; breakno++) - if (breakinfo[breakno].addr == addr) - memset(&(breakinfo[breakno]), 0, sizeof(struct hw_breakpoint)); + int bfin_type; + + switch (type) { + case BP_HARDWARE_BREAKPOINT: + bfin_type = TYPE_INST_WATCHPOINT; + break; + case BP_WRITE_WATCHPOINT: + case BP_READ_WATCHPOINT: + case BP_ACCESS_WATCHPOINT: + bfin_type = TYPE_DATA_WATCHPOINT; + break; + default: + return 0; + } + for (breakno = 0; breakno < HW_WATCHPOINT_NUM; breakno++) + if (bfin_type == breakinfo[breakno].type + && breakinfo[breakno].occupied + && breakinfo[breakno].addr == addr) { + breakinfo[breakno].occupied = 0; + breakinfo[breakno].enabled = 0; + } return 0; } -void kgdb_remove_all_hw_break(void) +static void bfin_remove_all_hw_break(void) { - memset(breakinfo, 0, sizeof(struct hw_breakpoint)*8); -} + int breakno; -/* -void kgdb_show_info(void) -{ - printk(KERN_DEBUG "hwd: wpia0=0x%x, wpiacnt0=%d, wpiactl=0x%x, wpstat=0x%x\n", - bfin_read_WPIA0(), bfin_read_WPIACNT0(), - bfin_read_WPIACTL(), bfin_read_WPSTAT()); + memset(breakinfo, 0, sizeof(struct hw_breakpoint)*HW_WATCHPOINT_NUM); + + for (breakno = 0; breakno < HW_INST_WATCHPOINT_NUM; breakno++) + breakinfo[breakno].type = TYPE_INST_WATCHPOINT; + for (; breakno < HW_WATCHPOINT_NUM; breakno++) + breakinfo[breakno].type = TYPE_DATA_WATCHPOINT; } -*/ -void kgdb_correct_hw_break(void) +static void bfin_correct_hw_break(void) { int breakno; - int correctit; - uint32_t wpdactl = bfin_read_WPDACTL(); + unsigned int wpiactl = 0; + unsigned int wpdactl = 0; + int enable_wp = 0; + + for (breakno = 0; breakno < HW_WATCHPOINT_NUM; breakno++) + if (breakinfo[breakno].enabled) { + enable_wp = 1; - correctit = 0; - for (breakno = 0; breakno < HW_BREAKPOINT_NUM; breakno++) { - if (breakinfo[breakno].type == 1) { switch (breakno) { case 0: - if (breakinfo[breakno].enabled && !(wpdactl & WPIAEN0)) { - correctit = 1; - wpdactl &= ~(WPIREN01|EMUSW0); - wpdactl |= WPIAEN0|WPICNTEN0; - bfin_write_WPIA0(breakinfo[breakno].addr); - bfin_write_WPIACNT0(breakinfo[breakno].skip); - } else if (!breakinfo[breakno].enabled && (wpdactl & WPIAEN0)) { - correctit = 1; - wpdactl &= ~WPIAEN0; - } + wpiactl |= WPIAEN0|WPICNTEN0; + bfin_write_WPIA0(breakinfo[breakno].addr); + bfin_write_WPIACNT0(breakinfo[breakno].count + + breakinfo->skip); break; - case 1: - if (breakinfo[breakno].enabled && !(wpdactl & WPIAEN1)) { - correctit = 1; - wpdactl &= ~(WPIREN01|EMUSW1); - wpdactl |= WPIAEN1|WPICNTEN1; - bfin_write_WPIA1(breakinfo[breakno].addr); - bfin_write_WPIACNT1(breakinfo[breakno].skip); - } else if (!breakinfo[breakno].enabled && (wpdactl & WPIAEN1)) { - correctit = 1; - wpdactl &= ~WPIAEN1; - } + wpiactl |= WPIAEN1|WPICNTEN1; + bfin_write_WPIA1(breakinfo[breakno].addr); + bfin_write_WPIACNT1(breakinfo[breakno].count + + breakinfo->skip); break; - case 2: - if (breakinfo[breakno].enabled && !(wpdactl & WPIAEN2)) { - correctit = 1; - wpdactl &= ~(WPIREN23|EMUSW2); - wpdactl |= WPIAEN2|WPICNTEN2; - bfin_write_WPIA2(breakinfo[breakno].addr); - bfin_write_WPIACNT2(breakinfo[breakno].skip); - } else if (!breakinfo[breakno].enabled && (wpdactl & WPIAEN2)) { - correctit = 1; - wpdactl &= ~WPIAEN2; - } + wpiactl |= WPIAEN2|WPICNTEN2; + bfin_write_WPIA2(breakinfo[breakno].addr); + bfin_write_WPIACNT2(breakinfo[breakno].count + + breakinfo->skip); break; - case 3: - if (breakinfo[breakno].enabled && !(wpdactl & WPIAEN3)) { - correctit = 1; - wpdactl &= ~(WPIREN23|EMUSW3); - wpdactl |= WPIAEN3|WPICNTEN3; - bfin_write_WPIA3(breakinfo[breakno].addr); - bfin_write_WPIACNT3(breakinfo[breakno].skip); - } else if (!breakinfo[breakno].enabled && (wpdactl & WPIAEN3)) { - correctit = 1; - wpdactl &= ~WPIAEN3; - } + wpiactl |= WPIAEN3|WPICNTEN3; + bfin_write_WPIA3(breakinfo[breakno].addr); + bfin_write_WPIACNT3(breakinfo[breakno].count + + breakinfo->skip); break; case 4: - if (breakinfo[breakno].enabled && !(wpdactl & WPIAEN4)) { - correctit = 1; - wpdactl &= ~(WPIREN45|EMUSW4); - wpdactl |= WPIAEN4|WPICNTEN4; - bfin_write_WPIA4(breakinfo[breakno].addr); - bfin_write_WPIACNT4(breakinfo[breakno].skip); - } else if (!breakinfo[breakno].enabled && (wpdactl & WPIAEN4)) { - correctit = 1; - wpdactl &= ~WPIAEN4; - } + wpiactl |= WPIAEN4|WPICNTEN4; + bfin_write_WPIA4(breakinfo[breakno].addr); + bfin_write_WPIACNT4(breakinfo[breakno].count + + breakinfo->skip); break; case 5: - if (breakinfo[breakno].enabled && !(wpdactl & WPIAEN5)) { - correctit = 1; - wpdactl &= ~(WPIREN45|EMUSW5); - wpdactl |= WPIAEN5|WPICNTEN5; - bfin_write_WPIA5(breakinfo[breakno].addr); - bfin_write_WPIACNT5(breakinfo[breakno].skip); - } else if (!breakinfo[breakno].enabled && (wpdactl & WPIAEN5)) { - correctit = 1; - wpdactl &= ~WPIAEN5; - } + wpiactl |= WPIAEN5|WPICNTEN5; + bfin_write_WPIA5(breakinfo[breakno].addr); + bfin_write_WPIACNT5(breakinfo[breakno].count + + breakinfo->skip); + break; + case 6: + wpdactl |= WPDAEN0|WPDCNTEN0|WPDSRC0; + wpdactl |= breakinfo[breakno].dataacc + << WPDACC0_OFFSET; + bfin_write_WPDA0(breakinfo[breakno].addr); + bfin_write_WPDACNT0(breakinfo[breakno].count + + breakinfo->skip); + break; + case 7: + wpdactl |= WPDAEN1|WPDCNTEN1|WPDSRC1; + wpdactl |= breakinfo[breakno].dataacc + << WPDACC1_OFFSET; + bfin_write_WPDA1(breakinfo[breakno].addr); + bfin_write_WPDACNT1(breakinfo[breakno].count + + breakinfo->skip); break; } } - } - if (correctit) { - wpdactl &= ~WPAND; - wpdactl |= WPPWR; - /*printk("correct_hw_break: wpdactl=0x%x\n", wpdactl);*/ + + /* Should enable WPPWR bit first before set any other + * WPIACTL and WPDACTL bits */ + if (enable_wp) { + bfin_write_WPIACTL(WPPWR); + CSYNC(); + bfin_write_WPIACTL(wpiactl|WPPWR); bfin_write_WPDACTL(wpdactl); CSYNC(); - /*kgdb_show_info();*/ } } -void kgdb_disable_hw_debug(struct pt_regs *regs) +static void bfin_disable_hw_debug(struct pt_regs *regs) { /* Disable hardware debugging while we are in kgdb */ - bfin_write_WPIACTL(bfin_read_WPIACTL() & ~0x1); + bfin_write_WPIACTL(0); + bfin_write_WPDACTL(0); CSYNC(); } -void kgdb_post_master_code(struct pt_regs *regs, int eVector, int err_code) +#ifdef CONFIG_SMP +extern void generic_exec_single(int cpu, struct call_single_data *data, int wait); +static struct call_single_data kgdb_smp_ipi_data[NR_CPUS]; + +void kgdb_passive_cpu_callback(void *info) +{ + kgdb_nmicallback(raw_smp_processor_id(), get_irq_regs()); +} + +void kgdb_roundup_cpus(unsigned long flags) +{ + unsigned int cpu; + + for (cpu = cpumask_first(cpu_online_mask); cpu < nr_cpu_ids; + cpu = cpumask_next(cpu, cpu_online_mask)) { + kgdb_smp_ipi_data[cpu].func = kgdb_passive_cpu_callback; + generic_exec_single(cpu, &kgdb_smp_ipi_data[cpu], 0); + } +} + +void kgdb_roundup_cpu(int cpu, unsigned long flags) { - /* Master processor is completely in the debugger */ - gdb_bf533vector = eVector; - gdb_bf533errcode = err_code; + generic_exec_single(cpu, &kgdb_smp_ipi_data[cpu], 0); } +#endif -int kgdb_arch_handle_exception(int exceptionVector, int signo, +#ifdef CONFIG_IPIPE +static unsigned long kgdb_arch_imask; +#endif + +void kgdb_post_primary_code(struct pt_regs *regs, int e_vector, int err_code) +{ + if (kgdb_single_step) + preempt_enable(); + +#ifdef CONFIG_IPIPE + if (kgdb_arch_imask) { + cpu_pda[raw_smp_processor_id()].ex_imask = kgdb_arch_imask; + kgdb_arch_imask = 0; + } +#endif +} + +int kgdb_arch_handle_exception(int vector, int signo, int err_code, char *remcom_in_buffer, char *remcom_out_buffer, - struct pt_regs *linux_regs) + struct pt_regs *regs) { long addr; - long breakno; char *ptr; int newPC; - int wp_status; + int i; switch (remcom_in_buffer[0]) { case 'c': @@ -382,33 +395,35 @@ int kgdb_arch_handle_exception(int exceptionVector, int signo, /* try to read optional parameter, pc unchanged if no parm */ ptr = &remcom_in_buffer[1]; if (kgdb_hex2long(&ptr, &addr)) { - linux_regs->retx = addr; + regs->retx = addr; } - newPC = linux_regs->retx; + newPC = regs->retx; /* clear the trace bit */ - linux_regs->syscfg &= 0xfffffffe; + regs->syscfg &= 0xfffffffe; /* set the trace bit if we're stepping */ if (remcom_in_buffer[0] == 's') { - linux_regs->syscfg |= 0x1; - debugger_step = 1; - } - - wp_status = bfin_read_WPSTAT(); - CSYNC(); - - if (exceptionVector == VEC_WATCH) { - for (breakno = 0; breakno < 6; ++breakno) { - if (wp_status & (1 << breakno)) { - breakinfo->skip = 1; + regs->syscfg |= 0x1; + kgdb_single_step = regs->ipend; + kgdb_single_step >>= 6; + for (i = 10; i > 0; i--, kgdb_single_step >>= 1) + if (kgdb_single_step & 1) break; - } - } + /* i indicate event priority of current stopped instruction + * user space instruction is 0, IVG15 is 1, IVTMR is 10. + * kgdb_single_step > 0 means in single step mode + */ + kgdb_single_step = i + 1; + + preempt_disable(); +#ifdef CONFIG_IPIPE + kgdb_arch_imask = cpu_pda[raw_smp_processor_id()].ex_imask; + cpu_pda[raw_smp_processor_id()].ex_imask = 0; +#endif } - kgdb_correct_hw_break(); - bfin_write_WPSTAT(0); + bfin_correct_hw_break(); return 0; } /* switch */ @@ -418,4 +433,58 @@ int kgdb_arch_handle_exception(int exceptionVector, int signo, struct kgdb_arch arch_kgdb_ops = { .gdb_bpt_instr = {0xa1}, .flags = KGDB_HW_BREAKPOINT, + .set_hw_breakpoint = bfin_set_hw_break, + .remove_hw_breakpoint = bfin_remove_hw_break, + .disable_hw_break = bfin_disable_hw_debug, + .remove_all_hw_break = bfin_remove_all_hw_break, + .correct_hw_break = bfin_correct_hw_break, }; + +#define IN_MEM(addr, size, l1_addr, l1_size) \ +({ \ + unsigned long __addr = (unsigned long)(addr); \ + (l1_size && __addr >= l1_addr && __addr + (size) <= l1_addr + l1_size); \ +}) +#define ASYNC_BANK_SIZE \ + (ASYNC_BANK0_SIZE + ASYNC_BANK1_SIZE + \ + ASYNC_BANK2_SIZE + ASYNC_BANK3_SIZE) + +int kgdb_validate_break_address(unsigned long addr) +{ + int cpu = raw_smp_processor_id(); + + if (addr >= 0x1000 && (addr + BREAK_INSTR_SIZE) <= physical_mem_end) + return 0; + if (IN_MEM(addr, BREAK_INSTR_SIZE, ASYNC_BANK0_BASE, ASYNC_BANK_SIZE)) + return 0; + if (cpu == 0 && IN_MEM(addr, BREAK_INSTR_SIZE, L1_CODE_START, L1_CODE_LENGTH)) + return 0; +#ifdef CONFIG_SMP + else if (cpu == 1 && IN_MEM(addr, BREAK_INSTR_SIZE, COREB_L1_CODE_START, L1_CODE_LENGTH)) + return 0; +#endif + if (IN_MEM(addr, BREAK_INSTR_SIZE, L2_START, L2_LENGTH)) + return 0; + + return -EFAULT; +} + +void kgdb_arch_set_pc(struct pt_regs *regs, unsigned long ip) +{ + regs->retx = ip; +} + +int kgdb_arch_init(void) +{ + kgdb_single_step = 0; +#ifdef CONFIG_IPIPE + kgdb_arch_imask = 0; +#endif + + bfin_remove_all_hw_break(); + return 0; +} + +void kgdb_arch_exit(void) +{ +} diff --git a/arch/blackfin/kernel/kgdb_test.c b/arch/blackfin/kernel/kgdb_test.c new file mode 100644 index 00000000000..18ab004aea1 --- /dev/null +++ b/arch/blackfin/kernel/kgdb_test.c @@ -0,0 +1,114 @@ +/* + * arch/blackfin/kernel/kgdb_test.c - Blackfin kgdb tests + * + * Copyright 2005-2008 Analog Devices Inc. + * + * Licensed under the GPL-2 or later. + */ + +#include <linux/module.h> +#include <linux/kernel.h> +#include <linux/init.h> +#include <linux/proc_fs.h> + +#include <asm/current.h> +#include <asm/uaccess.h> + +#include <asm/blackfin.h> + +/* Symbols are here for kgdb test to poke directly */ +static char cmdline[256]; +static size_t len; + +#ifndef CONFIG_SMP +static int num1 __attribute__((l1_data)); + +void kgdb_l1_test(void) __attribute__((l1_text)); + +void kgdb_l1_test(void) +{ + pr_alert("L1(before change) : data variable addr = 0x%p, data value is %d\n", &num1, num1); + pr_alert("L1 : code function addr = 0x%p\n", kgdb_l1_test); + num1 = num1 + 10; + pr_alert("L1(after change) : data variable addr = 0x%p, data value is %d\n", &num1, num1); +} +#endif + +#if L2_LENGTH + +static int num2 __attribute__((l2)); +void kgdb_l2_test(void) __attribute__((l2)); + +void kgdb_l2_test(void) +{ + pr_alert("L2(before change) : data variable addr = 0x%p, data value is %d\n", &num2, num2); + pr_alert("L2 : code function addr = 0x%p\n", kgdb_l2_test); + num2 = num2 + 20; + pr_alert("L2(after change) : data variable addr = 0x%p, data value is %d\n", &num2, num2); +} + +#endif + +noinline int kgdb_test(char *name, int len, int count, int z) +{ + pr_alert("kgdb name(%d): %s, %d, %d\n", len, name, count, z); + count = z; + return count; +} + +static ssize_t +kgdb_test_proc_read(struct file *file, char __user *buf, + size_t count, loff_t *ppos) +{ + kgdb_test("hello world!", 12, 0x55, 0x10); +#ifndef CONFIG_SMP + kgdb_l1_test(); +#endif +#if L2_LENGTH + kgdb_l2_test(); +#endif + + return 0; +} + +static ssize_t +kgdb_test_proc_write(struct file *file, const char __user *buffer, + size_t count, loff_t *pos) +{ + len = min_t(size_t, 255, count); + memcpy(cmdline, buffer, count); + cmdline[len] = 0; + + return len; +} + +static const struct file_operations kgdb_test_proc_fops = { + .owner = THIS_MODULE, + .read = kgdb_test_proc_read, + .write = kgdb_test_proc_write, + .llseek = noop_llseek, +}; + +static int __init kgdbtest_init(void) +{ + struct proc_dir_entry *entry; + +#if L2_LENGTH + num2 = 0; +#endif + + entry = proc_create("kgdbtest", 0, NULL, &kgdb_test_proc_fops); + if (entry == NULL) + return -ENOMEM; + + return 0; +} + +static void __exit kgdbtest_exit(void) +{ + remove_proc_entry("kgdbtest", NULL); +} + +module_init(kgdbtest_init); +module_exit(kgdbtest_exit); +MODULE_LICENSE("GPL"); diff --git a/arch/blackfin/kernel/module.c b/arch/blackfin/kernel/module.c index 8b9fe29d03f..4489efc5288 100644 --- a/arch/blackfin/kernel/module.c +++ b/arch/blackfin/kernel/module.c @@ -1,32 +1,10 @@ /* - * File: arch/blackfin/kernel/module.c - * Based on: - * Author: + * Copyright 2004-2009 Analog Devices Inc. * - * Created: - * Description: - * - * Modified: - * Copyright 2004-2006 Analog Devices Inc. - * - * Bugs: Enter bugs at http://blackfin.uclinux.org/ - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, see the file COPYING, or write - * to the Free Software Foundation, Inc., - * 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA + * Licensed under the GPL-2 or later */ +#define pr_fmt(fmt) "module %s: " fmt, mod->name #include <linux/moduleloader.h> #include <linux/elf.h> @@ -36,215 +14,127 @@ #include <linux/kernel.h> #include <asm/dma.h> #include <asm/cacheflush.h> - -/* - * handle arithmetic relocations. - * See binutils/bfd/elf32-bfin.c for more details - */ -#define RELOC_STACK_SIZE 100 -static uint32_t reloc_stack[RELOC_STACK_SIZE]; -static unsigned int reloc_stack_tos; - -#define is_reloc_stack_empty() ((reloc_stack_tos > 0)?0:1) - -static void reloc_stack_push(uint32_t value) -{ - reloc_stack[reloc_stack_tos++] = value; -} - -static uint32_t reloc_stack_pop(void) -{ - return reloc_stack[--reloc_stack_tos]; -} - -static uint32_t reloc_stack_operate(unsigned int oper, struct module *mod) -{ - uint32_t value; - - switch (oper) { - case R_add: - value = reloc_stack[reloc_stack_tos - 2] + - reloc_stack[reloc_stack_tos - 1]; - reloc_stack_tos -= 2; - break; - case R_sub: - value = reloc_stack[reloc_stack_tos - 2] - - reloc_stack[reloc_stack_tos - 1]; - reloc_stack_tos -= 2; - break; - case R_mult: - value = reloc_stack[reloc_stack_tos - 2] * - reloc_stack[reloc_stack_tos - 1]; - reloc_stack_tos -= 2; - break; - case R_div: - value = reloc_stack[reloc_stack_tos - 2] / - reloc_stack[reloc_stack_tos - 1]; - reloc_stack_tos -= 2; - break; - case R_mod: - value = reloc_stack[reloc_stack_tos - 2] % - reloc_stack[reloc_stack_tos - 1]; - reloc_stack_tos -= 2; - break; - case R_lshift: - value = reloc_stack[reloc_stack_tos - 2] << - reloc_stack[reloc_stack_tos - 1]; - reloc_stack_tos -= 2; - break; - case R_rshift: - value = reloc_stack[reloc_stack_tos - 2] >> - reloc_stack[reloc_stack_tos - 1]; - reloc_stack_tos -= 2; - break; - case R_and: - value = reloc_stack[reloc_stack_tos - 2] & - reloc_stack[reloc_stack_tos - 1]; - reloc_stack_tos -= 2; - break; - case R_or: - value = reloc_stack[reloc_stack_tos - 2] | - reloc_stack[reloc_stack_tos - 1]; - reloc_stack_tos -= 2; - break; - case R_xor: - value = reloc_stack[reloc_stack_tos - 2] ^ - reloc_stack[reloc_stack_tos - 1]; - reloc_stack_tos -= 2; - break; - case R_land: - value = reloc_stack[reloc_stack_tos - 2] && - reloc_stack[reloc_stack_tos - 1]; - reloc_stack_tos -= 2; - break; - case R_lor: - value = reloc_stack[reloc_stack_tos - 2] || - reloc_stack[reloc_stack_tos - 1]; - reloc_stack_tos -= 2; - break; - case R_neg: - value = -reloc_stack[reloc_stack_tos - 1]; - reloc_stack_tos--; - break; - case R_comp: - value = ~reloc_stack[reloc_stack_tos - 1]; - reloc_stack_tos -= 1; - break; - default: - printk(KERN_WARNING "module %s: unhandled reloction\n", - mod->name); - return 0; - } - - /* now push the new value back on stack */ - reloc_stack_push(value); - - return value; -} - -void *module_alloc(unsigned long size) -{ - if (size == 0) - return NULL; - return vmalloc(size); -} - -/* Free memory returned from module_alloc */ -void module_free(struct module *mod, void *module_region) -{ - vfree(module_region); -} +#include <asm/uaccess.h> /* Transfer the section to the L1 memory */ int -module_frob_arch_sections(Elf_Ehdr * hdr, Elf_Shdr * sechdrs, +module_frob_arch_sections(Elf_Ehdr *hdr, Elf_Shdr *sechdrs, char *secstrings, struct module *mod) { + /* + * XXX: sechdrs are vmalloced in kernel/module.c + * and would be vfreed just after module is loaded, + * so we hack to keep the only information we needed + * in mod->arch to correctly free L1 I/D sram later. + * NOTE: this breaks the semantic of mod->arch structure. + */ Elf_Shdr *s, *sechdrs_end = sechdrs + hdr->e_shnum; - void *dest = NULL; + void *dest; for (s = sechdrs; s < sechdrs_end; ++s) { - if ((strcmp(".l1.text", secstrings + s->sh_name) == 0) || - ((strcmp(".text", secstrings + s->sh_name) == 0) && - (hdr->e_flags & FLG_CODE_IN_L1) && (s->sh_size > 0))) { - mod->arch.text_l1 = s; + const char *shname = secstrings + s->sh_name; + + if (s->sh_size == 0) + continue; + + if (!strcmp(".l1.text", shname) || + (!strcmp(".text", shname) && + (hdr->e_flags & EF_BFIN_CODE_IN_L1))) { + dest = l1_inst_sram_alloc(s->sh_size); + mod->arch.text_l1 = dest; if (dest == NULL) { - printk(KERN_ERR - "module %s: L1 instruction memory allocation failed\n", - mod->name); + pr_err("L1 inst memory allocation failed\n"); return -1; } dma_memcpy(dest, (void *)s->sh_addr, s->sh_size); - s->sh_flags &= ~SHF_ALLOC; - s->sh_addr = (unsigned long)dest; - } - if ((strcmp(".l1.data", secstrings + s->sh_name) == 0) || - ((strcmp(".data", secstrings + s->sh_name) == 0) && - (hdr->e_flags & FLG_DATA_IN_L1) && (s->sh_size > 0))) { - mod->arch.data_a_l1 = s; + + } else if (!strcmp(".l1.data", shname) || + (!strcmp(".data", shname) && + (hdr->e_flags & EF_BFIN_DATA_IN_L1))) { + dest = l1_data_sram_alloc(s->sh_size); + mod->arch.data_a_l1 = dest; if (dest == NULL) { - printk(KERN_ERR - "module %s: L1 data memory allocation failed\n", - mod->name); + pr_err("L1 data memory allocation failed\n"); return -1; } memcpy(dest, (void *)s->sh_addr, s->sh_size); - s->sh_flags &= ~SHF_ALLOC; - s->sh_addr = (unsigned long)dest; - } - if (strcmp(".l1.bss", secstrings + s->sh_name) == 0 || - ((strcmp(".bss", secstrings + s->sh_name) == 0) && - (hdr->e_flags & FLG_DATA_IN_L1) && (s->sh_size > 0))) { - mod->arch.bss_a_l1 = s; - dest = l1_data_sram_alloc(s->sh_size); + + } else if (!strcmp(".l1.bss", shname) || + (!strcmp(".bss", shname) && + (hdr->e_flags & EF_BFIN_DATA_IN_L1))) { + + dest = l1_data_sram_zalloc(s->sh_size); + mod->arch.bss_a_l1 = dest; if (dest == NULL) { - printk(KERN_ERR - "module %s: L1 data memory allocation failed\n", - mod->name); + pr_err("L1 data memory allocation failed\n"); return -1; } - memset(dest, 0, s->sh_size); - s->sh_flags &= ~SHF_ALLOC; - s->sh_addr = (unsigned long)dest; - } - if (strcmp(".l1.data.B", secstrings + s->sh_name) == 0) { - mod->arch.data_b_l1 = s; + + } else if (!strcmp(".l1.data.B", shname)) { + dest = l1_data_B_sram_alloc(s->sh_size); + mod->arch.data_b_l1 = dest; if (dest == NULL) { - printk(KERN_ERR - "module %s: L1 data memory allocation failed\n", - mod->name); + pr_err("L1 data memory allocation failed\n"); return -1; } memcpy(dest, (void *)s->sh_addr, s->sh_size); - s->sh_flags &= ~SHF_ALLOC; - s->sh_addr = (unsigned long)dest; - } - if (strcmp(".l1.bss.B", secstrings + s->sh_name) == 0) { - mod->arch.bss_b_l1 = s; + + } else if (!strcmp(".l1.bss.B", shname)) { + dest = l1_data_B_sram_alloc(s->sh_size); + mod->arch.bss_b_l1 = dest; if (dest == NULL) { - printk(KERN_ERR - "module %s: L1 data memory allocation failed\n", - mod->name); + pr_err("L1 data memory allocation failed\n"); return -1; } memset(dest, 0, s->sh_size); - s->sh_flags &= ~SHF_ALLOC; - s->sh_addr = (unsigned long)dest; - } + + } else if (!strcmp(".l2.text", shname) || + (!strcmp(".text", shname) && + (hdr->e_flags & EF_BFIN_CODE_IN_L2))) { + + dest = l2_sram_alloc(s->sh_size); + mod->arch.text_l2 = dest; + if (dest == NULL) { + pr_err("L2 SRAM allocation failed\n"); + return -1; + } + memcpy(dest, (void *)s->sh_addr, s->sh_size); + + } else if (!strcmp(".l2.data", shname) || + (!strcmp(".data", shname) && + (hdr->e_flags & EF_BFIN_DATA_IN_L2))) { + + dest = l2_sram_alloc(s->sh_size); + mod->arch.data_l2 = dest; + if (dest == NULL) { + pr_err("L2 SRAM allocation failed\n"); + return -1; + } + memcpy(dest, (void *)s->sh_addr, s->sh_size); + + } else if (!strcmp(".l2.bss", shname) || + (!strcmp(".bss", shname) && + (hdr->e_flags & EF_BFIN_DATA_IN_L2))) { + + dest = l2_sram_zalloc(s->sh_size); + mod->arch.bss_l2 = dest; + if (dest == NULL) { + pr_err("L2 SRAM allocation failed\n"); + return -1; + } + + } else + continue; + + s->sh_flags &= ~SHF_ALLOC; + s->sh_addr = (unsigned long)dest; } - return 0; -} -int -apply_relocate(Elf_Shdr * sechdrs, const char *strtab, - unsigned int symindex, unsigned int relsec, struct module *me) -{ - printk(KERN_ERR "module %s: .rel unsupported\n", me->name); - return -ENOEXEC; + return 0; } /*************************************************************************/ @@ -254,127 +144,89 @@ apply_relocate(Elf_Shdr * sechdrs, const char *strtab, /* Arithmetic relocations are handled. */ /* We do not expect LSETUP to be split and hence is not */ /* handled. */ -/* R_byte and R_byte2 are also not handled as the gas */ -/* does not generate it. */ +/* R_BFIN_BYTE and R_BFIN_BYTE2 are also not handled as the */ +/* gas does not generate it. */ /*************************************************************************/ int -apply_relocate_add(Elf_Shdr * sechdrs, const char *strtab, +apply_relocate_add(Elf_Shdr *sechdrs, const char *strtab, unsigned int symindex, unsigned int relsec, struct module *mod) { unsigned int i; - unsigned short tmp; Elf32_Rela *rel = (void *)sechdrs[relsec].sh_addr; Elf32_Sym *sym; - uint32_t *location32; - uint16_t *location16; - uint32_t value; + unsigned long location, value, size; + + pr_debug("applying relocate section %u to %u\n", + relsec, sechdrs[relsec].sh_info); - pr_debug("Applying relocate section %u to %u\n", relsec, - sechdrs[relsec].sh_info); for (i = 0; i < sechdrs[relsec].sh_size / sizeof(*rel); i++) { /* This is where to make the change */ - location16 = - (uint16_t *) (sechdrs[sechdrs[relsec].sh_info].sh_addr + - rel[i].r_offset); - location32 = (uint32_t *) location16; + location = sechdrs[sechdrs[relsec].sh_info].sh_addr + + rel[i].r_offset; + /* This is the symbol it is referring to. Note that all undefined symbols have been resolved. */ sym = (Elf32_Sym *) sechdrs[symindex].sh_addr + ELF32_R_SYM(rel[i].r_info); - if (is_reloc_stack_empty()) { - value = sym->st_value; - } else { - value = reloc_stack_pop(); - } + value = sym->st_value; value += rel[i].r_addend; - pr_debug("location is %x, value is %x type is %d \n", - (unsigned int) location32, value, - ELF32_R_TYPE(rel[i].r_info)); + +#ifdef CONFIG_SMP + if (location >= COREB_L1_DATA_A_START) { + pr_err("cannot relocate in L1: %u (SMP kernel)\n", + ELF32_R_TYPE(rel[i].r_info)); + return -ENOEXEC; + } +#endif + + pr_debug("location is %lx, value is %lx type is %d\n", + location, value, ELF32_R_TYPE(rel[i].r_info)); switch (ELF32_R_TYPE(rel[i].r_info)) { - case R_pcrel24: - case R_pcrel24_jump_l: - /* Add the value, subtract its postition */ - location16 = - (uint16_t *) (sechdrs[sechdrs[relsec].sh_info]. - sh_addr + rel[i].r_offset - 2); - location32 = (uint32_t *) location16; - value -= (uint32_t) location32; - value >>= 1; - pr_debug("value is %x, before %x-%x after %x-%x\n", value, - *location16, *(location16 + 1), - (*location16 & 0xff00) | (value >> 16 & 0x00ff), - value & 0xffff); - *location16 = - (*location16 & 0xff00) | (value >> 16 & 0x00ff); - *(location16 + 1) = value & 0xffff; + case R_BFIN_HUIMM16: + value >>= 16; + case R_BFIN_LUIMM16: + case R_BFIN_RIMM16: + size = 2; break; - case R_pcrel12_jump: - case R_pcrel12_jump_s: - value -= (uint32_t) location32; - value >>= 1; - *location16 = (value & 0xfff); + case R_BFIN_BYTE4_DATA: + size = 4; break; - case R_pcrel10: - value -= (uint32_t) location32; - value >>= 1; - *location16 = (value & 0x3ff); - break; - case R_luimm16: - pr_debug("before %x after %x\n", *location16, - (value & 0xffff)); - tmp = (value & 0xffff); - if ((unsigned long)location16 >= L1_CODE_START) { - dma_memcpy(location16, &tmp, 2); - } else - *location16 = tmp; - break; - case R_huimm16: - pr_debug("before %x after %x\n", *location16, - ((value >> 16) & 0xffff)); - tmp = ((value >> 16) & 0xffff); - if ((unsigned long)location16 >= L1_CODE_START) { - dma_memcpy(location16, &tmp, 2); - } else - *location16 = tmp; - break; - case R_rimm16: - *location16 = (value & 0xffff); - break; - case R_byte4_data: - pr_debug("before %x after %x\n", *location32, value); - *location32 = value; - break; - case R_push: - reloc_stack_push(value); + + case R_BFIN_PCREL24: + case R_BFIN_PCREL24_JUMP_L: + case R_BFIN_PCREL12_JUMP: + case R_BFIN_PCREL12_JUMP_S: + case R_BFIN_PCREL10: + pr_err("unsupported relocation: %u (no -mlong-calls?)\n", + ELF32_R_TYPE(rel[i].r_info)); + return -ENOEXEC; + + default: + pr_err("unknown relocation: %u\n", + ELF32_R_TYPE(rel[i].r_info)); + return -ENOEXEC; + } + + switch (bfin_mem_access_type(location, size)) { + case BFIN_MEM_ACCESS_CORE: + case BFIN_MEM_ACCESS_CORE_ONLY: + memcpy((void *)location, &value, size); break; - case R_const: - reloc_stack_push(rel[i].r_addend); + case BFIN_MEM_ACCESS_DMA: + dma_memcpy((void *)location, &value, size); break; - case R_add: - case R_sub: - case R_mult: - case R_div: - case R_mod: - case R_lshift: - case R_rshift: - case R_and: - case R_or: - case R_xor: - case R_land: - case R_lor: - case R_neg: - case R_comp: - reloc_stack_operate(ELF32_R_TYPE(rel[i].r_info), mod); + case BFIN_MEM_ACCESS_ITEST: + isram_memcpy((void *)location, &value, size); break; default: - printk(KERN_ERR "module %s: Unknown relocation: %u\n", - mod->name, ELF32_R_TYPE(rel[i].r_info)); + pr_err("invalid relocation for %#lx\n", location); return -ENOEXEC; } } + return 0; } @@ -384,6 +236,7 @@ module_finalize(const Elf_Ehdr * hdr, { unsigned int i, strindex = 0, symindex = 0; char *secstrings; + long err = 0; secstrings = (void *)hdr + sechdrs[hdr->e_shstrndx].sh_offset; @@ -398,32 +251,39 @@ module_finalize(const Elf_Ehdr * hdr, for (i = 1; i < hdr->e_shnum; i++) { const char *strtab = (char *)sechdrs[strindex].sh_addr; unsigned int info = sechdrs[i].sh_info; + const char *shname = secstrings + sechdrs[i].sh_name; /* Not a valid relocation section? */ if (info >= hdr->e_shnum) continue; - if ((sechdrs[i].sh_type == SHT_RELA) && - ((strcmp(".rela.l1.text", secstrings + sechdrs[i].sh_name) == 0) || - ((strcmp(".rela.text", secstrings + sechdrs[i].sh_name) == 0) && - (hdr->e_flags & FLG_CODE_IN_L1)))) { - apply_relocate_add((Elf_Shdr *) sechdrs, strtab, + /* Only support RELA relocation types */ + if (sechdrs[i].sh_type != SHT_RELA) + continue; + + if (!strcmp(".rela.l2.text", shname) || + !strcmp(".rela.l1.text", shname) || + (!strcmp(".rela.text", shname) && + (hdr->e_flags & (EF_BFIN_CODE_IN_L1 | EF_BFIN_CODE_IN_L2)))) { + + err = apply_relocate_add((Elf_Shdr *) sechdrs, strtab, symindex, i, mod); + if (err < 0) + return -ENOEXEC; } } + return 0; } void module_arch_cleanup(struct module *mod) { - if ((mod->arch.text_l1) && (mod->arch.text_l1->sh_addr)) - l1_inst_sram_free((void *)mod->arch.text_l1->sh_addr); - if ((mod->arch.data_a_l1) && (mod->arch.data_a_l1->sh_addr)) - l1_data_sram_free((void *)mod->arch.data_a_l1->sh_addr); - if ((mod->arch.bss_a_l1) && (mod->arch.bss_a_l1->sh_addr)) - l1_data_sram_free((void *)mod->arch.bss_a_l1->sh_addr); - if ((mod->arch.data_b_l1) && (mod->arch.data_b_l1->sh_addr)) - l1_data_B_sram_free((void *)mod->arch.data_b_l1->sh_addr); - if ((mod->arch.bss_b_l1) && (mod->arch.bss_b_l1->sh_addr)) - l1_data_B_sram_free((void *)mod->arch.bss_b_l1->sh_addr); + l1_inst_sram_free(mod->arch.text_l1); + l1_data_A_sram_free(mod->arch.data_a_l1); + l1_data_A_sram_free(mod->arch.bss_a_l1); + l1_data_B_sram_free(mod->arch.data_b_l1); + l1_data_B_sram_free(mod->arch.bss_b_l1); + l2_sram_free(mod->arch.text_l2); + l2_sram_free(mod->arch.data_l2); + l2_sram_free(mod->arch.bss_l2); } diff --git a/arch/blackfin/kernel/nmi.c b/arch/blackfin/kernel/nmi.c new file mode 100644 index 00000000000..9919d29287d --- /dev/null +++ b/arch/blackfin/kernel/nmi.c @@ -0,0 +1,287 @@ +/* + * Blackfin nmi_watchdog Driver + * + * Originally based on bfin_wdt.c + * Copyright 2010-2010 Analog Devices Inc. + * Graff Yang <graf.yang@analog.com> + * + * Enter bugs at http://blackfin.uclinux.org/ + * + * Licensed under the GPL-2 or later. + */ + +#include <linux/bitops.h> +#include <linux/hardirq.h> +#include <linux/syscore_ops.h> +#include <linux/pm.h> +#include <linux/nmi.h> +#include <linux/smp.h> +#include <linux/timer.h> +#include <asm/blackfin.h> +#include <linux/atomic.h> +#include <asm/cacheflush.h> +#include <asm/bfin_watchdog.h> + +#define DRV_NAME "nmi-wdt" + +#define NMI_WDT_TIMEOUT 5 /* 5 seconds */ +#define NMI_CHECK_TIMEOUT (4 * HZ) /* 4 seconds in jiffies */ +static int nmi_wdt_cpu = 1; + +static unsigned int timeout = NMI_WDT_TIMEOUT; +static int nmi_active; + +static unsigned short wdoga_ctl; +static unsigned int wdoga_cnt; +static struct corelock_slot saved_corelock; +static atomic_t nmi_touched[NR_CPUS]; +static struct timer_list ntimer; + +enum { + COREA_ENTER_NMI = 0, + COREA_EXIT_NMI, + COREB_EXIT_NMI, + + NMI_EVENT_NR, +}; +static unsigned long nmi_event __attribute__ ((__section__(".l2.bss"))); + +/* we are in nmi, non-atomic bit ops is safe */ +static inline void set_nmi_event(int event) +{ + __set_bit(event, &nmi_event); +} + +static inline void wait_nmi_event(int event) +{ + while (!test_bit(event, &nmi_event)) + barrier(); + __clear_bit(event, &nmi_event); +} + +static inline void send_corea_nmi(void) +{ + wdoga_ctl = bfin_read_WDOGA_CTL(); + wdoga_cnt = bfin_read_WDOGA_CNT(); + + bfin_write_WDOGA_CTL(WDEN_DISABLE); + bfin_write_WDOGA_CNT(0); + bfin_write_WDOGA_CTL(WDEN_ENABLE | ICTL_NMI); +} + +static inline void restore_corea_nmi(void) +{ + bfin_write_WDOGA_CTL(WDEN_DISABLE); + bfin_write_WDOGA_CTL(WDOG_EXPIRED | WDEN_DISABLE | ICTL_NONE); + + bfin_write_WDOGA_CNT(wdoga_cnt); + bfin_write_WDOGA_CTL(wdoga_ctl); +} + +static inline void save_corelock(void) +{ + saved_corelock = corelock; + corelock.lock = 0; +} + +static inline void restore_corelock(void) +{ + corelock = saved_corelock; +} + + +static inline void nmi_wdt_keepalive(void) +{ + bfin_write_WDOGB_STAT(0); +} + +static inline void nmi_wdt_stop(void) +{ + bfin_write_WDOGB_CTL(WDEN_DISABLE); +} + +/* before calling this function, you must stop the WDT */ +static inline void nmi_wdt_clear(void) +{ + /* clear TRO bit, disable event generation */ + bfin_write_WDOGB_CTL(WDOG_EXPIRED | WDEN_DISABLE | ICTL_NONE); +} + +static inline void nmi_wdt_start(void) +{ + bfin_write_WDOGB_CTL(WDEN_ENABLE | ICTL_NMI); +} + +static inline int nmi_wdt_running(void) +{ + return ((bfin_read_WDOGB_CTL() & WDEN_MASK) != WDEN_DISABLE); +} + +static inline int nmi_wdt_set_timeout(unsigned long t) +{ + u32 cnt, max_t, sclk; + int run; + + sclk = get_sclk(); + max_t = -1 / sclk; + cnt = t * sclk; + if (t > max_t) { + pr_warning("NMI: timeout value is too large\n"); + return -EINVAL; + } + + run = nmi_wdt_running(); + nmi_wdt_stop(); + bfin_write_WDOGB_CNT(cnt); + if (run) + nmi_wdt_start(); + + timeout = t; + + return 0; +} + +int check_nmi_wdt_touched(void) +{ + unsigned int this_cpu = smp_processor_id(); + unsigned int cpu; + cpumask_t mask; + + cpumask_copy(&mask, cpu_online_mask); + if (!atomic_read(&nmi_touched[this_cpu])) + return 0; + + atomic_set(&nmi_touched[this_cpu], 0); + + cpumask_clear_cpu(this_cpu, &mask); + for_each_cpu(cpu, &mask) { + invalidate_dcache_range((unsigned long)(&nmi_touched[cpu]), + (unsigned long)(&nmi_touched[cpu])); + if (!atomic_read(&nmi_touched[cpu])) + return 0; + atomic_set(&nmi_touched[cpu], 0); + } + + return 1; +} + +static void nmi_wdt_timer(unsigned long data) +{ + if (check_nmi_wdt_touched()) + nmi_wdt_keepalive(); + + mod_timer(&ntimer, jiffies + NMI_CHECK_TIMEOUT); +} + +static int __init init_nmi_wdt(void) +{ + nmi_wdt_set_timeout(timeout); + nmi_wdt_start(); + nmi_active = true; + + init_timer(&ntimer); + ntimer.function = nmi_wdt_timer; + ntimer.expires = jiffies + NMI_CHECK_TIMEOUT; + add_timer(&ntimer); + + pr_info("nmi_wdt: initialized: timeout=%d sec\n", timeout); + return 0; +} +device_initcall(init_nmi_wdt); + +void touch_nmi_watchdog(void) +{ + atomic_set(&nmi_touched[smp_processor_id()], 1); +} + +/* Suspend/resume support */ +#ifdef CONFIG_PM +static int nmi_wdt_suspend(void) +{ + nmi_wdt_stop(); + return 0; +} + +static void nmi_wdt_resume(void) +{ + if (nmi_active) + nmi_wdt_start(); +} + +static struct syscore_ops nmi_syscore_ops = { + .resume = nmi_wdt_resume, + .suspend = nmi_wdt_suspend, +}; + +static int __init init_nmi_wdt_syscore(void) +{ + if (nmi_active) + register_syscore_ops(&nmi_syscore_ops); + + return 0; +} +late_initcall(init_nmi_wdt_syscore); + +#endif /* CONFIG_PM */ + + +asmlinkage notrace void do_nmi(struct pt_regs *fp) +{ + unsigned int cpu = smp_processor_id(); + nmi_enter(); + + cpu_pda[cpu].__nmi_count += 1; + + if (cpu == nmi_wdt_cpu) { + /* CoreB goes here first */ + + /* reload the WDOG_STAT */ + nmi_wdt_keepalive(); + + /* clear nmi interrupt for CoreB */ + nmi_wdt_stop(); + nmi_wdt_clear(); + + /* trigger NMI interrupt of CoreA */ + send_corea_nmi(); + + /* waiting CoreB to enter NMI */ + wait_nmi_event(COREA_ENTER_NMI); + + /* recover WDOGA's settings */ + restore_corea_nmi(); + + save_corelock(); + + /* corelock is save/cleared, CoreA is dummping messages */ + + wait_nmi_event(COREA_EXIT_NMI); + } else { + /* OK, CoreA entered NMI */ + set_nmi_event(COREA_ENTER_NMI); + } + + pr_emerg("\nNMI Watchdog detected LOCKUP, dump for CPU %d\n", cpu); + dump_bfin_process(fp); + dump_bfin_mem(fp); + show_regs(fp); + dump_bfin_trace_buffer(); + show_stack(current, (unsigned long *)fp); + + if (cpu == nmi_wdt_cpu) { + pr_emerg("This fault is not recoverable, sorry!\n"); + + /* CoreA dump finished, restore the corelock */ + restore_corelock(); + + set_nmi_event(COREB_EXIT_NMI); + } else { + /* CoreB dump finished, notice the CoreA we are done */ + set_nmi_event(COREA_EXIT_NMI); + + /* synchronize with CoreA */ + wait_nmi_event(COREB_EXIT_NMI); + } + + nmi_exit(); +} diff --git a/arch/blackfin/kernel/perf_event.c b/arch/blackfin/kernel/perf_event.c new file mode 100644 index 00000000000..974e55496db --- /dev/null +++ b/arch/blackfin/kernel/perf_event.c @@ -0,0 +1,499 @@ +/* + * Blackfin performance counters + * + * Copyright 2011 Analog Devices Inc. + * + * Ripped from SuperH version: + * + * Copyright (C) 2009 Paul Mundt + * + * Heavily based on the x86 and PowerPC implementations. + * + * x86: + * Copyright (C) 2008 Thomas Gleixner <tglx@linutronix.de> + * Copyright (C) 2008-2009 Red Hat, Inc., Ingo Molnar + * Copyright (C) 2009 Jaswinder Singh Rajput + * Copyright (C) 2009 Advanced Micro Devices, Inc., Robert Richter + * Copyright (C) 2008-2009 Red Hat, Inc., Peter Zijlstra <pzijlstr@redhat.com> + * Copyright (C) 2009 Intel Corporation, <markus.t.metzger@intel.com> + * + * ppc: + * Copyright 2008-2009 Paul Mackerras, IBM Corporation. + * + * Licensed under the GPL-2 or later. + */ + +#include <linux/kernel.h> +#include <linux/export.h> +#include <linux/init.h> +#include <linux/perf_event.h> +#include <asm/bfin_pfmon.h> + +/* + * We have two counters, and each counter can support an event type. + * The 'o' is PFCNTx=1 and 's' is PFCNTx=0 + * + * 0x04 o pc invariant branches + * 0x06 o mispredicted branches + * 0x09 o predicted branches taken + * 0x0B o EXCPT insn + * 0x0C o CSYNC/SSYNC insn + * 0x0D o Insns committed + * 0x0E o Interrupts taken + * 0x0F o Misaligned address exceptions + * 0x80 o Code memory fetches stalled due to DMA + * 0x83 o 64bit insn fetches delivered + * 0x9A o data cache fills (bank a) + * 0x9B o data cache fills (bank b) + * 0x9C o data cache lines evicted (bank a) + * 0x9D o data cache lines evicted (bank b) + * 0x9E o data cache high priority fills + * 0x9F o data cache low priority fills + * 0x00 s loop 0 iterations + * 0x01 s loop 1 iterations + * 0x0A s CSYNC/SSYNC stalls + * 0x10 s DAG read/after write hazards + * 0x13 s RAW data hazards + * 0x81 s code TAG stalls + * 0x82 s code fill stalls + * 0x90 s processor to memory stalls + * 0x91 s data memory stalls not hidden by 0x90 + * 0x92 s data store buffer full stalls + * 0x93 s data memory write buffer full stalls due to high->low priority + * 0x95 s data memory fill buffer stalls + * 0x96 s data TAG collision stalls + * 0x97 s data collision stalls + * 0x98 s data stalls + * 0x99 s data stalls sent to processor + */ + +static const int event_map[] = { + /* use CYCLES cpu register */ + [PERF_COUNT_HW_CPU_CYCLES] = -1, + [PERF_COUNT_HW_INSTRUCTIONS] = 0x0D, + [PERF_COUNT_HW_CACHE_REFERENCES] = -1, + [PERF_COUNT_HW_CACHE_MISSES] = 0x83, + [PERF_COUNT_HW_BRANCH_INSTRUCTIONS] = 0x09, + [PERF_COUNT_HW_BRANCH_MISSES] = 0x06, + [PERF_COUNT_HW_BUS_CYCLES] = -1, +}; + +#define C(x) PERF_COUNT_HW_CACHE_##x + +static const int cache_events[PERF_COUNT_HW_CACHE_MAX] + [PERF_COUNT_HW_CACHE_OP_MAX] + [PERF_COUNT_HW_CACHE_RESULT_MAX] = +{ + [C(L1D)] = { /* Data bank A */ + [C(OP_READ)] = { + [C(RESULT_ACCESS)] = 0, + [C(RESULT_MISS) ] = 0x9A, + }, + [C(OP_WRITE)] = { + [C(RESULT_ACCESS)] = 0, + [C(RESULT_MISS) ] = 0, + }, + [C(OP_PREFETCH)] = { + [C(RESULT_ACCESS)] = 0, + [C(RESULT_MISS) ] = 0, + }, + }, + + [C(L1I)] = { + [C(OP_READ)] = { + [C(RESULT_ACCESS)] = 0, + [C(RESULT_MISS) ] = 0x83, + }, + [C(OP_WRITE)] = { + [C(RESULT_ACCESS)] = -1, + [C(RESULT_MISS) ] = -1, + }, + [C(OP_PREFETCH)] = { + [C(RESULT_ACCESS)] = 0, + [C(RESULT_MISS) ] = 0, + }, + }, + + [C(LL)] = { + [C(OP_READ)] = { + [C(RESULT_ACCESS)] = -1, + [C(RESULT_MISS) ] = -1, + }, + [C(OP_WRITE)] = { + [C(RESULT_ACCESS)] = -1, + [C(RESULT_MISS) ] = -1, + }, + [C(OP_PREFETCH)] = { + [C(RESULT_ACCESS)] = -1, + [C(RESULT_MISS) ] = -1, + }, + }, + + [C(DTLB)] = { + [C(OP_READ)] = { + [C(RESULT_ACCESS)] = -1, + [C(RESULT_MISS) ] = -1, + }, + [C(OP_WRITE)] = { + [C(RESULT_ACCESS)] = -1, + [C(RESULT_MISS) ] = -1, + }, + [C(OP_PREFETCH)] = { + [C(RESULT_ACCESS)] = -1, + [C(RESULT_MISS) ] = -1, + }, + }, + + [C(ITLB)] = { + [C(OP_READ)] = { + [C(RESULT_ACCESS)] = -1, + [C(RESULT_MISS) ] = -1, + }, + [C(OP_WRITE)] = { + [C(RESULT_ACCESS)] = -1, + [C(RESULT_MISS) ] = -1, + }, + [C(OP_PREFETCH)] = { + [C(RESULT_ACCESS)] = -1, + [C(RESULT_MISS) ] = -1, + }, + }, + + [C(BPU)] = { + [C(OP_READ)] = { + [C(RESULT_ACCESS)] = -1, + [C(RESULT_MISS) ] = -1, + }, + [C(OP_WRITE)] = { + [C(RESULT_ACCESS)] = -1, + [C(RESULT_MISS) ] = -1, + }, + [C(OP_PREFETCH)] = { + [C(RESULT_ACCESS)] = -1, + [C(RESULT_MISS) ] = -1, + }, + }, +}; + +const char *perf_pmu_name(void) +{ + return "bfin"; +} +EXPORT_SYMBOL(perf_pmu_name); + +int perf_num_counters(void) +{ + return ARRAY_SIZE(event_map); +} +EXPORT_SYMBOL(perf_num_counters); + +static u64 bfin_pfmon_read(int idx) +{ + return bfin_read32(PFCNTR0 + (idx * 4)); +} + +static void bfin_pfmon_disable(struct hw_perf_event *hwc, int idx) +{ + bfin_write_PFCTL(bfin_read_PFCTL() & ~PFCEN(idx, PFCEN_MASK)); +} + +static void bfin_pfmon_enable(struct hw_perf_event *hwc, int idx) +{ + u32 val, mask; + + val = PFPWR; + if (idx) { + mask = ~(PFCNT1 | PFMON1 | PFCEN1 | PEMUSW1); + /* The packed config is for event0, so shift it to event1 slots */ + val |= (hwc->config << (PFMON1_P - PFMON0_P)); + val |= (hwc->config & PFCNT0) << (PFCNT1_P - PFCNT0_P); + bfin_write_PFCNTR1(0); + } else { + mask = ~(PFCNT0 | PFMON0 | PFCEN0 | PEMUSW0); + val |= hwc->config; + bfin_write_PFCNTR0(0); + } + + bfin_write_PFCTL((bfin_read_PFCTL() & mask) | val); +} + +static void bfin_pfmon_disable_all(void) +{ + bfin_write_PFCTL(bfin_read_PFCTL() & ~PFPWR); +} + +static void bfin_pfmon_enable_all(void) +{ + bfin_write_PFCTL(bfin_read_PFCTL() | PFPWR); +} + +struct cpu_hw_events { + struct perf_event *events[MAX_HWEVENTS]; + unsigned long used_mask[BITS_TO_LONGS(MAX_HWEVENTS)]; +}; +DEFINE_PER_CPU(struct cpu_hw_events, cpu_hw_events); + +static int hw_perf_cache_event(int config, int *evp) +{ + unsigned long type, op, result; + int ev; + + /* unpack config */ + type = config & 0xff; + op = (config >> 8) & 0xff; + result = (config >> 16) & 0xff; + + if (type >= PERF_COUNT_HW_CACHE_MAX || + op >= PERF_COUNT_HW_CACHE_OP_MAX || + result >= PERF_COUNT_HW_CACHE_RESULT_MAX) + return -EINVAL; + + ev = cache_events[type][op][result]; + if (ev == 0) + return -EOPNOTSUPP; + if (ev == -1) + return -EINVAL; + *evp = ev; + return 0; +} + +static void bfin_perf_event_update(struct perf_event *event, + struct hw_perf_event *hwc, int idx) +{ + u64 prev_raw_count, new_raw_count; + s64 delta; + int shift = 0; + + /* + * Depending on the counter configuration, they may or may not + * be chained, in which case the previous counter value can be + * updated underneath us if the lower-half overflows. + * + * Our tactic to handle this is to first atomically read and + * exchange a new raw count - then add that new-prev delta + * count to the generic counter atomically. + * + * As there is no interrupt associated with the overflow events, + * this is the simplest approach for maintaining consistency. + */ +again: + prev_raw_count = local64_read(&hwc->prev_count); + new_raw_count = bfin_pfmon_read(idx); + + if (local64_cmpxchg(&hwc->prev_count, prev_raw_count, + new_raw_count) != prev_raw_count) + goto again; + + /* + * Now we have the new raw value and have updated the prev + * timestamp already. We can now calculate the elapsed delta + * (counter-)time and add that to the generic counter. + * + * Careful, not all hw sign-extends above the physical width + * of the count. + */ + delta = (new_raw_count << shift) - (prev_raw_count << shift); + delta >>= shift; + + local64_add(delta, &event->count); +} + +static void bfin_pmu_stop(struct perf_event *event, int flags) +{ + struct cpu_hw_events *cpuc = &__get_cpu_var(cpu_hw_events); + struct hw_perf_event *hwc = &event->hw; + int idx = hwc->idx; + + if (!(event->hw.state & PERF_HES_STOPPED)) { + bfin_pfmon_disable(hwc, idx); + cpuc->events[idx] = NULL; + event->hw.state |= PERF_HES_STOPPED; + } + + if ((flags & PERF_EF_UPDATE) && !(event->hw.state & PERF_HES_UPTODATE)) { + bfin_perf_event_update(event, &event->hw, idx); + event->hw.state |= PERF_HES_UPTODATE; + } +} + +static void bfin_pmu_start(struct perf_event *event, int flags) +{ + struct cpu_hw_events *cpuc = &__get_cpu_var(cpu_hw_events); + struct hw_perf_event *hwc = &event->hw; + int idx = hwc->idx; + + if (WARN_ON_ONCE(idx == -1)) + return; + + if (flags & PERF_EF_RELOAD) + WARN_ON_ONCE(!(event->hw.state & PERF_HES_UPTODATE)); + + cpuc->events[idx] = event; + event->hw.state = 0; + bfin_pfmon_enable(hwc, idx); +} + +static void bfin_pmu_del(struct perf_event *event, int flags) +{ + struct cpu_hw_events *cpuc = &__get_cpu_var(cpu_hw_events); + + bfin_pmu_stop(event, PERF_EF_UPDATE); + __clear_bit(event->hw.idx, cpuc->used_mask); + + perf_event_update_userpage(event); +} + +static int bfin_pmu_add(struct perf_event *event, int flags) +{ + struct cpu_hw_events *cpuc = &__get_cpu_var(cpu_hw_events); + struct hw_perf_event *hwc = &event->hw; + int idx = hwc->idx; + int ret = -EAGAIN; + + perf_pmu_disable(event->pmu); + + if (__test_and_set_bit(idx, cpuc->used_mask)) { + idx = find_first_zero_bit(cpuc->used_mask, MAX_HWEVENTS); + if (idx == MAX_HWEVENTS) + goto out; + + __set_bit(idx, cpuc->used_mask); + hwc->idx = idx; + } + + bfin_pfmon_disable(hwc, idx); + + event->hw.state = PERF_HES_UPTODATE | PERF_HES_STOPPED; + if (flags & PERF_EF_START) + bfin_pmu_start(event, PERF_EF_RELOAD); + + perf_event_update_userpage(event); + ret = 0; +out: + perf_pmu_enable(event->pmu); + return ret; +} + +static void bfin_pmu_read(struct perf_event *event) +{ + bfin_perf_event_update(event, &event->hw, event->hw.idx); +} + +static int bfin_pmu_event_init(struct perf_event *event) +{ + struct perf_event_attr *attr = &event->attr; + struct hw_perf_event *hwc = &event->hw; + int config = -1; + int ret; + + if (attr->exclude_hv || attr->exclude_idle) + return -EPERM; + + /* + * All of the on-chip counters are "limited", in that they have + * no interrupts, and are therefore unable to do sampling without + * further work and timer assistance. + */ + if (hwc->sample_period) + return -EINVAL; + + ret = 0; + switch (attr->type) { + case PERF_TYPE_RAW: + config = PFMON(0, attr->config & PFMON_MASK) | + PFCNT(0, !(attr->config & 0x100)); + break; + case PERF_TYPE_HW_CACHE: + ret = hw_perf_cache_event(attr->config, &config); + break; + case PERF_TYPE_HARDWARE: + if (attr->config >= ARRAY_SIZE(event_map)) + return -EINVAL; + + config = event_map[attr->config]; + break; + } + + if (config == -1) + return -EINVAL; + + if (!attr->exclude_kernel) + config |= PFCEN(0, PFCEN_ENABLE_SUPV); + if (!attr->exclude_user) + config |= PFCEN(0, PFCEN_ENABLE_USER); + + hwc->config |= config; + + return ret; +} + +static void bfin_pmu_enable(struct pmu *pmu) +{ + struct cpu_hw_events *cpuc = &__get_cpu_var(cpu_hw_events); + struct perf_event *event; + struct hw_perf_event *hwc; + int i; + + for (i = 0; i < MAX_HWEVENTS; ++i) { + event = cpuc->events[i]; + if (!event) + continue; + hwc = &event->hw; + bfin_pfmon_enable(hwc, hwc->idx); + } + + bfin_pfmon_enable_all(); +} + +static void bfin_pmu_disable(struct pmu *pmu) +{ + bfin_pfmon_disable_all(); +} + +static struct pmu pmu = { + .pmu_enable = bfin_pmu_enable, + .pmu_disable = bfin_pmu_disable, + .event_init = bfin_pmu_event_init, + .add = bfin_pmu_add, + .del = bfin_pmu_del, + .start = bfin_pmu_start, + .stop = bfin_pmu_stop, + .read = bfin_pmu_read, +}; + +static void bfin_pmu_setup(int cpu) +{ + struct cpu_hw_events *cpuhw = &per_cpu(cpu_hw_events, cpu); + + memset(cpuhw, 0, sizeof(struct cpu_hw_events)); +} + +static int +bfin_pmu_notifier(struct notifier_block *self, unsigned long action, void *hcpu) +{ + unsigned int cpu = (long)hcpu; + + switch (action & ~CPU_TASKS_FROZEN) { + case CPU_UP_PREPARE: + bfin_write_PFCTL(0); + bfin_pmu_setup(cpu); + break; + + default: + break; + } + + return NOTIFY_OK; +} + +static int __init bfin_pmu_init(void) +{ + int ret; + + ret = perf_pmu_register(&pmu, "cpu", PERF_TYPE_RAW); + if (!ret) + perf_cpu_notifier(bfin_pmu_notifier); + + return ret; +} +early_initcall(bfin_pmu_init); diff --git a/arch/blackfin/kernel/process.c b/arch/blackfin/kernel/process.c index 6b8459c6616..4aa5545c4fd 100644 --- a/arch/blackfin/kernel/process.c +++ b/arch/blackfin/kernel/process.c @@ -1,42 +1,25 @@ /* - * File: arch/blackfin/kernel/process.c - * Based on: - * Author: + * Blackfin architecture-dependent process handling * - * Created: - * Description: Blackfin architecture-dependent process handling. + * Copyright 2004-2009 Analog Devices Inc. * - * Modified: - * Copyright 2004-2006 Analog Devices Inc. - * - * Bugs: Enter bugs at http://blackfin.uclinux.org/ - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, see the file COPYING, or write - * to the Free Software Foundation, Inc., - * 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA + * Licensed under the GPL-2 or later */ #include <linux/module.h> -#include <linux/smp_lock.h> #include <linux/unistd.h> #include <linux/user.h> #include <linux/uaccess.h> +#include <linux/slab.h> +#include <linux/sched.h> +#include <linux/tick.h> #include <linux/fs.h> #include <linux/err.h> #include <asm/blackfin.h> #include <asm/fixed_code.h> +#include <asm/mem_map.h> +#include <asm/irq.h> asmlinkage void ret_from_fork(void); @@ -56,12 +39,6 @@ int nr_l1stack_tasks; void *l1_stack_base; unsigned long l1_stack_len; -/* - * Powermanagement idle function, if any.. - */ -void (*pm_idle)(void) = NULL; -EXPORT_SYMBOL(pm_idle); - void (*pm_power_off)(void) = NULL; EXPORT_SYMBOL(pm_power_off); @@ -69,144 +46,100 @@ EXPORT_SYMBOL(pm_power_off); * The idle loop on BFIN */ #ifdef CONFIG_IDLE_L1 -void default_idle(void)__attribute__((l1_text)); -void cpu_idle(void)__attribute__((l1_text)); +void arch_cpu_idle(void)__attribute__((l1_text)); #endif -void default_idle(void) -{ - while (!need_resched()) { - local_irq_disable(); - if (likely(!need_resched())) - idle_with_irq_disabled(); - local_irq_enable(); - } -} - -void (*idle)(void) = default_idle; - /* - * The idle thread. There's no useful work to be - * done, so just try to conserve power and have a - * low exit latency (ie sit in a loop waiting for - * somebody to say that they'd like to reschedule) + * This is our default idle handler. We need to disable + * interrupts here to ensure we don't miss a wakeup call. */ -void cpu_idle(void) +void arch_cpu_idle(void) { - /* endless idle loop with no priority at all */ - while (1) { - idle(); - preempt_enable_no_resched(); - schedule(); - preempt_disable(); - } -} +#ifdef CONFIG_IPIPE + ipipe_suspend_domain(); +#endif + hard_local_irq_disable(); + if (!need_resched()) + idle_with_irq_disabled(); -/* Fill in the fpu structure for a core dump. */ + hard_local_irq_enable(); +} -int dump_fpu(struct pt_regs *regs, elf_fpregset_t * fpregs) +#ifdef CONFIG_HOTPLUG_CPU +void arch_cpu_idle_dead(void) { - return 1; + cpu_die(); } +#endif /* - * This gets run with P1 containing the - * function to call, and R1 containing - * the "args". Note P0 is clobbered on the way here. - */ -void kernel_thread_helper(void); -__asm__(".section .text\n" - ".align 4\n" - "_kernel_thread_helper:\n\t" - "\tsp += -12;\n\t" - "\tr0 = r1;\n\t" "\tcall (p1);\n\t" "\tcall _do_exit;\n" ".previous"); - -/* - * Create a kernel thread. + * Do necessary setup to start up a newly executed thread. + * + * pass the data segment into user programs if it exists, + * it can't hurt anything as far as I can tell */ -pid_t kernel_thread(int (*fn) (void *), void *arg, unsigned long flags) +void start_thread(struct pt_regs *regs, unsigned long new_ip, unsigned long new_sp) { - struct pt_regs regs; - - memset(®s, 0, sizeof(regs)); - - regs.r1 = (unsigned long)arg; - regs.p1 = (unsigned long)fn; - regs.pc = (unsigned long)kernel_thread_helper; - regs.orig_p0 = -1; - /* Set bit 2 to tell ret_from_fork we should be returning to kernel - mode. */ - regs.ipend = 0x8002; - __asm__ __volatile__("%0 = syscfg;":"=da"(regs.syscfg):); - return do_fork(flags | CLONE_VM | CLONE_UNTRACED, 0, ®s, 0, NULL, - NULL); + regs->pc = new_ip; + if (current->mm) + regs->p5 = current->mm->start_data; +#ifndef CONFIG_SMP + task_thread_info(current)->l1_task_info.stack_start = + (void *)current->mm->context.stack_start; + task_thread_info(current)->l1_task_info.lowest_sp = (void *)new_sp; + memcpy(L1_SCRATCH_TASK_INFO, &task_thread_info(current)->l1_task_info, + sizeof(*L1_SCRATCH_TASK_INFO)); +#endif + wrusp(new_sp); } +EXPORT_SYMBOL_GPL(start_thread); void flush_thread(void) { } -asmlinkage int bfin_vfork(struct pt_regs *regs) +asmlinkage int bfin_clone(unsigned long clone_flags, unsigned long newsp) { - return do_fork(CLONE_VFORK | CLONE_VM | SIGCHLD, rdusp(), regs, 0, NULL, - NULL); -} - -asmlinkage int bfin_clone(struct pt_regs *regs) -{ - unsigned long clone_flags; - unsigned long newsp; - - /* syscall2 puts clone_flags in r0 and usp in r1 */ - clone_flags = regs->r0; - newsp = regs->r1; - if (!newsp) - newsp = rdusp(); - else +#ifdef __ARCH_SYNC_CORE_DCACHE + if (current->nr_cpus_allowed == num_possible_cpus()) + set_cpus_allowed_ptr(current, cpumask_of(smp_processor_id())); +#endif + if (newsp) newsp -= 12; - return do_fork(clone_flags, newsp, regs, 0, NULL, NULL); + return do_fork(clone_flags, newsp, 0, NULL, NULL); } int -copy_thread(int nr, unsigned long clone_flags, +copy_thread(unsigned long clone_flags, unsigned long usp, unsigned long topstk, - struct task_struct *p, struct pt_regs *regs) + struct task_struct *p) { struct pt_regs *childregs; + unsigned long *v; childregs = (struct pt_regs *) (task_stack_page(p) + THREAD_SIZE) - 1; - *childregs = *regs; - childregs->r0 = 0; + v = ((unsigned long *)childregs) - 2; + if (unlikely(p->flags & PF_KTHREAD)) { + memset(childregs, 0, sizeof(struct pt_regs)); + v[0] = usp; + v[1] = topstk; + childregs->orig_p0 = -1; + childregs->ipend = 0x8000; + __asm__ __volatile__("%0 = syscfg;":"=da"(childregs->syscfg):); + p->thread.usp = 0; + } else { + *childregs = *current_pt_regs(); + childregs->r0 = 0; + p->thread.usp = usp ? : rdusp(); + v[0] = v[1] = 0; + } - p->thread.usp = usp; - p->thread.ksp = (unsigned long)childregs; + p->thread.ksp = (unsigned long)v; p->thread.pc = (unsigned long)ret_from_fork; return 0; } -/* - * sys_execve() executes a new program. - */ - -asmlinkage int sys_execve(char *name, char **argv, char **envp) -{ - int error; - char *filename; - struct pt_regs *regs = (struct pt_regs *)((&name) + 6); - - lock_kernel(); - filename = getname(name); - error = PTR_ERR(filename); - if (IS_ERR(filename)) - goto out; - error = do_execve(filename, argv, envp, regs); - putname(filename); - out: - unlock_kernel(); - return error; -} - unsigned long get_wchan(struct task_struct *p) { unsigned long fp, pc; @@ -232,108 +165,269 @@ unsigned long get_wchan(struct task_struct *p) void finish_atomic_sections (struct pt_regs *regs) { - if (regs->pc < ATOMIC_SEQS_START || regs->pc >= ATOMIC_SEQS_END) - return; + int __user *up0 = (int __user *)regs->p0; switch (regs->pc) { + default: + /* not in middle of an atomic step, so resume like normal */ + return; + case ATOMIC_XCHG32 + 2: - put_user(regs->r1, (int *)regs->p0); - regs->pc += 2; + put_user(regs->r1, up0); break; case ATOMIC_CAS32 + 2: case ATOMIC_CAS32 + 4: if (regs->r0 == regs->r1) - put_user(regs->r2, (int *)regs->p0); - regs->pc = ATOMIC_CAS32 + 8; - break; case ATOMIC_CAS32 + 6: - put_user(regs->r2, (int *)regs->p0); - regs->pc += 2; + put_user(regs->r2, up0); break; case ATOMIC_ADD32 + 2: regs->r0 = regs->r1 + regs->r0; /* fall through */ case ATOMIC_ADD32 + 4: - put_user(regs->r0, (int *)regs->p0); - regs->pc = ATOMIC_ADD32 + 6; + put_user(regs->r0, up0); break; case ATOMIC_SUB32 + 2: regs->r0 = regs->r1 - regs->r0; /* fall through */ case ATOMIC_SUB32 + 4: - put_user(regs->r0, (int *)regs->p0); - regs->pc = ATOMIC_SUB32 + 6; + put_user(regs->r0, up0); break; case ATOMIC_IOR32 + 2: regs->r0 = regs->r1 | regs->r0; /* fall through */ case ATOMIC_IOR32 + 4: - put_user(regs->r0, (int *)regs->p0); - regs->pc = ATOMIC_IOR32 + 6; + put_user(regs->r0, up0); break; case ATOMIC_AND32 + 2: regs->r0 = regs->r1 & regs->r0; /* fall through */ case ATOMIC_AND32 + 4: - put_user(regs->r0, (int *)regs->p0); - regs->pc = ATOMIC_AND32 + 6; + put_user(regs->r0, up0); break; case ATOMIC_XOR32 + 2: regs->r0 = regs->r1 ^ regs->r0; /* fall through */ case ATOMIC_XOR32 + 4: - put_user(regs->r0, (int *)regs->p0); - regs->pc = ATOMIC_XOR32 + 6; + put_user(regs->r0, up0); break; } + + /* + * We've finished the atomic section, and the only thing left for + * userspace is to do a RTS, so we might as well handle that too + * since we need to update the PC anyways. + */ + regs->pc = regs->rets; +} + +static inline +int in_mem(unsigned long addr, unsigned long size, + unsigned long start, unsigned long end) +{ + return addr >= start && addr + size <= end; +} +static inline +int in_mem_const_off(unsigned long addr, unsigned long size, unsigned long off, + unsigned long const_addr, unsigned long const_size) +{ + return const_size && + in_mem(addr, size, const_addr + off, const_addr + const_size); +} +static inline +int in_mem_const(unsigned long addr, unsigned long size, + unsigned long const_addr, unsigned long const_size) +{ + return in_mem_const_off(addr, size, 0, const_addr, const_size); +} +#ifdef CONFIG_BF60x +#define ASYNC_ENABLED(bnum, bctlnum) 1 +#else +#define ASYNC_ENABLED(bnum, bctlnum) \ +({ \ + (bfin_read_EBIU_AMGCTL() & 0xe) < ((bnum + 1) << 1) ? 0 : \ + bfin_read_EBIU_AMBCTL##bctlnum() & B##bnum##RDYEN ? 0 : \ + 1; \ +}) +#endif +/* + * We can't read EBIU banks that aren't enabled or we end up hanging + * on the access to the async space. Make sure we validate accesses + * that cross async banks too. + * 0 - found, but unusable + * 1 - found & usable + * 2 - not found + */ +static +int in_async(unsigned long addr, unsigned long size) +{ + if (addr >= ASYNC_BANK0_BASE && addr < ASYNC_BANK0_BASE + ASYNC_BANK0_SIZE) { + if (!ASYNC_ENABLED(0, 0)) + return 0; + if (addr + size <= ASYNC_BANK0_BASE + ASYNC_BANK0_SIZE) + return 1; + size -= ASYNC_BANK0_BASE + ASYNC_BANK0_SIZE - addr; + addr = ASYNC_BANK0_BASE + ASYNC_BANK0_SIZE; + } + if (addr >= ASYNC_BANK1_BASE && addr < ASYNC_BANK1_BASE + ASYNC_BANK1_SIZE) { + if (!ASYNC_ENABLED(1, 0)) + return 0; + if (addr + size <= ASYNC_BANK1_BASE + ASYNC_BANK1_SIZE) + return 1; + size -= ASYNC_BANK1_BASE + ASYNC_BANK1_SIZE - addr; + addr = ASYNC_BANK1_BASE + ASYNC_BANK1_SIZE; + } + if (addr >= ASYNC_BANK2_BASE && addr < ASYNC_BANK2_BASE + ASYNC_BANK2_SIZE) { + if (!ASYNC_ENABLED(2, 1)) + return 0; + if (addr + size <= ASYNC_BANK2_BASE + ASYNC_BANK2_SIZE) + return 1; + size -= ASYNC_BANK2_BASE + ASYNC_BANK2_SIZE - addr; + addr = ASYNC_BANK2_BASE + ASYNC_BANK2_SIZE; + } + if (addr >= ASYNC_BANK3_BASE && addr < ASYNC_BANK3_BASE + ASYNC_BANK3_SIZE) { + if (ASYNC_ENABLED(3, 1)) + return 0; + if (addr + size <= ASYNC_BANK3_BASE + ASYNC_BANK3_SIZE) + return 1; + return 0; + } + + /* not within async bounds */ + return 2; +} + +int bfin_mem_access_type(unsigned long addr, unsigned long size) +{ + int cpu = raw_smp_processor_id(); + + /* Check that things do not wrap around */ + if (addr > ULONG_MAX - size) + return -EFAULT; + + if (in_mem(addr, size, FIXED_CODE_START, physical_mem_end)) + return BFIN_MEM_ACCESS_CORE; + + if (in_mem_const(addr, size, L1_CODE_START, L1_CODE_LENGTH)) + return cpu == 0 ? BFIN_MEM_ACCESS_ITEST : BFIN_MEM_ACCESS_IDMA; + if (in_mem_const(addr, size, L1_SCRATCH_START, L1_SCRATCH_LENGTH)) + return cpu == 0 ? BFIN_MEM_ACCESS_CORE_ONLY : -EFAULT; + if (in_mem_const(addr, size, L1_DATA_A_START, L1_DATA_A_LENGTH)) + return cpu == 0 ? BFIN_MEM_ACCESS_CORE : BFIN_MEM_ACCESS_IDMA; + if (in_mem_const(addr, size, L1_DATA_B_START, L1_DATA_B_LENGTH)) + return cpu == 0 ? BFIN_MEM_ACCESS_CORE : BFIN_MEM_ACCESS_IDMA; +#ifdef COREB_L1_CODE_START + if (in_mem_const(addr, size, COREB_L1_CODE_START, COREB_L1_CODE_LENGTH)) + return cpu == 1 ? BFIN_MEM_ACCESS_ITEST : BFIN_MEM_ACCESS_IDMA; + if (in_mem_const(addr, size, COREB_L1_SCRATCH_START, L1_SCRATCH_LENGTH)) + return cpu == 1 ? BFIN_MEM_ACCESS_CORE_ONLY : -EFAULT; + if (in_mem_const(addr, size, COREB_L1_DATA_A_START, COREB_L1_DATA_A_LENGTH)) + return cpu == 1 ? BFIN_MEM_ACCESS_CORE : BFIN_MEM_ACCESS_IDMA; + if (in_mem_const(addr, size, COREB_L1_DATA_B_START, COREB_L1_DATA_B_LENGTH)) + return cpu == 1 ? BFIN_MEM_ACCESS_CORE : BFIN_MEM_ACCESS_IDMA; +#endif + if (in_mem_const(addr, size, L2_START, L2_LENGTH)) + return BFIN_MEM_ACCESS_CORE; + + if (addr >= SYSMMR_BASE) + return BFIN_MEM_ACCESS_CORE_ONLY; + + switch (in_async(addr, size)) { + case 0: return -EFAULT; + case 1: return BFIN_MEM_ACCESS_CORE; + case 2: /* fall through */; + } + + if (in_mem_const(addr, size, BOOT_ROM_START, BOOT_ROM_LENGTH)) + return BFIN_MEM_ACCESS_CORE; + if (in_mem_const(addr, size, L1_ROM_START, L1_ROM_LENGTH)) + return BFIN_MEM_ACCESS_DMA; + + return -EFAULT; } #if defined(CONFIG_ACCESS_CHECK) +#ifdef CONFIG_ACCESS_OK_L1 +__attribute__((l1_text)) +#endif /* Return 1 if access to memory range is OK, 0 otherwise */ int _access_ok(unsigned long addr, unsigned long size) { + int aret; + if (size == 0) return 1; - if (addr > (addr + size)) + /* Check that things do not wrap around */ + if (addr > ULONG_MAX - size) return 0; if (segment_eq(get_fs(), KERNEL_DS)) return 1; #ifdef CONFIG_MTD_UCLINUX - if (addr >= memory_start && (addr + size) <= memory_end) + if (1) +#else + if (0) +#endif + { + if (in_mem(addr, size, memory_start, memory_end)) + return 1; + if (in_mem(addr, size, memory_mtd_end, physical_mem_end)) + return 1; +# ifndef CONFIG_ROMFS_ON_MTD + if (0) +# endif + /* For XIP, allow user space to use pointers within the ROMFS. */ + if (in_mem(addr, size, memory_mtd_start, memory_mtd_end)) + return 1; + } else { + if (in_mem(addr, size, memory_start, physical_mem_end)) + return 1; + } + + if (in_mem(addr, size, (unsigned long)__init_begin, (unsigned long)__init_end)) return 1; - if (addr >= memory_mtd_end && (addr + size) <= physical_mem_end) + + if (in_mem_const(addr, size, L1_CODE_START, L1_CODE_LENGTH)) return 1; -#else - if (addr >= memory_start && (addr + size) <= physical_mem_end) + if (in_mem_const_off(addr, size, _etext_l1 - _stext_l1, L1_CODE_START, L1_CODE_LENGTH)) return 1; -#endif - if (addr >= (unsigned long)__init_begin && - addr + size <= (unsigned long)__init_end) + if (in_mem_const_off(addr, size, _ebss_l1 - _sdata_l1, L1_DATA_A_START, L1_DATA_A_LENGTH)) return 1; - if (addr >= L1_SCRATCH_START - && addr + size <= L1_SCRATCH_START + L1_SCRATCH_LENGTH) + if (in_mem_const_off(addr, size, _ebss_b_l1 - _sdata_b_l1, L1_DATA_B_START, L1_DATA_B_LENGTH)) return 1; -#if L1_CODE_LENGTH != 0 - if (addr >= L1_CODE_START + (_etext_l1 - _stext_l1) - && addr + size <= L1_CODE_START + L1_CODE_LENGTH) +#ifdef COREB_L1_CODE_START + if (in_mem_const(addr, size, COREB_L1_CODE_START, COREB_L1_CODE_LENGTH)) return 1; -#endif -#if L1_DATA_A_LENGTH != 0 - if (addr >= L1_DATA_A_START + (_ebss_l1 - _sdata_l1) - && addr + size <= L1_DATA_A_START + L1_DATA_A_LENGTH) + if (in_mem_const(addr, size, COREB_L1_SCRATCH_START, L1_SCRATCH_LENGTH)) + return 1; + if (in_mem_const(addr, size, COREB_L1_DATA_A_START, COREB_L1_DATA_A_LENGTH)) + return 1; + if (in_mem_const(addr, size, COREB_L1_DATA_B_START, COREB_L1_DATA_B_LENGTH)) return 1; #endif -#if L1_DATA_B_LENGTH != 0 - if (addr >= L1_DATA_B_START - && addr + size <= L1_DATA_B_START + L1_DATA_B_LENGTH) + +#ifndef CONFIG_EXCEPTION_L1_SCRATCH + if (in_mem_const(addr, size, (unsigned long)l1_stack_base, l1_stack_len)) return 1; #endif + + aret = in_async(addr, size); + if (aret < 2) + return aret; + + if (in_mem_const_off(addr, size, _ebss_l2 - _stext_l2, L2_START, L2_LENGTH)) + return 1; + + if (in_mem_const(addr, size, BOOT_ROM_START, BOOT_ROM_LENGTH)) + return 1; + if (in_mem_const(addr, size, L1_ROM_START, L1_ROM_LENGTH)) + return 1; + return 0; } EXPORT_SYMBOL(_access_ok); diff --git a/arch/blackfin/kernel/pseudodbg.c b/arch/blackfin/kernel/pseudodbg.c new file mode 100644 index 00000000000..db85bc94334 --- /dev/null +++ b/arch/blackfin/kernel/pseudodbg.c @@ -0,0 +1,191 @@ +/* The fake debug assert instructions + * + * Copyright 2010 Analog Devices Inc. + * + * Licensed under the GPL-2 or later + */ + +#include <linux/types.h> +#include <linux/kernel.h> +#include <linux/ptrace.h> + +const char * const greg_names[] = { + "R0", "R1", "R2", "R3", "R4", "R5", "R6", "R7", + "P0", "P1", "P2", "P3", "P4", "P5", "SP", "FP", + "I0", "I1", "I2", "I3", "M0", "M1", "M2", "M3", + "B0", "B1", "B2", "B3", "L0", "L1", "L2", "L3", + "A0.X", "A0.W", "A1.X", "A1.W", "<res>", "<res>", "ASTAT", "RETS", + "<res>", "<res>", "<res>", "<res>", "<res>", "<res>", "<res>", "<res>", + "LC0", "LT0", "LB0", "LC1", "LT1", "LB1", "CYCLES", "CYCLES2", + "USP", "SEQSTAT", "SYSCFG", "RETI", "RETX", "RETN", "RETE", "EMUDAT", +}; + +static const char *get_allreg_name(int grp, int reg) +{ + return greg_names[(grp << 3) | reg]; +} + +/* + * Unfortunately, the pt_regs structure is not laid out the same way as the + * hardware register file, so we need to do some fix ups. + * + * CYCLES is not stored in the pt_regs structure - so, we just read it from + * the hardware. + * + * Don't support: + * - All reserved registers + * - All in group 7 are (supervisors only) + */ + +static bool fix_up_reg(struct pt_regs *fp, long *value, int grp, int reg) +{ + long *val = &fp->r0; + unsigned long tmp; + + /* Only do Dregs and Pregs for now */ + if (grp == 5 || + (grp == 4 && (reg == 4 || reg == 5)) || + (grp == 7)) + return false; + + if (grp == 0 || (grp == 1 && reg < 6)) + val -= (reg + 8 * grp); + else if (grp == 1 && reg == 6) + val = &fp->usp; + else if (grp == 1 && reg == 7) + val = &fp->fp; + else if (grp == 2) { + val = &fp->i0; + val -= reg; + } else if (grp == 3 && reg >= 4) { + val = &fp->l0; + val -= (reg - 4); + } else if (grp == 3 && reg < 4) { + val = &fp->b0; + val -= reg; + } else if (grp == 4 && reg < 4) { + val = &fp->a0x; + val -= reg; + } else if (grp == 4 && reg == 6) + val = &fp->astat; + else if (grp == 4 && reg == 7) + val = &fp->rets; + else if (grp == 6 && reg < 6) { + val = &fp->lc0; + val -= reg; + } else if (grp == 6 && reg == 6) { + __asm__ __volatile__("%0 = cycles;\n" : "=d"(tmp)); + val = &tmp; + } else if (grp == 6 && reg == 7) { + __asm__ __volatile__("%0 = cycles2;\n" : "=d"(tmp)); + val = &tmp; + } + + *value = *val; + return true; + +} + +#define PseudoDbg_Assert_opcode 0xf0000000 +#define PseudoDbg_Assert_expected_bits 0 +#define PseudoDbg_Assert_expected_mask 0xffff +#define PseudoDbg_Assert_regtest_bits 16 +#define PseudoDbg_Assert_regtest_mask 0x7 +#define PseudoDbg_Assert_grp_bits 19 +#define PseudoDbg_Assert_grp_mask 0x7 +#define PseudoDbg_Assert_dbgop_bits 22 +#define PseudoDbg_Assert_dbgop_mask 0x3 +#define PseudoDbg_Assert_dontcare_bits 24 +#define PseudoDbg_Assert_dontcare_mask 0x7 +#define PseudoDbg_Assert_code_bits 27 +#define PseudoDbg_Assert_code_mask 0x1f + +/* + * DBGA - debug assert + */ +bool execute_pseudodbg_assert(struct pt_regs *fp, unsigned int opcode) +{ + int expected = ((opcode >> PseudoDbg_Assert_expected_bits) & PseudoDbg_Assert_expected_mask); + int dbgop = ((opcode >> (PseudoDbg_Assert_dbgop_bits)) & PseudoDbg_Assert_dbgop_mask); + int grp = ((opcode >> (PseudoDbg_Assert_grp_bits)) & PseudoDbg_Assert_grp_mask); + int regtest = ((opcode >> (PseudoDbg_Assert_regtest_bits)) & PseudoDbg_Assert_regtest_mask); + long value; + + if ((opcode & 0xFF000000) != PseudoDbg_Assert_opcode) + return false; + + if (!fix_up_reg(fp, &value, grp, regtest)) + return false; + + if (dbgop == 0 || dbgop == 2) { + /* DBGA ( regs_lo , uimm16 ) */ + /* DBGAL ( regs , uimm16 ) */ + if (expected != (value & 0xFFFF)) { + pr_notice("DBGA (%s.L,0x%x) failure, got 0x%x\n", + get_allreg_name(grp, regtest), + expected, (unsigned int)(value & 0xFFFF)); + return false; + } + + } else if (dbgop == 1 || dbgop == 3) { + /* DBGA ( regs_hi , uimm16 ) */ + /* DBGAH ( regs , uimm16 ) */ + if (expected != ((value >> 16) & 0xFFFF)) { + pr_notice("DBGA (%s.H,0x%x) failure, got 0x%x\n", + get_allreg_name(grp, regtest), + expected, (unsigned int)((value >> 16) & 0xFFFF)); + return false; + } + } + + fp->pc += 4; + return true; +} + +#define PseudoDbg_opcode 0xf8000000 +#define PseudoDbg_reg_bits 0 +#define PseudoDbg_reg_mask 0x7 +#define PseudoDbg_grp_bits 3 +#define PseudoDbg_grp_mask 0x7 +#define PseudoDbg_fn_bits 6 +#define PseudoDbg_fn_mask 0x3 +#define PseudoDbg_code_bits 8 +#define PseudoDbg_code_mask 0xff + +/* + * DBG - debug (dump a register value out) + */ +bool execute_pseudodbg(struct pt_regs *fp, unsigned int opcode) +{ + int grp, fn, reg; + long value, value1; + + if ((opcode & 0xFF000000) != PseudoDbg_opcode) + return false; + + opcode >>= 16; + grp = ((opcode >> PseudoDbg_grp_bits) & PseudoDbg_reg_mask); + fn = ((opcode >> PseudoDbg_fn_bits) & PseudoDbg_fn_mask); + reg = ((opcode >> PseudoDbg_reg_bits) & PseudoDbg_reg_mask); + + if (fn == 3 && (reg == 0 || reg == 1)) { + if (!fix_up_reg(fp, &value, 4, 2 * reg)) + return false; + if (!fix_up_reg(fp, &value1, 4, 2 * reg + 1)) + return false; + + pr_notice("DBG A%i = %02lx%08lx\n", reg, value & 0xFF, value1); + fp->pc += 2; + return true; + + } else if (fn == 0) { + if (!fix_up_reg(fp, &value, grp, reg)) + return false; + + pr_notice("DBG %s = %08lx\n", get_allreg_name(grp, reg), value); + fp->pc += 2; + return true; + } + + return false; +} diff --git a/arch/blackfin/kernel/ptrace.c b/arch/blackfin/kernel/ptrace.c index 85caf9b711a..8b8fe671b1a 100644 --- a/arch/blackfin/kernel/ptrace.c +++ b/arch/blackfin/kernel/ptrace.c @@ -1,134 +1,85 @@ /* - * File: arch/blackfin/kernel/ptrace.c - * Based on: Taken from linux/kernel/ptrace.c - * Author: linux/kernel/ptrace.c is by Ross Biro 1/23/92, edited by Linus Torvalds + * linux/kernel/ptrace.c is by Ross Biro 1/23/92, edited by Linus Torvalds + * these modifications are Copyright 2004-2010 Analog Devices Inc. * - * Created: 1/23/92 - * Description: - * - * Modified: - * Copyright 2004-2006 Analog Devices Inc. - * - * Bugs: Enter bugs at http://blackfin.uclinux.org/ - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, see the file COPYING, or write - * to the Free Software Foundation, Inc., - * 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA + * Licensed under the GPL-2 */ #include <linux/kernel.h> #include <linux/sched.h> #include <linux/mm.h> #include <linux/smp.h> -#include <linux/smp_lock.h> +#include <linux/elf.h> #include <linux/errno.h> #include <linux/ptrace.h> #include <linux/user.h> +#include <linux/regset.h> #include <linux/signal.h> +#include <linux/tracehook.h> #include <linux/uaccess.h> #include <asm/page.h> #include <asm/pgtable.h> -#include <asm/system.h> #include <asm/processor.h> #include <asm/asm-offsets.h> #include <asm/dma.h> #include <asm/fixed_code.h> +#include <asm/cacheflush.h> +#include <asm/mem_map.h> +#include <asm/mmu_context.h> -#define MAX_SHARED_LIBS 3 -#define TEXT_OFFSET 0 /* * does not yet catch signals sent when the child dies. * in exit.c or in signal.c. */ -/* determines which bits in the SYSCFG reg the user has access to. */ -/* 1 = access 0 = no access */ -#define SYSCFG_MASK 0x0007 /* SYSCFG reg */ -/* sets the trace bits. */ -#define TRACE_BITS 0x0001 - -/* Find the stack offset for a register, relative to thread.esp0. */ -#define PT_REG(reg) ((long)&((struct pt_regs *)0)->reg) - -/* - * Get the address of the live pt_regs for the specified task. - * These are saved onto the top kernel stack when the process - * is not running. - * - * Note: if a user thread is execve'd from kernel space, the - * kernel stack will not be empty on entry to the kernel, so - * ptracing these tasks will fail. - */ -static inline struct pt_regs *get_user_regs(struct task_struct *task) -{ - return (struct pt_regs *) - ((unsigned long)task_stack_page(task) + - (THREAD_SIZE - sizeof(struct pt_regs))); -} - -/* - * Get all user integer registers. - */ -static inline int ptrace_getregs(struct task_struct *tsk, void __user * uregs) -{ - struct pt_regs *regs = get_user_regs(tsk); - return copy_to_user(uregs, regs, sizeof(struct pt_regs)) ? -EFAULT : 0; -} - -/* Mapping from PT_xxx to the stack offset at which the register is - * saved. Notice that usp has no stack-slot and needs to be treated - * specially (see get_reg/put_reg below). - */ - /* * Get contents of register REGNO in task TASK. */ -static inline long get_reg(struct task_struct *task, int regno) +static inline long +get_reg(struct task_struct *task, unsigned long regno, + unsigned long __user *datap) { - unsigned char *reg_ptr; + long tmp; + struct pt_regs *regs = task_pt_regs(task); - struct pt_regs *regs = - (struct pt_regs *)((unsigned long)task_stack_page(task) + - (THREAD_SIZE - sizeof(struct pt_regs))); - reg_ptr = (char *)regs; + if (regno & 3 || regno > PT_LAST_PSEUDO) + return -EIO; switch (regno) { + case PT_TEXT_ADDR: + tmp = task->mm->start_code; + break; + case PT_TEXT_END_ADDR: + tmp = task->mm->end_code; + break; + case PT_DATA_ADDR: + tmp = task->mm->start_data; + break; case PT_USP: - return task->thread.usp; + tmp = task->thread.usp; + break; default: - if (regno <= 216) - return *(long *)(reg_ptr + regno); + if (regno < sizeof(*regs)) { + void *reg_ptr = regs; + tmp = *(long *)(reg_ptr + regno); + } else + return -EIO; } - /* slight mystery ... never seems to come here but kernel misbehaves without this code! */ - printk(KERN_WARNING "Request to get for unknown register %d\n", regno); - return 0; + return put_user(tmp, datap); } /* * Write contents of register REGNO in task TASK. */ static inline int -put_reg(struct task_struct *task, int regno, unsigned long data) +put_reg(struct task_struct *task, unsigned long regno, unsigned long data) { - char *reg_ptr; + struct pt_regs *regs = task_pt_regs(task); - struct pt_regs *regs = - (struct pt_regs *)((unsigned long)task_stack_page(task) + - (THREAD_SIZE - sizeof(struct pt_regs))); - reg_ptr = (char *)regs; + if (regno & 3 || regno > PT_LAST_PSEUDO) + return -EIO; switch (regno) { case PT_PC: @@ -145,262 +96,293 @@ put_reg(struct task_struct *task, int regno, unsigned long data) regs->usp = data; task->thread.usp = data; break; + case PT_SYSCFG: /* don't let userspace screw with this */ + if ((data & ~1) != 0x6) + pr_warning("ptrace: ignore syscfg write of %#lx\n", data); + break; /* regs->syscfg = data; break; */ default: - if (regno <= 216) - *(long *)(reg_ptr + regno) = data; + if (regno < sizeof(*regs)) { + void *reg_offset = regs; + *(long *)(reg_offset + regno) = data; + } + /* Ignore writes to pseudo registers */ } + return 0; } /* * check that an address falls within the bounds of the target process's memory mappings */ -static inline int is_user_addr_valid(struct task_struct *child, - unsigned long start, unsigned long len) +int +is_user_addr_valid(struct task_struct *child, unsigned long start, unsigned long len) { - struct vm_list_struct *vml; + bool valid; + struct vm_area_struct *vma; struct sram_list_struct *sraml; - for (vml = child->mm->context.vmlist; vml; vml = vml->next) - if (start >= vml->vma->vm_start && start + len <= vml->vma->vm_end) - return 0; + /* overflow */ + if (start + len < start) + return -EIO; + + down_read(&child->mm->mmap_sem); + vma = find_vma(child->mm, start); + valid = vma && start >= vma->vm_start && start + len <= vma->vm_end; + up_read(&child->mm->mmap_sem); + if (valid) + return 0; for (sraml = child->mm->context.sram_list; sraml; sraml = sraml->next) if (start >= (unsigned long)sraml->addr - && start + len <= (unsigned long)sraml->addr + sraml->length) + && start + len < (unsigned long)sraml->addr + sraml->length) return 0; - if (start >= FIXED_CODE_START && start + len <= FIXED_CODE_END) + if (start >= FIXED_CODE_START && start + len < FIXED_CODE_END) return 0; +#ifdef CONFIG_APP_STACK_L1 + if (child->mm->context.l1_stack_save) + if (start >= (unsigned long)l1_stack_base && + start + len < (unsigned long)l1_stack_base + l1_stack_len) + return 0; +#endif + return -EIO; } /* - * Called by kernel/ptrace.c when detaching.. - * - * Make sure the single step bit is not set. + * retrieve the contents of Blackfin userspace general registers */ -void ptrace_disable(struct task_struct *child) +static int genregs_get(struct task_struct *target, + const struct user_regset *regset, + unsigned int pos, unsigned int count, + void *kbuf, void __user *ubuf) { - unsigned long tmp; - /* make sure the single step bit is not set. */ - tmp = get_reg(child, PT_SR) & ~(TRACE_BITS << 16); - put_reg(child, PT_SR, tmp); + struct pt_regs *regs = task_pt_regs(target); + int ret; + + /* This sucks ... */ + regs->usp = target->thread.usp; + + ret = user_regset_copyout(&pos, &count, &kbuf, &ubuf, + regs, 0, sizeof(*regs)); + if (ret < 0) + return ret; + + return user_regset_copyout_zero(&pos, &count, &kbuf, &ubuf, + sizeof(*regs), -1); } -long arch_ptrace(struct task_struct *child, long request, long addr, long data) +/* + * update the contents of the Blackfin userspace general registers + */ +static int genregs_set(struct task_struct *target, + const struct user_regset *regset, + unsigned int pos, unsigned int count, + const void *kbuf, const void __user *ubuf) { + struct pt_regs *regs = task_pt_regs(target); int ret; - int add = 0; + + /* Don't let people set SYSCFG (it's at the end of pt_regs) */ + ret = user_regset_copyin(&pos, &count, &kbuf, &ubuf, + regs, 0, PT_SYSCFG); + if (ret < 0) + return ret; + + /* This sucks ... */ + target->thread.usp = regs->usp; + /* regs->retx = regs->pc; */ + + return user_regset_copyin_ignore(&pos, &count, &kbuf, &ubuf, + PT_SYSCFG, -1); +} + +/* + * Define the register sets available on the Blackfin under Linux + */ +enum bfin_regset { + REGSET_GENERAL, +}; + +static const struct user_regset bfin_regsets[] = { + [REGSET_GENERAL] = { + .core_note_type = NT_PRSTATUS, + .n = sizeof(struct pt_regs) / sizeof(long), + .size = sizeof(long), + .align = sizeof(long), + .get = genregs_get, + .set = genregs_set, + }, +}; + +static const struct user_regset_view user_bfin_native_view = { + .name = "Blackfin", + .e_machine = EM_BLACKFIN, + .regsets = bfin_regsets, + .n = ARRAY_SIZE(bfin_regsets), +}; + +const struct user_regset_view *task_user_regset_view(struct task_struct *task) +{ + return &user_bfin_native_view; +} + +void user_enable_single_step(struct task_struct *child) +{ + struct pt_regs *regs = task_pt_regs(child); + regs->syscfg |= SYSCFG_SSSTEP; + + set_tsk_thread_flag(child, TIF_SINGLESTEP); +} + +void user_disable_single_step(struct task_struct *child) +{ + struct pt_regs *regs = task_pt_regs(child); + regs->syscfg &= ~SYSCFG_SSSTEP; + + clear_tsk_thread_flag(child, TIF_SINGLESTEP); +} + +long arch_ptrace(struct task_struct *child, long request, + unsigned long addr, unsigned long data) +{ + int ret; + unsigned long __user *datap = (unsigned long __user *)data; + void *paddr = (void *)addr; switch (request) { /* when I and D space are separate, these will need to be fixed. */ case PTRACE_PEEKDATA: pr_debug("ptrace: PEEKDATA\n"); - add = MAX_SHARED_LIBS * 4; /* space between text and data */ /* fall through */ case PTRACE_PEEKTEXT: /* read word at location addr. */ { unsigned long tmp = 0; - int copied; + int copied = 0, to_copy = sizeof(tmp); ret = -EIO; - pr_debug("ptrace: PEEKTEXT at addr 0x%08lx + add %d %ld\n", addr, add, - sizeof(data)); - if (is_user_addr_valid(child, addr + add, sizeof(tmp)) < 0) + pr_debug("ptrace: PEEKTEXT at addr 0x%08lx + %i\n", addr, to_copy); + if (is_user_addr_valid(child, addr, to_copy) < 0) break; pr_debug("ptrace: user address is valid\n"); -#if L1_CODE_LENGTH != 0 - if (addr + add >= L1_CODE_START - && addr + add + sizeof(tmp) <= L1_CODE_START + L1_CODE_LENGTH) { - safe_dma_memcpy (&tmp, (const void *)(addr + add), sizeof(tmp)); - copied = sizeof(tmp); - } else -#endif - if (addr + add >= FIXED_CODE_START - && addr + add + sizeof(tmp) <= FIXED_CODE_END) { - memcpy(&tmp, (const void *)(addr + add), sizeof(tmp)); - copied = sizeof(tmp); - } else - copied = access_process_vm(child, addr + add, &tmp, - sizeof(tmp), 0); - pr_debug("ptrace: copied size %d [0x%08lx]\n", copied, tmp); - if (copied != sizeof(tmp)) - break; - ret = put_user(tmp, (unsigned long *)data); - break; - } + switch (bfin_mem_access_type(addr, to_copy)) { + case BFIN_MEM_ACCESS_CORE: + case BFIN_MEM_ACCESS_CORE_ONLY: + copied = access_process_vm(child, addr, &tmp, + to_copy, 0); + if (copied) + break; + + /* hrm, why didn't that work ... maybe no mapping */ + if (addr >= FIXED_CODE_START && + addr + to_copy <= FIXED_CODE_END) { + copy_from_user_page(0, 0, 0, &tmp, paddr, to_copy); + copied = to_copy; + } else if (addr >= BOOT_ROM_START) { + memcpy(&tmp, paddr, to_copy); + copied = to_copy; + } - /* read the word at location addr in the USER area. */ - case PTRACE_PEEKUSR: - { - unsigned long tmp; - ret = -EIO; - tmp = 0; - if ((addr & 3) || (addr > (sizeof(struct pt_regs) + 16))) { - printk(KERN_WARNING "ptrace error : PEEKUSR : temporarily returning " - "0 - %x sizeof(pt_regs) is %lx\n", - (int)addr, sizeof(struct pt_regs)); + break; + case BFIN_MEM_ACCESS_DMA: + if (safe_dma_memcpy(&tmp, paddr, to_copy)) + copied = to_copy; + break; + case BFIN_MEM_ACCESS_ITEST: + if (isram_memcpy(&tmp, paddr, to_copy)) + copied = to_copy; + break; + default: + copied = 0; break; } - if (addr == sizeof(struct pt_regs)) { - /* PT_TEXT_ADDR */ - tmp = child->mm->start_code + TEXT_OFFSET; - } else if (addr == (sizeof(struct pt_regs) + 4)) { - /* PT_TEXT_END_ADDR */ - tmp = child->mm->end_code; - } else if (addr == (sizeof(struct pt_regs) + 8)) { - /* PT_DATA_ADDR */ - tmp = child->mm->start_data; -#ifdef CONFIG_BINFMT_ELF_FDPIC - } else if (addr == (sizeof(struct pt_regs) + 12)) { - tmp = child->mm->context.exec_fdpic_loadmap; - } else if (addr == (sizeof(struct pt_regs) + 16)) { - tmp = child->mm->context.interp_fdpic_loadmap; -#endif - } else { - tmp = get_reg(child, addr); - } - ret = put_user(tmp, (unsigned long *)data); + + pr_debug("ptrace: copied size %d [0x%08lx]\n", copied, tmp); + if (copied == to_copy) + ret = put_user(tmp, datap); break; } /* when I and D space are separate, this will have to be fixed. */ case PTRACE_POKEDATA: - printk(KERN_NOTICE "ptrace: PTRACE_PEEKDATA\n"); + pr_debug("ptrace: PTRACE_PEEKDATA\n"); /* fall through */ case PTRACE_POKETEXT: /* write the word at location addr. */ { - int copied; + int copied = 0, to_copy = sizeof(data); ret = -EIO; - pr_debug("ptrace: POKETEXT at addr 0x%08lx + add %d %ld bytes %lx\n", - addr, add, sizeof(data), data); - if (is_user_addr_valid(child, addr + add, sizeof(data)) < 0) + pr_debug("ptrace: POKETEXT at addr 0x%08lx + %i bytes %lx\n", + addr, to_copy, data); + if (is_user_addr_valid(child, addr, to_copy) < 0) break; pr_debug("ptrace: user address is valid\n"); -#if L1_CODE_LENGTH != 0 - if (addr + add >= L1_CODE_START - && addr + add + sizeof(data) <= L1_CODE_START + L1_CODE_LENGTH) { - safe_dma_memcpy ((void *)(addr + add), &data, sizeof(data)); - copied = sizeof(data); - } else -#endif - if (addr + add >= FIXED_CODE_START - && addr + add + sizeof(data) <= FIXED_CODE_END) { - memcpy((void *)(addr + add), &data, sizeof(data)); - copied = sizeof(data); - } else - copied = access_process_vm(child, addr + add, &data, - sizeof(data), 1); - pr_debug("ptrace: copied size %d\n", copied); - if (copied != sizeof(data)) + switch (bfin_mem_access_type(addr, to_copy)) { + case BFIN_MEM_ACCESS_CORE: + case BFIN_MEM_ACCESS_CORE_ONLY: + copied = access_process_vm(child, addr, &data, + to_copy, 1); break; - ret = 0; - break; - } + case BFIN_MEM_ACCESS_DMA: + if (safe_dma_memcpy(paddr, &data, to_copy)) + copied = to_copy; + break; + case BFIN_MEM_ACCESS_ITEST: + if (isram_memcpy(paddr, &data, to_copy)) + copied = to_copy; + break; + default: + copied = 0; + break; + } - case PTRACE_POKEUSR: /* write the word at location addr in the USER area */ - ret = -EIO; - if ((addr & 3) || (addr > (sizeof(struct pt_regs) + 16))) { - printk(KERN_WARNING "ptrace error : POKEUSR: temporarily returning 0\n"); + pr_debug("ptrace: copied size %d\n", copied); + if (copied == to_copy) + ret = 0; break; } - if (addr >= (sizeof(struct pt_regs))) { - ret = 0; - break; - } - if (addr == PT_SYSCFG) { - data &= SYSCFG_MASK; - data |= get_reg(child, PT_SYSCFG); + case PTRACE_PEEKUSR: + switch (addr) { +#ifdef CONFIG_BINFMT_ELF_FDPIC /* backwards compat */ + case PT_FDPIC_EXEC: + request = PTRACE_GETFDPIC; + addr = PTRACE_GETFDPIC_EXEC; + goto case_default; + case PT_FDPIC_INTERP: + request = PTRACE_GETFDPIC; + addr = PTRACE_GETFDPIC_INTERP; + goto case_default; +#endif + default: + ret = get_reg(child, addr, datap); } - ret = put_reg(child, addr, data); + pr_debug("ptrace: PEEKUSR reg %li with %#lx = %i\n", addr, data, ret); break; - case PTRACE_SYSCALL: /* continue and stop at next (return from) syscall */ - case PTRACE_CONT: - { /* restart after signal. */ - long tmp; - - pr_debug("ptrace_cont\n"); - - ret = -EIO; - if (!valid_signal(data)) - break; - if (request == PTRACE_SYSCALL) - set_tsk_thread_flag(child, TIF_SYSCALL_TRACE); - else - clear_tsk_thread_flag(child, TIF_SYSCALL_TRACE); - - child->exit_code = data; - /* make sure the single step bit is not set. */ - tmp = get_reg(child, PT_SYSCFG) & ~(TRACE_BITS); - put_reg(child, PT_SYSCFG, tmp); - pr_debug("before wake_up_process\n"); - wake_up_process(child); - ret = 0; - break; - } - - /* - * make the child exit. Best I can do is send it a sigkill. - * perhaps it should be put in the status that it wants to - * exit. - */ - case PTRACE_KILL: - { - long tmp; - ret = 0; - if (child->exit_state == EXIT_ZOMBIE) /* already dead */ - break; - child->exit_code = SIGKILL; - /* make sure the single step bit is not set. */ - tmp = get_reg(child, PT_SYSCFG) & ~(TRACE_BITS); - put_reg(child, PT_SYSCFG, tmp); - wake_up_process(child); - break; - } - - case PTRACE_SINGLESTEP: - { /* set the trap flag. */ - long tmp; - - pr_debug("single step\n"); - ret = -EIO; - if (!valid_signal(data)) - break; - clear_tsk_thread_flag(child, TIF_SYSCALL_TRACE); - - tmp = get_reg(child, PT_SYSCFG) | (TRACE_BITS); - put_reg(child, PT_SYSCFG, tmp); - - child->exit_code = data; - /* give it a chance to run. */ - wake_up_process(child); - ret = 0; - break; - } + case PTRACE_POKEUSR: + ret = put_reg(child, addr, data); + pr_debug("ptrace: POKEUSR reg %li with %li = %i\n", addr, data, ret); + break; case PTRACE_GETREGS: - { - - /* Get all gp regs from the child. */ - ret = ptrace_getregs(child, (void __user *)data); - break; - } + pr_debug("ptrace: PTRACE_GETREGS\n"); + return copy_regset_to_user(child, &user_bfin_native_view, + REGSET_GENERAL, + 0, sizeof(struct pt_regs), + datap); case PTRACE_SETREGS: - { - printk(KERN_NOTICE - "ptrace: SETREGS: **** NOT IMPLEMENTED ***\n"); - /* Set all gp regs in the child. */ - ret = 0; - break; - } + pr_debug("ptrace: PTRACE_SETREGS\n"); + return copy_regset_from_user(child, &user_bfin_native_view, + REGSET_GENERAL, + 0, sizeof(struct pt_regs), + datap); + + case_default: default: ret = ptrace_request(child, request, addr, data); break; @@ -409,28 +391,21 @@ long arch_ptrace(struct task_struct *child, long request, long addr, long data) return ret; } -asmlinkage void syscall_trace(void) +asmlinkage int syscall_trace_enter(struct pt_regs *regs) { + int ret = 0; - if (!test_thread_flag(TIF_SYSCALL_TRACE)) - return; - - if (!(current->ptrace & PT_PTRACED)) - return; - - /* the 0x80 provides a way for the tracing parent to distinguish - * between a syscall stop and SIGTRAP delivery - */ - ptrace_notify(SIGTRAP | ((current->ptrace & PT_TRACESYSGOOD) - ? 0x80 : 0)); - - /* - * this isn't the same as continuing with a signal, but it will do - * for normal use. strace only continues with a signal if the - * stopping signal is not SIGTRAP. -brl - */ - if (current->exit_code) { - send_sig(current->exit_code, current, 1); - current->exit_code = 0; - } + if (test_thread_flag(TIF_SYSCALL_TRACE)) + ret = tracehook_report_syscall_entry(regs); + + return ret; +} + +asmlinkage void syscall_trace_leave(struct pt_regs *regs) +{ + int step; + + step = test_thread_flag(TIF_SINGLESTEP); + if (step || test_thread_flag(TIF_SYSCALL_TRACE)) + tracehook_report_syscall_exit(regs, step); } diff --git a/arch/blackfin/kernel/reboot.c b/arch/blackfin/kernel/reboot.c index 483f93dfc1b..c4f50a32850 100644 --- a/arch/blackfin/kernel/reboot.c +++ b/arch/blackfin/kernel/reboot.c @@ -9,49 +9,73 @@ #include <linux/interrupt.h> #include <asm/bfin-global.h> #include <asm/reboot.h> -#include <asm/system.h> +#include <asm/bfrom.h> -#if defined(BF537_FAMILY) || defined(BF533_FAMILY) || defined(BF527_FAMILY) -#define SYSCR_VAL 0x0 -#elif defined(BF561_FAMILY) -#define SYSCR_VAL 0x20 -#elif defined(BF548_FAMILY) -#define SYSCR_VAL 0x10 -#endif - -/* - * Delay min 5 SCLK cycles using worst case CCLK/SCLK ratio (15) - */ -#define SWRST_DELAY (5 * 15) - -/* A system soft reset makes external memory unusable - * so force this function into L1. +/* A system soft reset makes external memory unusable so force + * this function into L1. We use the compiler ssync here rather + * than SSYNC() because it's safe (no interrupts and such) and + * we save some L1. We do not need to force sanity in the SYSCR + * register as the BMODE selection bit is cleared by the soft + * reset while the Core B bit (on dual core parts) is cleared by + * the core reset. */ -__attribute__((l1_text)) -void bfin_reset(void) +__attribute__ ((__l1_text__, __noreturn__)) +static void bfin_reset(void) { - /* force BMODE and disable Core B (as needed) */ - bfin_write_SYSCR(SYSCR_VAL); +#ifndef CONFIG_BF60x + if (!ANOMALY_05000353 && !ANOMALY_05000386) + bfrom_SoftReset((void *)(L1_SCRATCH_START + L1_SCRATCH_LENGTH - 20)); + + /* Wait for completion of "system" events such as cache line + * line fills so that we avoid infinite stalls later on as + * much as possible. This code is in L1, so it won't trigger + * any such event after this point in time. + */ + __builtin_bfin_ssync(); - /* we use asm ssync here because it's save and we save some L1 */ - asm("ssync;"); + /* Initiate System software reset. */ + bfin_write_SWRST(0x7); - while (1) { - /* initiate system soft reset with magic 0x7 */ - bfin_write_SWRST(0x7); + /* Due to the way reset is handled in the hardware, we need + * to delay for 10 SCLKS. The only reliable way to do this is + * to calculate the CCLK/SCLK ratio and multiply 10. For now, + * we'll assume worse case which is a 1:15 ratio. + */ + asm( + "LSETUP (1f, 1f) LC0 = %0\n" + "1: nop;" + : + : "a" (15 * 10) + : "LC0", "LB0", "LT0" + ); - /* Wait for System reset to actually reset, needs to be 5 SCLKs, */ - /* Assume CCLK / SCLK ratio is worst case (15), and use 5*15 */ + /* Clear System software reset */ + bfin_write_SWRST(0); - asm("LSETUP(.Lfoo,.Lfoo) LC0 = %0\n .Lfoo: NOP;\n" - : : "a" (SWRST_DELAY) : "LC0", "LT0", "LB0"); + /* The BF526 ROM will crash during reset */ +#if defined(__ADSPBF522__) || defined(__ADSPBF524__) || defined(__ADSPBF526__) + /* Seems to be fixed with newer parts though ... */ + if (__SILICON_REVISION__ < 1 && bfin_revid() < 1) + bfin_read_SWRST(); +#endif + /* Wait for the SWRST write to complete. Cannot rely on SSYNC + * though as the System state is all reset now. + */ + asm( + "LSETUP (1f, 1f) LC1 = %0\n" + "1: nop;" + : + : "a" (15 * 1) + : "LC1", "LB1", "LT1" + ); - /* clear system soft reset */ - bfin_write_SWRST(0); - asm("ssync;"); - /* issue core reset */ + while (1) + /* Issue core reset */ asm("raise 1"); - } +#else + while (1) + bfin_write_RCU0_CTL(0x1); +#endif } __attribute__((weak)) @@ -62,8 +86,10 @@ void native_machine_restart(char *cmd) void machine_restart(char *cmd) { native_machine_restart(cmd); - local_irq_disable(); - bfin_reset(); + if (smp_processor_id()) + smp_call_function((void *)bfin_reset, 0, 1); + else + bfin_reset(); } __attribute__((weak)) diff --git a/arch/blackfin/kernel/setup.c b/arch/blackfin/kernel/setup.c index 2255c289a71..4f424ae3b36 100644 --- a/arch/blackfin/kernel/setup.c +++ b/arch/blackfin/kernel/setup.c @@ -1,9 +1,5 @@ /* - * arch/blackfin/kernel/setup.c - * - * Copyright 2004-2006 Analog Devices Inc. - * - * Enter bugs at http://blackfin.uclinux.org/ + * Copyright 2004-2010 Analog Devices Inc. * * Licensed under the GPL-2 or later. */ @@ -13,50 +9,65 @@ #include <linux/bootmem.h> #include <linux/seq_file.h> #include <linux/cpu.h> +#include <linux/mm.h> #include <linux/module.h> #include <linux/tty.h> #include <linux/pfn.h> +#ifdef CONFIG_MTD_UCLINUX +#include <linux/mtd/map.h> #include <linux/ext2_fs.h> -#include <linux/cramfs_fs.h> +#include <uapi/linux/cramfs_fs.h> #include <linux/romfs_fs.h> +#endif #include <asm/cplb.h> #include <asm/cacheflush.h> #include <asm/blackfin.h> #include <asm/cplbinit.h> +#include <asm/clocks.h> #include <asm/div64.h> +#include <asm/cpu.h> #include <asm/fixed_code.h> #include <asm/early_printk.h> - -static DEFINE_PER_CPU(struct cpu, cpu_devices); +#include <asm/irq_handler.h> +#include <asm/pda.h> +#ifdef CONFIG_BF60x +#include <mach/pm.h> +#endif +#ifdef CONFIG_SCB_PRIORITY +#include <asm/scb.h> +#endif u16 _bfin_swrst; EXPORT_SYMBOL(_bfin_swrst); unsigned long memory_start, memory_end, physical_mem_end; +unsigned long _rambase, _ramstart, _ramend; unsigned long reserved_mem_dcache_on; unsigned long reserved_mem_icache_on; EXPORT_SYMBOL(memory_start); EXPORT_SYMBOL(memory_end); EXPORT_SYMBOL(physical_mem_end); EXPORT_SYMBOL(_ramend); +EXPORT_SYMBOL(reserved_mem_dcache_on); #ifdef CONFIG_MTD_UCLINUX +extern struct map_info uclinux_ram_map; unsigned long memory_mtd_end, memory_mtd_start, mtd_size; -unsigned long _ebss; EXPORT_SYMBOL(memory_mtd_end); EXPORT_SYMBOL(memory_mtd_start); EXPORT_SYMBOL(mtd_size); #endif char __initdata command_line[COMMAND_LINE_SIZE]; +struct blackfin_initial_pda __initdata initial_pda; /* boot memmap, for parsing "memmap=" */ #define BFIN_MEMMAP_MAX 128 /* number of entries in bfin_memmap */ #define BFIN_MEMMAP_RAM 1 #define BFIN_MEMMAP_RESERVED 2 -struct bfin_memmap { +static struct bfin_memmap { int nr_map; struct bfin_memmap_entry { unsigned long long addr; /* start of memory segment */ @@ -75,62 +86,195 @@ static struct change_member *change_point[2*BFIN_MEMMAP_MAX] __initdata; static struct bfin_memmap_entry *overlap_list[BFIN_MEMMAP_MAX] __initdata; static struct bfin_memmap_entry new_map[BFIN_MEMMAP_MAX] __initdata; -void __init bf53x_cache_init(void) -{ +DEFINE_PER_CPU(struct blackfin_cpudata, cpu_data); + +static int early_init_clkin_hz(char *buf); + #if defined(CONFIG_BFIN_DCACHE) || defined(CONFIG_BFIN_ICACHE) - generate_cpl_tables(); +void __init generate_cplb_tables(void) +{ + unsigned int cpu; + + generate_cplb_tables_all(); + /* Generate per-CPU I&D CPLB tables */ + for (cpu = 0; cpu < num_possible_cpus(); ++cpu) + generate_cplb_tables_cpu(cpu); +} +#endif + +void bfin_setup_caches(unsigned int cpu) +{ +#ifdef CONFIG_BFIN_ICACHE + bfin_icache_init(icplb_tbl[cpu]); +#endif + +#ifdef CONFIG_BFIN_DCACHE + bfin_dcache_init(dcplb_tbl[cpu]); #endif + bfin_setup_cpudata(cpu); + + /* + * In cache coherence emulation mode, we need to have the + * D-cache enabled before running any atomic operation which + * might involve cache invalidation (i.e. spinlock, rwlock). + * So printk's are deferred until then. + */ #ifdef CONFIG_BFIN_ICACHE - bfin_icache_init(); - printk(KERN_INFO "Instruction Cache Enabled\n"); + printk(KERN_INFO "Instruction Cache Enabled for CPU%u\n", cpu); + printk(KERN_INFO " External memory:" +# ifdef CONFIG_BFIN_EXTMEM_ICACHEABLE + " cacheable" +# else + " uncacheable" +# endif + " in instruction cache\n"); + if (L2_LENGTH) + printk(KERN_INFO " L2 SRAM :" +# ifdef CONFIG_BFIN_L2_ICACHEABLE + " cacheable" +# else + " uncacheable" +# endif + " in instruction cache\n"); + +#else + printk(KERN_INFO "Instruction Cache Disabled for CPU%u\n", cpu); #endif #ifdef CONFIG_BFIN_DCACHE - bfin_dcache_init(); - printk(KERN_INFO "Data Cache Enabled" -# if defined CONFIG_BFIN_WB - " (write-back)" -# elif defined CONFIG_BFIN_WT - " (write-through)" + printk(KERN_INFO "Data Cache Enabled for CPU%u\n", cpu); + printk(KERN_INFO " External memory:" +# if defined CONFIG_BFIN_EXTMEM_WRITEBACK + " cacheable (write-back)" +# elif defined CONFIG_BFIN_EXTMEM_WRITETHROUGH + " cacheable (write-through)" +# else + " uncacheable" +# endif + " in data cache\n"); + if (L2_LENGTH) + printk(KERN_INFO " L2 SRAM :" +# if defined CONFIG_BFIN_L2_WRITEBACK + " cacheable (write-back)" +# elif defined CONFIG_BFIN_L2_WRITETHROUGH + " cacheable (write-through)" +# else + " uncacheable" # endif - "\n"); + " in data cache\n"); +#else + printk(KERN_INFO "Data Cache Disabled for CPU%u\n", cpu); #endif } -void __init bf53x_relocate_l1_mem(void) +void bfin_setup_cpudata(unsigned int cpu) { - unsigned long l1_code_length; - unsigned long l1_data_a_length; - unsigned long l1_data_b_length; + struct blackfin_cpudata *cpudata = &per_cpu(cpu_data, cpu); + + cpudata->imemctl = bfin_read_IMEM_CONTROL(); + cpudata->dmemctl = bfin_read_DMEM_CONTROL(); +} - l1_code_length = _etext_l1 - _stext_l1; - if (l1_code_length > L1_CODE_LENGTH) - l1_code_length = L1_CODE_LENGTH; - /* cannot complain as printk is not available as yet. - * But we can continue booting and complain later! +void __init bfin_cache_init(void) +{ +#if defined(CONFIG_BFIN_DCACHE) || defined(CONFIG_BFIN_ICACHE) + generate_cplb_tables(); +#endif + bfin_setup_caches(0); +} + +void __init bfin_relocate_l1_mem(void) +{ + unsigned long text_l1_len = (unsigned long)_text_l1_len; + unsigned long data_l1_len = (unsigned long)_data_l1_len; + unsigned long data_b_l1_len = (unsigned long)_data_b_l1_len; + unsigned long l2_len = (unsigned long)_l2_len; + + early_shadow_stamp(); + + /* + * due to the ALIGN(4) in the arch/blackfin/kernel/vmlinux.lds.S + * we know that everything about l1 text/data is nice and aligned, + * so copy by 4 byte chunks, and don't worry about overlapping + * src/dest. + * + * We can't use the dma_memcpy functions, since they can call + * scheduler functions which might be in L1 :( and core writes + * into L1 instruction cause bad access errors, so we are stuck, + * we are required to use DMA, but can't use the common dma + * functions. We can't use memcpy either - since that might be + * going to be in the relocated L1 */ - /* Copy _stext_l1 to _etext_l1 to L1 instruction SRAM */ - dma_memcpy(_stext_l1, _l1_lma_start, l1_code_length); + blackfin_dma_early_init(); - l1_data_a_length = _ebss_l1 - _sdata_l1; - if (l1_data_a_length > L1_DATA_A_LENGTH) - l1_data_a_length = L1_DATA_A_LENGTH; + /* if necessary, copy L1 text to L1 instruction SRAM */ + if (L1_CODE_LENGTH && text_l1_len) + early_dma_memcpy(_stext_l1, _text_l1_lma, text_l1_len); - /* Copy _sdata_l1 to _ebss_l1 to L1 data bank A SRAM */ - dma_memcpy(_sdata_l1, _l1_lma_start + l1_code_length, l1_data_a_length); + /* if necessary, copy L1 data to L1 data bank A SRAM */ + if (L1_DATA_A_LENGTH && data_l1_len) + early_dma_memcpy(_sdata_l1, _data_l1_lma, data_l1_len); - l1_data_b_length = _ebss_b_l1 - _sdata_b_l1; - if (l1_data_b_length > L1_DATA_B_LENGTH) - l1_data_b_length = L1_DATA_B_LENGTH; + /* if necessary, copy L1 data B to L1 data bank B SRAM */ + if (L1_DATA_B_LENGTH && data_b_l1_len) + early_dma_memcpy(_sdata_b_l1, _data_b_l1_lma, data_b_l1_len); - /* Copy _sdata_b_l1 to _ebss_b_l1 to L1 data bank B SRAM */ - dma_memcpy(_sdata_b_l1, _l1_lma_start + l1_code_length + - l1_data_a_length, l1_data_b_length); + early_dma_memcpy_done(); +#if defined(CONFIG_SMP) && defined(CONFIG_ICACHE_FLUSH_L1) + blackfin_iflush_l1_entry[0] = (unsigned long)blackfin_icache_flush_range_l1; +#endif + + /* if necessary, copy L2 text/data to L2 SRAM */ + if (L2_LENGTH && l2_len) + memcpy(_stext_l2, _l2_lma, l2_len); } +#ifdef CONFIG_SMP +void __init bfin_relocate_coreb_l1_mem(void) +{ + unsigned long text_l1_len = (unsigned long)_text_l1_len; + unsigned long data_l1_len = (unsigned long)_data_l1_len; + unsigned long data_b_l1_len = (unsigned long)_data_b_l1_len; + + blackfin_dma_early_init(); + + /* if necessary, copy L1 text to L1 instruction SRAM */ + if (L1_CODE_LENGTH && text_l1_len) + early_dma_memcpy((void *)COREB_L1_CODE_START, _text_l1_lma, + text_l1_len); + + /* if necessary, copy L1 data to L1 data bank A SRAM */ + if (L1_DATA_A_LENGTH && data_l1_len) + early_dma_memcpy((void *)COREB_L1_DATA_A_START, _data_l1_lma, + data_l1_len); + + /* if necessary, copy L1 data B to L1 data bank B SRAM */ + if (L1_DATA_B_LENGTH && data_b_l1_len) + early_dma_memcpy((void *)COREB_L1_DATA_B_START, _data_b_l1_lma, + data_b_l1_len); + + early_dma_memcpy_done(); + +#ifdef CONFIG_ICACHE_FLUSH_L1 + blackfin_iflush_l1_entry[1] = (unsigned long)blackfin_icache_flush_range_l1 - + (unsigned long)_stext_l1 + COREB_L1_CODE_START; +#endif +} +#endif + +#ifdef CONFIG_ROMKERNEL +void __init bfin_relocate_xip_data(void) +{ + early_shadow_stamp(); + + memcpy(_sdata, _data_lma, (unsigned long)_data_len - THREAD_SIZE + sizeof(struct thread_info)); + memcpy(_sinitdata, _init_data_lma, (unsigned long)_init_data_len); +} +#endif + /* add_memory_region to memmap */ static void __init add_memory_region(unsigned long long start, unsigned long long size, int type) @@ -217,7 +361,7 @@ static int __init sanitize_memmap(struct bfin_memmap_entry *map, int *pnr_map) /* record all known change-points (starting and ending addresses), omitting those that are for empty memory regions */ chgidx = 0; - for (i = 0; i < old_nr; i++) { + for (i = 0; i < old_nr; i++) { if (map[i].size != 0) { change_point[chgidx]->addr = map[i].addr; change_point[chgidx++]->pentry = &map[i]; @@ -225,13 +369,13 @@ static int __init sanitize_memmap(struct bfin_memmap_entry *map, int *pnr_map) change_point[chgidx++]->pentry = &map[i]; } } - chg_nr = chgidx; /* true number of change-points */ + chg_nr = chgidx; /* true number of change-points */ /* sort change-point list by memory addresses (low -> high) */ still_changing = 1; - while (still_changing) { + while (still_changing) { still_changing = 0; - for (i = 1; i < chg_nr; i++) { + for (i = 1; i < chg_nr; i++) { /* if <current_addr> > <last_addr>, swap */ /* or, if current=<start_addr> & last=<end_addr>, swap */ if ((change_point[i]->addr < change_point[i-1]->addr) || @@ -248,10 +392,10 @@ static int __init sanitize_memmap(struct bfin_memmap_entry *map, int *pnr_map) } /* create a new memmap, removing overlaps */ - overlap_entries = 0; /* number of entries in the overlap table */ - new_entry = 0; /* index for creating new memmap entries */ - last_type = 0; /* start with undefined memory type */ - last_addr = 0; /* start with 0 as last starting address */ + overlap_entries = 0; /* number of entries in the overlap table */ + new_entry = 0; /* index for creating new memmap entries */ + last_type = 0; /* start with undefined memory type */ + last_addr = 0; /* start with 0 as last starting address */ /* loop through change-points, determining affect on the new memmap */ for (chgidx = 0; chgidx < chg_nr; chgidx++) { /* keep track of all overlapping memmap entries */ @@ -273,14 +417,14 @@ static int __init sanitize_memmap(struct bfin_memmap_entry *map, int *pnr_map) if (overlap_list[i]->type > current_type) current_type = overlap_list[i]->type; /* continue building up new memmap based on this information */ - if (current_type != last_type) { + if (current_type != last_type) { if (last_type != 0) { new_map[new_entry].size = change_point[chgidx]->addr - last_addr; /* move forward only if the new size was non-zero */ if (new_map[new_entry].size != 0) if (++new_entry >= BFIN_MEMMAP_MAX) - break; /* no more space left for new entries */ + break; /* no more space left for new entries */ } if (current_type != 0) { new_map[new_entry].addr = change_point[chgidx]->addr; @@ -290,9 +434,9 @@ static int __init sanitize_memmap(struct bfin_memmap_entry *map, int *pnr_map) last_type = current_type; } } - new_nr = new_entry; /* retain count for new entries */ + new_nr = new_entry; /* retain count for new entries */ - /* copy new mapping into original location */ + /* copy new mapping into original location */ memcpy(map, new_map, new_nr*sizeof(struct bfin_memmap_entry)); *pnr_map = new_nr; @@ -309,13 +453,14 @@ static void __init print_memory_map(char *who) bfin_memmap.map[i].addr + bfin_memmap.map[i].size); switch (bfin_memmap.map[i].type) { case BFIN_MEMMAP_RAM: - printk("(usable)\n"); - break; + printk(KERN_CONT "(usable)\n"); + break; case BFIN_MEMMAP_RESERVED: - printk("(reserved)\n"); - break; - default: printk("type %lu\n", bfin_memmap.map[i].type); - break; + printk(KERN_CONT "(reserved)\n"); + break; + default: + printk(KERN_CONT "type %lu\n", bfin_memmap.map[i].type); + break; } } } @@ -348,7 +493,6 @@ static __init int parse_memmap(char *arg) * - "memmap=XXX[KkmM][@][$]XXX[KkmM]" defines a memory region * @ from <start> to <start>+<mem>, type RAM * $ from <start> to <start>+<mem>, type RESERVED - * */ static __init void parse_cmdline_early(char *cmdline_p) { @@ -370,17 +514,20 @@ static __init void parse_cmdline_early(char *cmdline_p) if (*to != ' ') { if (*to == '$' || *(to + 1) == '$') - reserved_mem_dcache_on = - 1; + reserved_mem_dcache_on = 1; if (*to == '#' || *(to + 1) == '#') - reserved_mem_icache_on = - 1; + reserved_mem_icache_on = 1; } } + } else if (!memcmp(to, "clkin_hz=", 9)) { + to += 9; + early_init_clkin_hz(to); +#ifdef CONFIG_EARLY_PRINTK } else if (!memcmp(to, "earlyprintk=", 12)) { to += 12; setup_early_printk(to); +#endif } else if (!memcmp(to, "memmap=", 7)) { to += 7; parse_memmap(to); @@ -399,31 +546,46 @@ static __init void parse_cmdline_early(char *cmdline_p) * [_rambase, _ramstart]: kernel image * [memory_start, memory_end]: dynamic memory managed by kernel * [memory_end, _ramend]: reserved memory - * [meory_mtd_start(memory_end), + * [memory_mtd_start(memory_end), * memory_mtd_start + mtd_size]: rootfs (if any) * [_ramend - DMA_UNCACHED_REGION, * _ramend]: uncached DMA region * [_ramend, physical_mem_end]: memory not managed by kernel - * */ -static __init void memory_setup(void) +static __init void memory_setup(void) { #ifdef CONFIG_MTD_UCLINUX unsigned long mtd_phys = 0; #endif + unsigned long max_mem; - _rambase = (unsigned long)_stext; + _rambase = CONFIG_BOOT_LOAD; _ramstart = (unsigned long)_end; if (DMA_UNCACHED_REGION > (_ramend - _ramstart)) { console_init(); - panic("DMA region exceeds memory limit: %lu.\n", + panic("DMA region exceeds memory limit: %lu.", _ramend - _ramstart); } - memory_end = _ramend - DMA_UNCACHED_REGION; + max_mem = memory_end = _ramend - DMA_UNCACHED_REGION; + +#if (defined(CONFIG_BFIN_EXTMEM_ICACHEABLE) && ANOMALY_05000263) + /* Due to a Hardware Anomaly we need to limit the size of usable + * instruction memory to max 60MB, 56 if HUNT_FOR_ZERO is on + * 05000263 - Hardware loop corrupted when taking an ICPLB exception + */ +# if (defined(CONFIG_DEBUG_HUNT_FOR_ZERO)) + if (max_mem >= 56 * 1024 * 1024) + max_mem = 56 * 1024 * 1024; +# else + if (max_mem >= 60 * 1024 * 1024) + max_mem = 60 * 1024 * 1024; +# endif /* CONFIG_DEBUG_HUNT_FOR_ZERO */ +#endif /* ANOMALY_05000263 */ + #ifdef CONFIG_MPU - /* Round up to multiple of 4MB. */ + /* Round up to multiple of 4MB */ memory_start = (_ramstart + 0x3fffff) & ~0x3fffff; #else memory_start = PAGE_ALIGN(_ramstart); @@ -449,61 +611,56 @@ static __init void memory_setup(void) # if defined(CONFIG_ROMFS_FS) if (((unsigned long *)mtd_phys)[0] == ROMSB_WORD0 - && ((unsigned long *)mtd_phys)[1] == ROMSB_WORD1) + && ((unsigned long *)mtd_phys)[1] == ROMSB_WORD1) { mtd_size = PAGE_ALIGN(be32_to_cpu(((unsigned long *)mtd_phys)[2])); -# if (defined(CONFIG_BFIN_ICACHE) && ANOMALY_05000263) - /* Due to a Hardware Anomaly we need to limit the size of usable - * instruction memory to max 60MB, 56 if HUNT_FOR_ZERO is on - * 05000263 - Hardware loop corrupted when taking an ICPLB exception - */ -# if (defined(CONFIG_DEBUG_HUNT_FOR_ZERO)) - if (memory_end >= 56 * 1024 * 1024) - memory_end = 56 * 1024 * 1024; -# else - if (memory_end >= 60 * 1024 * 1024) - memory_end = 60 * 1024 * 1024; -# endif /* CONFIG_DEBUG_HUNT_FOR_ZERO */ -# endif /* ANOMALY_05000263 */ -# endif /* CONFIG_ROMFS_FS */ - - memory_end -= mtd_size; - if (mtd_size == 0) { - console_init(); - panic("Don't boot kernel without rootfs attached.\n"); + /* ROM_FS is XIP, so if we found it, we need to limit memory */ + if (memory_end > max_mem) { + pr_info("Limiting kernel memory to %liMB due to anomaly 05000263\n", + (max_mem - CONFIG_PHY_RAM_BASE_ADDRESS) >> 20); + memory_end = max_mem; + } } +# endif /* CONFIG_ROMFS_FS */ - /* Relocate MTD image to the top of memory after the uncached memory area */ - dma_memcpy((char *)memory_end, _end, mtd_size); - - memory_mtd_start = memory_end; - _ebss = memory_mtd_start; /* define _ebss for compatible */ + /* Since the default MTD_UCLINUX has no magic number, we just blindly + * read 8 past the end of the kernel's image, and look at it. + * When no image is attached, mtd_size is set to a random number + * Do some basic sanity checks before operating on things + */ + if (mtd_size == 0 || memory_end <= mtd_size) { + pr_emerg("Could not find valid ram mtd attached.\n"); + } else { + memory_end -= mtd_size; + + /* Relocate MTD image to the top of memory after the uncached memory area */ + uclinux_ram_map.phys = memory_mtd_start = memory_end; + uclinux_ram_map.size = mtd_size; + pr_info("Found mtd parition at 0x%p, (len=0x%lx), moving to 0x%p\n", + _end, mtd_size, (void *)memory_mtd_start); + dma_memcpy((void *)uclinux_ram_map.phys, _end, uclinux_ram_map.size); + } #endif /* CONFIG_MTD_UCLINUX */ -#if (defined(CONFIG_BFIN_ICACHE) && ANOMALY_05000263) - /* Due to a Hardware Anomaly we need to limit the size of usable - * instruction memory to max 60MB, 56 if HUNT_FOR_ZERO is on - * 05000263 - Hardware loop corrupted when taking an ICPLB exception + /* We need lo limit memory, since everything could have a text section + * of userspace in it, and expose anomaly 05000263. If the anomaly + * doesn't exist, or we don't need to - then dont. */ -#if (defined(CONFIG_DEBUG_HUNT_FOR_ZERO)) - if (memory_end >= 56 * 1024 * 1024) - memory_end = 56 * 1024 * 1024; -#else - if (memory_end >= 60 * 1024 * 1024) - memory_end = 60 * 1024 * 1024; -#endif /* CONFIG_DEBUG_HUNT_FOR_ZERO */ - printk(KERN_NOTICE "Warning: limiting memory to %liMB due to hardware anomaly 05000263\n", memory_end >> 20); -#endif /* ANOMALY_05000263 */ + if (memory_end > max_mem) { + pr_info("Limiting kernel memory to %liMB due to anomaly 05000263\n", + (max_mem - CONFIG_PHY_RAM_BASE_ADDRESS) >> 20); + memory_end = max_mem; + } #ifdef CONFIG_MPU +#if defined(CONFIG_ROMFS_ON_MTD) && defined(CONFIG_MTD_ROM) + page_mask_nelts = (((_ramend + ASYNC_BANK3_BASE + ASYNC_BANK3_SIZE - + ASYNC_BANK0_BASE) >> PAGE_SHIFT) + 31) / 32; +#else page_mask_nelts = ((_ramend >> PAGE_SHIFT) + 31) / 32; - page_mask_order = get_order(3 * page_mask_nelts * sizeof(long)); #endif - -#if !defined(CONFIG_MTD_UCLINUX) - /*In case there is no valid CPLB behind memory_end make sure we don't get to close*/ - memory_end -= SIZE_4K; + page_mask_order = get_order(3 * page_mask_nelts * sizeof(long)); #endif init_mm.start_code = (unsigned long)_stext; @@ -511,23 +668,23 @@ static __init void memory_setup(void) init_mm.end_data = (unsigned long)_edata; init_mm.brk = (unsigned long)0; - printk(KERN_INFO "Board Memory: %ldMB\n", physical_mem_end >> 20); - printk(KERN_INFO "Kernel Managed Memory: %ldMB\n", _ramend >> 20); + printk(KERN_INFO "Board Memory: %ldMB\n", (physical_mem_end - CONFIG_PHY_RAM_BASE_ADDRESS) >> 20); + printk(KERN_INFO "Kernel Managed Memory: %ldMB\n", (_ramend - CONFIG_PHY_RAM_BASE_ADDRESS) >> 20); printk(KERN_INFO "Memory map:\n" - KERN_INFO " fixedcode = 0x%p-0x%p\n" - KERN_INFO " text = 0x%p-0x%p\n" - KERN_INFO " rodata = 0x%p-0x%p\n" - KERN_INFO " bss = 0x%p-0x%p\n" - KERN_INFO " data = 0x%p-0x%p\n" - KERN_INFO " stack = 0x%p-0x%p\n" - KERN_INFO " init = 0x%p-0x%p\n" - KERN_INFO " available = 0x%p-0x%p\n" + " fixedcode = 0x%p-0x%p\n" + " text = 0x%p-0x%p\n" + " rodata = 0x%p-0x%p\n" + " bss = 0x%p-0x%p\n" + " data = 0x%p-0x%p\n" + " stack = 0x%p-0x%p\n" + " init = 0x%p-0x%p\n" + " available = 0x%p-0x%p\n" #ifdef CONFIG_MTD_UCLINUX - KERN_INFO " rootfs = 0x%p-0x%p\n" + " rootfs = 0x%p-0x%p\n" #endif #if DMA_UNCACHED_REGION > 0 - KERN_INFO " DMA Zone = 0x%p-0x%p\n" + " DMA Zone = 0x%p-0x%p\n" #endif , (void *)FIXED_CODE_START, (void *)FIXED_CODE_END, _stext, _etext, @@ -535,7 +692,7 @@ static __init void memory_setup(void) __bss_start, __bss_stop, _sdata, _edata, (void *)&init_thread_union, - (void *)((int)(&init_thread_union) + 0x2000), + (void *)((int)(&init_thread_union) + THREAD_SIZE), __init_begin, __init_end, (void *)_ramstart, (void *)memory_end #ifdef CONFIG_MTD_UCLINUX @@ -547,11 +704,38 @@ static __init void memory_setup(void) ); } +/* + * Find the lowest, highest page frame number we have available + */ +void __init find_min_max_pfn(void) +{ + int i; + + max_pfn = 0; + min_low_pfn = PFN_DOWN(memory_end); + + for (i = 0; i < bfin_memmap.nr_map; i++) { + unsigned long start, end; + /* RAM? */ + if (bfin_memmap.map[i].type != BFIN_MEMMAP_RAM) + continue; + start = PFN_UP(bfin_memmap.map[i].addr); + end = PFN_DOWN(bfin_memmap.map[i].addr + + bfin_memmap.map[i].size); + if (start >= end) + continue; + if (end > max_pfn) + max_pfn = end; + if (start < min_low_pfn) + min_low_pfn = start; + } +} + static __init void setup_bootmem_allocator(void) { int bootmap_size; int i; - unsigned long min_pfn, max_pfn; + unsigned long start_pfn, end_pfn; unsigned long curr_pfn, last_pfn, size; /* mark memory between memory_start and memory_end usable */ @@ -561,16 +745,26 @@ static __init void setup_bootmem_allocator(void) sanitize_memmap(bfin_memmap.map, &bfin_memmap.nr_map); print_memory_map("boot memmap"); - min_pfn = PAGE_OFFSET >> PAGE_SHIFT; - max_pfn = memory_end >> PAGE_SHIFT; + /* initialize globals in linux/bootmem.h */ + find_min_max_pfn(); + /* pfn of the last usable page frame */ + if (max_pfn > memory_end >> PAGE_SHIFT) + max_pfn = memory_end >> PAGE_SHIFT; + /* pfn of last page frame directly mapped by kernel */ + max_low_pfn = max_pfn; + /* pfn of the first usable page frame after kernel image*/ + if (min_low_pfn < memory_start >> PAGE_SHIFT) + min_low_pfn = memory_start >> PAGE_SHIFT; + start_pfn = CONFIG_PHY_RAM_BASE_ADDRESS >> PAGE_SHIFT; + end_pfn = memory_end >> PAGE_SHIFT; /* - * give all the memory to the bootmap allocator, tell it to put the + * give all the memory to the bootmap allocator, tell it to put the * boot mem_map at the start of memory. */ bootmap_size = init_bootmem_node(NODE_DATA(0), memory_start >> PAGE_SHIFT, /* map goes here */ - min_pfn, max_pfn); + start_pfn, end_pfn); /* register the memmap regions with the bootmem allocator */ for (i = 0; i < bfin_memmap.nr_map; i++) { @@ -583,7 +777,7 @@ static __init void setup_bootmem_allocator(void) * We are rounding up the start address of usable memory: */ curr_pfn = PFN_UP(bfin_memmap.map[i].addr); - if (curr_pfn >= max_pfn) + if (curr_pfn >= end_pfn) continue; /* * ... and at the end of the usable range downwards: @@ -591,8 +785,8 @@ static __init void setup_bootmem_allocator(void) last_pfn = PFN_DOWN(bfin_memmap.map[i].addr + bfin_memmap.map[i].size); - if (last_pfn > max_pfn) - last_pfn = max_pfn; + if (last_pfn > end_pfn) + last_pfn = end_pfn; /* * .. finally, did all the rounding and playing @@ -606,14 +800,129 @@ static __init void setup_bootmem_allocator(void) } /* reserve memory before memory_start, including bootmap */ - reserve_bootmem(PAGE_OFFSET, - memory_start + bootmap_size + PAGE_SIZE - 1 - PAGE_OFFSET, + reserve_bootmem(CONFIG_PHY_RAM_BASE_ADDRESS, + memory_start + bootmap_size + PAGE_SIZE - 1 - CONFIG_PHY_RAM_BASE_ADDRESS, BOOTMEM_DEFAULT); } +#define EBSZ_TO_MEG(ebsz) \ +({ \ + int meg = 0; \ + switch (ebsz & 0xf) { \ + case 0x1: meg = 16; break; \ + case 0x3: meg = 32; break; \ + case 0x5: meg = 64; break; \ + case 0x7: meg = 128; break; \ + case 0x9: meg = 256; break; \ + case 0xb: meg = 512; break; \ + } \ + meg; \ +}) +static inline int __init get_mem_size(void) +{ +#if defined(EBIU_SDBCTL) +# if defined(BF561_FAMILY) + int ret = 0; + u32 sdbctl = bfin_read_EBIU_SDBCTL(); + ret += EBSZ_TO_MEG(sdbctl >> 0); + ret += EBSZ_TO_MEG(sdbctl >> 8); + ret += EBSZ_TO_MEG(sdbctl >> 16); + ret += EBSZ_TO_MEG(sdbctl >> 24); + return ret; +# else + return EBSZ_TO_MEG(bfin_read_EBIU_SDBCTL()); +# endif +#elif defined(EBIU_DDRCTL1) + u32 ddrctl = bfin_read_EBIU_DDRCTL1(); + int ret = 0; + switch (ddrctl & 0xc0000) { + case DEVSZ_64: + ret = 64 / 8; + break; + case DEVSZ_128: + ret = 128 / 8; + break; + case DEVSZ_256: + ret = 256 / 8; + break; + case DEVSZ_512: + ret = 512 / 8; + break; + } + switch (ddrctl & 0x30000) { + case DEVWD_4: + ret *= 2; + case DEVWD_8: + ret *= 2; + case DEVWD_16: + break; + } + if ((ddrctl & 0xc000) == 0x4000) + ret *= 2; + return ret; +#elif defined(CONFIG_BF60x) + u32 ddrctl = bfin_read_DMC0_CFG(); + int ret; + switch (ddrctl & 0xf00) { + case DEVSZ_64: + ret = 64 / 8; + break; + case DEVSZ_128: + ret = 128 / 8; + break; + case DEVSZ_256: + ret = 256 / 8; + break; + case DEVSZ_512: + ret = 512 / 8; + break; + case DEVSZ_1G: + ret = 1024 / 8; + break; + case DEVSZ_2G: + ret = 2048 / 8; + break; + } + return ret; +#endif + BUG(); +} + +__attribute__((weak)) +void __init native_machine_early_platform_add_devices(void) +{ +} + +#ifdef CONFIG_BF60x +static inline u_long bfin_get_clk(char *name) +{ + struct clk *clk; + u_long clk_rate; + + clk = clk_get(NULL, name); + if (IS_ERR(clk)) + return 0; + + clk_rate = clk_get_rate(clk); + clk_put(clk); + return clk_rate; +} +#endif + void __init setup_arch(char **cmdline_p) { - unsigned long l1_length, sclk, cclk; + u32 mmr; + unsigned long sclk, cclk; + + native_machine_early_platform_add_devices(); + + enable_shadow_console(); + + /* Check to make sure we are running on the right processor */ + mmr = bfin_cpuid(); + if (unlikely(CPUID != bfin_cpuid())) + printk(KERN_ERR "ERROR: Not running on ADSP-%s: unknown CPUID 0x%04x Rev 0.%d\n", + CPU, bfin_cpuid(), bfin_revid()); #ifdef CONFIG_DUMMY_CONSOLE conswitchp = &dummy_con; @@ -629,26 +938,50 @@ void __init setup_arch(char **cmdline_p) memcpy(boot_command_line, command_line, COMMAND_LINE_SIZE); boot_command_line[COMMAND_LINE_SIZE - 1] = '\0'; - /* setup memory defaults from the user config */ - physical_mem_end = 0; - _ramend = CONFIG_MEM_SIZE * 1024 * 1024; - memset(&bfin_memmap, 0, sizeof(bfin_memmap)); +#ifdef CONFIG_BF60x + /* Should init clock device before parse command early */ + clk_init(); +#endif + /* If the user does not specify things on the command line, use + * what the bootloader set things up as + */ + physical_mem_end = 0; parse_cmdline_early(&command_line[0]); + if (_ramend == 0) + _ramend = get_mem_size() * 1024 * 1024; + if (physical_mem_end == 0) physical_mem_end = _ramend; memory_setup(); +#ifndef CONFIG_BF60x + /* Initialize Async memory banks */ + bfin_write_EBIU_AMBCTL0(AMBCTL0VAL); + bfin_write_EBIU_AMBCTL1(AMBCTL1VAL); + bfin_write_EBIU_AMGCTL(AMGCTLVAL); +#ifdef CONFIG_EBIU_MBSCTLVAL + bfin_write_EBIU_MBSCTL(CONFIG_EBIU_MBSCTLVAL); + bfin_write_EBIU_MODE(CONFIG_EBIU_MODEVAL); + bfin_write_EBIU_FCTL(CONFIG_EBIU_FCTLVAL); +#endif +#endif +#ifdef CONFIG_BFIN_HYSTERESIS_CONTROL + bfin_write_PORTF_HYSTERESIS(HYST_PORTF_0_15); + bfin_write_PORTG_HYSTERESIS(HYST_PORTG_0_15); + bfin_write_PORTH_HYSTERESIS(HYST_PORTH_0_15); + bfin_write_MISCPORT_HYSTERESIS((bfin_read_MISCPORT_HYSTERESIS() & + ~HYST_NONEGPIO_MASK) | HYST_NONEGPIO); +#endif + cclk = get_cclk(); sclk = get_sclk(); -#if !defined(CONFIG_BFIN_KERNEL_CLOCK) - if (ANOMALY_05000273 && cclk == sclk) - panic("ANOMALY 05000273, SCLK can not be same as CCLK"); -#endif + if ((ANOMALY_05000273 || ANOMALY_05000274) && (cclk >> 1) < sclk) + panic("ANOMALY 05000273 or 05000274: CCLK must be >= 2*SCLK"); #ifdef BF561_FAMILY if (ANOMALY_05000266) { @@ -656,71 +989,93 @@ void __init setup_arch(char **cmdline_p) bfin_read_IMDMA_D1_IRQ_STATUS(); } #endif - printk(KERN_INFO "Hardware Trace "); - if (bfin_read_TBUFCTL() & 0x1) - printk("Active "); - else - printk("Off "); - if (bfin_read_TBUFCTL() & 0x2) - printk("and Enabled\n"); - else - printk("and Disabled\n"); -#if defined(CONFIG_CHR_DEV_FLASH) || defined(CONFIG_BLK_DEV_FLASH) - /* we need to initialize the Flashrom device here since we might - * do things with flash early on in the boot - */ - flash_probe(); + mmr = bfin_read_TBUFCTL(); + printk(KERN_INFO "Hardware Trace %s and %sabled\n", + (mmr & 0x1) ? "active" : "off", + (mmr & 0x2) ? "en" : "dis"); +#ifndef CONFIG_BF60x + mmr = bfin_read_SYSCR(); + printk(KERN_INFO "Boot Mode: %i\n", mmr & 0xF); + + /* Newer parts mirror SWRST bits in SYSCR */ +#if defined(CONFIG_BF53x) || defined(CONFIG_BF561) || \ + defined(CONFIG_BF538) || defined(CONFIG_BF539) + _bfin_swrst = bfin_read_SWRST(); +#else + /* Clear boot mode field */ + _bfin_swrst = mmr & ~0xf; #endif - _bfin_swrst = bfin_read_SWRST(); +#ifdef CONFIG_DEBUG_DOUBLEFAULT_PRINT + bfin_write_SWRST(_bfin_swrst & ~DOUBLE_FAULT); +#endif +#ifdef CONFIG_DEBUG_DOUBLEFAULT_RESET + bfin_write_SWRST(_bfin_swrst | DOUBLE_FAULT); +#endif - if (_bfin_swrst & RESET_DOUBLE) - printk(KERN_INFO "Recovering from Double Fault event\n"); - else if (_bfin_swrst & RESET_WDOG) +#ifdef CONFIG_SMP + if (_bfin_swrst & SWRST_DBL_FAULT_A) { +#else + if (_bfin_swrst & RESET_DOUBLE) { +#endif + printk(KERN_EMERG "Recovering from DOUBLE FAULT event\n"); +#ifdef CONFIG_DEBUG_DOUBLEFAULT + /* We assume the crashing kernel, and the current symbol table match */ + printk(KERN_EMERG " While handling exception (EXCAUSE = %#x) at %pF\n", + initial_pda.seqstat_doublefault & SEQSTAT_EXCAUSE, + initial_pda.retx_doublefault); + printk(KERN_NOTICE " DCPLB_FAULT_ADDR: %pF\n", + initial_pda.dcplb_doublefault_addr); + printk(KERN_NOTICE " ICPLB_FAULT_ADDR: %pF\n", + initial_pda.icplb_doublefault_addr); +#endif + printk(KERN_NOTICE " The instruction at %pF caused a double exception\n", + initial_pda.retx); + } else if (_bfin_swrst & RESET_WDOG) printk(KERN_INFO "Recovering from Watchdog event\n"); else if (_bfin_swrst & RESET_SOFTWARE) printk(KERN_NOTICE "Reset caused by Software reset\n"); - - printk(KERN_INFO "Blackfin support (C) 2004-2008 Analog Devices, Inc.\n"); +#endif + printk(KERN_INFO "Blackfin support (C) 2004-2010 Analog Devices, Inc.\n"); if (bfin_compiled_revid() == 0xffff) - printk(KERN_INFO "Compiled for ADSP-%s Rev any\n", CPU); + printk(KERN_INFO "Compiled for ADSP-%s Rev any, running on 0.%d\n", CPU, bfin_revid()); else if (bfin_compiled_revid() == -1) printk(KERN_INFO "Compiled for ADSP-%s Rev none\n", CPU); else printk(KERN_INFO "Compiled for ADSP-%s Rev 0.%d\n", CPU, bfin_compiled_revid()); - if (bfin_revid() != bfin_compiled_revid()) { - if (bfin_compiled_revid() == -1) - printk(KERN_ERR "Warning: Compiled for Rev none, but running on Rev %d\n", - bfin_revid()); - else if (bfin_compiled_revid() != 0xffff) - printk(KERN_ERR "Warning: Compiled for Rev %d, but running on Rev %d\n", - bfin_compiled_revid(), bfin_revid()); + + if (likely(CPUID == bfin_cpuid())) { + if (bfin_revid() != bfin_compiled_revid()) { + if (bfin_compiled_revid() == -1) + printk(KERN_ERR "Warning: Compiled for Rev none, but running on Rev %d\n", + bfin_revid()); + else if (bfin_compiled_revid() != 0xffff) { + printk(KERN_ERR "Warning: Compiled for Rev %d, but running on Rev %d\n", + bfin_compiled_revid(), bfin_revid()); + if (bfin_compiled_revid() > bfin_revid()) + panic("Error: you are missing anomaly workarounds for this rev"); + } + } + if (bfin_revid() < CONFIG_BF_REV_MIN || bfin_revid() > CONFIG_BF_REV_MAX) + printk(KERN_ERR "Warning: Unsupported Chip Revision ADSP-%s Rev 0.%d detected\n", + CPU, bfin_revid()); } - if (bfin_revid() < SUPPORTED_REVID) - printk(KERN_ERR "Warning: Unsupported Chip Revision ADSP-%s Rev 0.%d detected\n", - CPU, bfin_revid()); + printk(KERN_INFO "Blackfin Linux support by http://blackfin.uclinux.org/\n"); +#ifdef CONFIG_BF60x + printk(KERN_INFO "Processor Speed: %lu MHz core clock, %lu MHz SCLk, %lu MHz SCLK0, %lu MHz SCLK1 and %lu MHz DCLK\n", + cclk / 1000000, bfin_get_clk("SYSCLK") / 1000000, get_sclk0() / 1000000, get_sclk1() / 1000000, get_dclk() / 1000000); +#else printk(KERN_INFO "Processor Speed: %lu MHz core clock and %lu MHz System Clock\n", - cclk / 1000000, sclk / 1000000); - - if (ANOMALY_05000273 && (cclk >> 1) <= sclk) - printk("\n\n\nANOMALY_05000273: CCLK must be >= 2*SCLK !!!\n\n\n"); + cclk / 1000000, sclk / 1000000); +#endif setup_bootmem_allocator(); paging_init(); - /* check the size of the l1 area */ - l1_length = _etext_l1 - _stext_l1; - if (l1_length > L1_CODE_LENGTH) - panic("L1 code memory overflow\n"); - - l1_length = _ebss_l1 - _sdata_l1; - if (l1_length > L1_DATA_A_LENGTH) - panic("L1 data memory overflow\n"); - /* Copy atomic sequences to their fixed location, and sanity check that these locations are the ones that we advertise to userspace. */ memcpy((void *)FIXED_CODE_START, &fixed_code_start, @@ -744,18 +1099,22 @@ void __init setup_arch(char **cmdline_p) BUG_ON((char *)&safe_user_instruction - (char *)&fixed_code_start != SAFE_USER_INSTRUCTION - FIXED_CODE_START); +#ifdef CONFIG_SMP + platform_init_cpus(); +#endif init_exception_vectors(); - bf53x_cache_init(); + bfin_cache_init(); /* Initialize caches for the boot CPU */ +#ifdef CONFIG_SCB_PRIORITY + init_scb(); +#endif } static int __init topology_init(void) { - int cpu; + unsigned int cpu; for_each_possible_cpu(cpu) { - struct cpu *c = &per_cpu(cpu_devices, cpu); - - register_cpu(c, cpu); + register_cpu(&per_cpu(cpu_data, cpu).cpu, cpu); } return 0; @@ -763,52 +1122,129 @@ static int __init topology_init(void) subsys_initcall(topology_init); +/* Get the input clock frequency */ +static u_long cached_clkin_hz = CONFIG_CLKIN_HZ; +#ifndef CONFIG_BF60x +static u_long get_clkin_hz(void) +{ + return cached_clkin_hz; +} +#endif +static int __init early_init_clkin_hz(char *buf) +{ + cached_clkin_hz = simple_strtoul(buf, NULL, 0); +#ifdef BFIN_KERNEL_CLOCK + if (cached_clkin_hz != CONFIG_CLKIN_HZ) + panic("cannot change clkin_hz when reprogramming clocks"); +#endif + return 1; +} +early_param("clkin_hz=", early_init_clkin_hz); + +#ifndef CONFIG_BF60x +/* Get the voltage input multiplier */ static u_long get_vco(void) { - u_long msel; - u_long vco; + static u_long cached_vco; + u_long msel, pll_ctl; - msel = (bfin_read_PLL_CTL() >> 9) & 0x3F; + /* The assumption here is that VCO never changes at runtime. + * If, someday, we support that, then we'll have to change this. + */ + if (cached_vco) + return cached_vco; + + pll_ctl = bfin_read_PLL_CTL(); + msel = (pll_ctl >> 9) & 0x3F; if (0 == msel) msel = 64; - vco = CONFIG_CLKIN_HZ; - vco >>= (1 & bfin_read_PLL_CTL()); /* DF bit */ - vco = msel * vco; - return vco; + cached_vco = get_clkin_hz(); + cached_vco >>= (1 & pll_ctl); /* DF bit */ + cached_vco *= msel; + return cached_vco; } +#endif /* Get the Core clock */ u_long get_cclk(void) { +#ifdef CONFIG_BF60x + return bfin_get_clk("CCLK"); +#else + static u_long cached_cclk_pll_div, cached_cclk; u_long csel, ssel; + if (bfin_read_PLL_STAT() & 0x1) - return CONFIG_CLKIN_HZ; + return get_clkin_hz(); ssel = bfin_read_PLL_DIV(); + if (ssel == cached_cclk_pll_div) + return cached_cclk; + else + cached_cclk_pll_div = ssel; + csel = ((ssel >> 4) & 0x03); ssel &= 0xf; if (ssel && ssel < (1 << csel)) /* SCLK > CCLK */ - return get_vco() / ssel; - return get_vco() >> csel; + cached_cclk = get_vco() / ssel; + else + cached_cclk = get_vco() >> csel; + return cached_cclk; +#endif } EXPORT_SYMBOL(get_cclk); -/* Get the System clock */ +#ifdef CONFIG_BF60x +/* Get the bf60x clock of SCLK0 domain */ +u_long get_sclk0(void) +{ + return bfin_get_clk("SCLK0"); +} +EXPORT_SYMBOL(get_sclk0); + +/* Get the bf60x clock of SCLK1 domain */ +u_long get_sclk1(void) +{ + return bfin_get_clk("SCLK1"); +} +EXPORT_SYMBOL(get_sclk1); + +/* Get the bf60x DRAM clock */ +u_long get_dclk(void) +{ + return bfin_get_clk("DCLK"); +} +EXPORT_SYMBOL(get_dclk); +#endif + +/* Get the default system clock */ u_long get_sclk(void) { +#ifdef CONFIG_BF60x + return get_sclk0(); +#else + static u_long cached_sclk; u_long ssel; + /* The assumption here is that SCLK never changes at runtime. + * If, someday, we support that, then we'll have to change this. + */ + if (cached_sclk) + return cached_sclk; + if (bfin_read_PLL_STAT() & 0x1) - return CONFIG_CLKIN_HZ; + return get_clkin_hz(); - ssel = (bfin_read_PLL_DIV() & 0xf); + ssel = bfin_read_PLL_DIV() & 0xf; if (0 == ssel) { printk(KERN_WARNING "Invalid System Clock\n"); ssel = 1; } - return get_vco() / ssel; + cached_sclk = get_vco() / ssel; + return cached_sclk; +#endif } EXPORT_SYMBOL(get_sclk); @@ -835,17 +1271,18 @@ static int show_cpuinfo(struct seq_file *m, void *v) { char *cpu, *mmu, *fpu, *vendor, *cache; uint32_t revid; - - u_long cclk = 0, sclk = 0; - u_int dcache_size = 0, dsup_banks = 0; + int cpu_num = *(unsigned int *)v; + u_long sclk, cclk; + u_int icache_size = BFIN_ICACHESIZE / 1024, dcache_size = 0, dsup_banks = 0; + struct blackfin_cpudata *cpudata = &per_cpu(cpu_data, cpu_num); cpu = CPU; mmu = "none"; fpu = "none"; revid = bfin_revid(); - cclk = get_cclk(); sclk = get_sclk(); + cclk = get_cclk(); switch (bfin_read_CHIPID() & CHIPID_MANUFACTURE) { case 0xca: @@ -856,18 +1293,34 @@ static int show_cpuinfo(struct seq_file *m, void *v) break; } - seq_printf(m, "processor\t: %d\n" - "vendor_id\t: %s\n" - "cpu family\t: 0x%x\n" - "model name\t: ADSP-%s %lu(MHz CCLK) %lu(MHz SCLK)\n" - "stepping\t: %d\n", - 0, - vendor, - (bfin_read_CHIPID() & CHIPID_FAMILY), + seq_printf(m, "processor\t: %d\n" "vendor_id\t: %s\n", cpu_num, vendor); + + if (CPUID == bfin_cpuid()) + seq_printf(m, "cpu family\t: 0x%04x\n", CPUID); + else + seq_printf(m, "cpu family\t: Compiled for:0x%04x, running on:0x%04x\n", + CPUID, bfin_cpuid()); + + seq_printf(m, "model name\t: ADSP-%s %lu(MHz CCLK) %lu(MHz SCLK) (%s)\n" + "stepping\t: %d ", cpu, cclk/1000000, sclk/1000000, +#ifdef CONFIG_MPU + "mpu on", +#else + "mpu off", +#endif revid); - seq_printf(m, "cpu MHz\t\t: %lu.%03lu/%lu.%03lu\n", + if (bfin_revid() != bfin_compiled_revid()) { + if (bfin_compiled_revid() == -1) + seq_printf(m, "(Compiled for Rev none)"); + else if (bfin_compiled_revid() == 0xffff) + seq_printf(m, "(Compiled for Rev any)"); + else + seq_printf(m, "(Compiled for Rev %d)", bfin_compiled_revid()); + } + + seq_printf(m, "\ncpu MHz\t\t: %lu.%06lu/%lu.%06lu\n", cclk/1000000, cclk%1000000, sclk/1000000, sclk%1000000); seq_printf(m, "bogomips\t: %lu.%02lu\n" @@ -877,7 +1330,7 @@ static int show_cpuinfo(struct seq_file *m, void *v) (loops_per_jiffy * HZ)); /* Check Cache configutation */ - switch (bfin_read_DMEM_CONTROL() & (1 << DMC0_P | 1 << DMC1_P)) { + switch (cpudata->dmemctl & (1 << DMC0_P | 1 << DMC1_P)) { case ACACHE_BSRAM: cache = "dbank-A/B\t: cache/sram"; dcache_size = 16; @@ -901,98 +1354,98 @@ static int show_cpuinfo(struct seq_file *m, void *v) } /* Is it turned on? */ - if (!((bfin_read_DMEM_CONTROL()) & (ENDCPLB | DMC_ENABLE))) + if ((cpudata->dmemctl & (ENDCPLB | DMC_ENABLE)) != (ENDCPLB | DMC_ENABLE)) dcache_size = 0; + if ((cpudata->imemctl & (IMC | ENICPLB)) != (IMC | ENICPLB)) + icache_size = 0; + seq_printf(m, "cache size\t: %d KB(L1 icache) " - "%d KB(L1 dcache-%s) %d KB(L2 cache)\n", - BFIN_ICACHESIZE / 1024, dcache_size, -#if defined CONFIG_BFIN_WB - "wb" -#elif defined CONFIG_BFIN_WT - "wt" + "%d KB(L1 dcache) %d KB(L2 cache)\n", + icache_size, dcache_size, 0); + seq_printf(m, "%s\n", cache); + seq_printf(m, "external memory\t: " +#if defined(CONFIG_BFIN_EXTMEM_ICACHEABLE) + "cacheable" +#else + "uncacheable" #endif - "", 0); + " in instruction cache\n"); + seq_printf(m, "external memory\t: " +#if defined(CONFIG_BFIN_EXTMEM_WRITEBACK) + "cacheable (write-back)" +#elif defined(CONFIG_BFIN_EXTMEM_WRITETHROUGH) + "cacheable (write-through)" +#else + "uncacheable" +#endif + " in data cache\n"); - seq_printf(m, "%s\n", cache); + if (icache_size) + seq_printf(m, "icache setup\t: %d Sub-banks/%d Ways, %d Lines/Way\n", + BFIN_ISUBBANKS, BFIN_IWAYS, BFIN_ILINES); + else + seq_printf(m, "icache setup\t: off\n"); - seq_printf(m, "icache setup\t: %d Sub-banks/%d Ways, %d Lines/Way\n", - BFIN_ISUBBANKS, BFIN_IWAYS, BFIN_ILINES); seq_printf(m, "dcache setup\t: %d Super-banks/%d Sub-banks/%d Ways, %d Lines/Way\n", dsup_banks, BFIN_DSUBBANKS, BFIN_DWAYS, BFIN_DLINES); -#ifdef CONFIG_BFIN_ICACHE_LOCK - switch (read_iloc()) { - case WAY0_L: - seq_printf(m, "Way0 Locked-Down\n"); - break; - case WAY1_L: - seq_printf(m, "Way1 Locked-Down\n"); - break; - case WAY01_L: - seq_printf(m, "Way0,Way1 Locked-Down\n"); - break; - case WAY2_L: - seq_printf(m, "Way2 Locked-Down\n"); - break; - case WAY02_L: - seq_printf(m, "Way0,Way2 Locked-Down\n"); - break; - case WAY12_L: - seq_printf(m, "Way1,Way2 Locked-Down\n"); - break; - case WAY012_L: - seq_printf(m, "Way0,Way1 & Way2 Locked-Down\n"); - break; - case WAY3_L: - seq_printf(m, "Way3 Locked-Down\n"); - break; - case WAY03_L: - seq_printf(m, "Way0,Way3 Locked-Down\n"); - break; - case WAY13_L: - seq_printf(m, "Way1,Way3 Locked-Down\n"); - break; - case WAY013_L: - seq_printf(m, "Way 0,Way1,Way3 Locked-Down\n"); - break; - case WAY32_L: - seq_printf(m, "Way3,Way2 Locked-Down\n"); - break; - case WAY320_L: - seq_printf(m, "Way3,Way2,Way0 Locked-Down\n"); - break; - case WAY321_L: - seq_printf(m, "Way3,Way2,Way1 Locked-Down\n"); - break; - case WAYALL_L: - seq_printf(m, "All Ways are locked\n"); - break; - default: - seq_printf(m, "No Ways are locked\n"); - } +#ifdef __ARCH_SYNC_CORE_DCACHE + seq_printf(m, "dcache flushes\t: %lu\n", dcache_invld_count[cpu_num]); +#endif +#ifdef __ARCH_SYNC_CORE_ICACHE + seq_printf(m, "icache flushes\t: %lu\n", icache_invld_count[cpu_num]); #endif + seq_printf(m, "\n"); + + if (cpu_num != num_possible_cpus() - 1) + return 0; + + if (L2_LENGTH) { + seq_printf(m, "L2 SRAM\t\t: %dKB\n", L2_LENGTH/0x400); + seq_printf(m, "L2 SRAM\t\t: " +#if defined(CONFIG_BFIN_L2_ICACHEABLE) + "cacheable" +#else + "uncacheable" +#endif + " in instruction cache\n"); + seq_printf(m, "L2 SRAM\t\t: " +#if defined(CONFIG_BFIN_L2_WRITEBACK) + "cacheable (write-back)" +#elif defined(CONFIG_BFIN_L2_WRITETHROUGH) + "cacheable (write-through)" +#else + "uncacheable" +#endif + " in data cache\n"); + } seq_printf(m, "board name\t: %s\n", bfin_board_name); - seq_printf(m, "board memory\t: %ld kB (0x%p -> 0x%p)\n", - physical_mem_end >> 10, (void *)0, (void *)physical_mem_end); - seq_printf(m, "kernel memory\t: %d kB (0x%p -> 0x%p)\n", - ((int)memory_end - (int)_stext) >> 10, - _stext, - (void *)memory_end); + seq_printf(m, "board memory\t: %ld kB (0x%08lx -> 0x%08lx)\n", + physical_mem_end >> 10, 0ul, physical_mem_end); + seq_printf(m, "kernel memory\t: %d kB (0x%08lx -> 0x%08lx)\n", + ((int)memory_end - (int)_rambase) >> 10, + _rambase, memory_end); return 0; } static void *c_start(struct seq_file *m, loff_t *pos) { - return *pos < NR_CPUS ? ((void *)0x12345678) : NULL; + if (*pos == 0) + *pos = cpumask_first(cpu_online_mask); + if (*pos >= num_online_cpus()) + return NULL; + + return pos; } static void *c_next(struct seq_file *m, void *v, loff_t *pos) { - ++*pos; + *pos = cpumask_next(*pos, cpu_online_mask); + return c_start(m, pos); } @@ -1009,6 +1462,7 @@ const struct seq_operations cpuinfo_op = { void __init cmdline_init(const char *r0) { + early_shadow_stamp(); if (r0) strncpy(command_line, r0, COMMAND_LINE_SIZE); } diff --git a/arch/blackfin/kernel/shadow_console.c b/arch/blackfin/kernel/shadow_console.c new file mode 100644 index 00000000000..aeb8343eeb0 --- /dev/null +++ b/arch/blackfin/kernel/shadow_console.c @@ -0,0 +1,111 @@ +/* + * manage a small early shadow of the log buffer which we can pass between the + * bootloader so early crash messages are communicated properly and easily + * + * Copyright 2009 Analog Devices Inc. + * + * Licensed under the GPL-2 or later. + */ + +#include <linux/kernel.h> +#include <linux/init.h> +#include <linux/console.h> +#include <linux/string.h> +#include <asm/blackfin.h> +#include <asm/irq_handler.h> +#include <asm/early_printk.h> + +#define SHADOW_CONSOLE_START (CONFIG_PHY_RAM_BASE_ADDRESS + 0x500) +#define SHADOW_CONSOLE_END (CONFIG_PHY_RAM_BASE_ADDRESS + 0x1000) +#define SHADOW_CONSOLE_MAGIC_LOC (CONFIG_PHY_RAM_BASE_ADDRESS + 0x4F0) +#define SHADOW_CONSOLE_MAGIC (0xDEADBEEF) + +static __initdata char *shadow_console_buffer = (char *)SHADOW_CONSOLE_START; + +__init void early_shadow_write(struct console *con, const char *s, + unsigned int n) +{ + unsigned int i; + /* + * save 2 bytes for the double null at the end + * once we fail on a long line, make sure we don't write a short line afterwards + */ + if ((shadow_console_buffer + n) <= (char *)(SHADOW_CONSOLE_END - 2)) { + /* can't use memcpy - it may not be relocated yet */ + for (i = 0; i <= n; i++) + shadow_console_buffer[i] = s[i]; + shadow_console_buffer += n; + shadow_console_buffer[0] = 0; + shadow_console_buffer[1] = 0; + } else + shadow_console_buffer = (char *)SHADOW_CONSOLE_END; +} + +static __initdata struct console early_shadow_console = { + .name = "early_shadow", + .write = early_shadow_write, + .flags = CON_BOOT | CON_PRINTBUFFER, + .index = -1, + .device = 0, +}; + +__init int shadow_console_enabled(void) +{ + return early_shadow_console.flags & CON_ENABLED; +} + +__init void mark_shadow_error(void) +{ + int *loc = (int *)SHADOW_CONSOLE_MAGIC_LOC; + loc[0] = SHADOW_CONSOLE_MAGIC; + loc[1] = SHADOW_CONSOLE_START; +} + +__init void enable_shadow_console(void) +{ + if (!shadow_console_enabled()) { + register_console(&early_shadow_console); + /* for now, assume things are going to fail */ + mark_shadow_error(); + } +} + +static __init int disable_shadow_console(void) +{ + /* + * by the time pure_initcall runs, the standard console is enabled, + * and the early_console is off, so unset the magic numbers + * unregistering the console is taken care of in common code (See + * ./kernel/printk:disable_boot_consoles() ) + */ + int *loc = (int *)SHADOW_CONSOLE_MAGIC_LOC; + + loc[0] = 0; + + return 0; +} +pure_initcall(disable_shadow_console); + +/* + * since we can't use printk, dump numbers (as hex), n = # bits + */ +__init void early_shadow_reg(unsigned long reg, unsigned int n) +{ + /* + * can't use any "normal" kernel features, since thay + * may not be relocated to their execute address yet + */ + int i; + char ascii[11] = " 0x"; + + n = n / 4; + reg = reg << ((8 - n) * 4); + n += 3; + + for (i = 3; i <= n ; i++) { + ascii[i] = hex_asc_lo(reg >> 28); + reg <<= 4; + } + early_shadow_write(NULL, ascii, n); + +} diff --git a/arch/blackfin/kernel/signal.c b/arch/blackfin/kernel/signal.c index 5564c9588aa..b022af6c48f 100644 --- a/arch/blackfin/kernel/signal.c +++ b/arch/blackfin/kernel/signal.c @@ -1,30 +1,7 @@ /* - * File: arch/blackfin/kernel/signal.c - * Based on: - * Author: + * Copyright 2004-2010 Analog Devices Inc. * - * Created: - * Description: - * - * Modified: - * Copyright 2004-2006 Analog Devices Inc. - * - * Bugs: Enter bugs at http://blackfin.uclinux.org/ - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, see the file COPYING, or write - * to the Free Software Foundation, Inc., - * 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA + * Licensed under the GPL-2 or later */ #include <linux/signal.h> @@ -33,13 +10,16 @@ #include <linux/tty.h> #include <linux/personality.h> #include <linux/binfmts.h> -#include <linux/freezer.h> #include <linux/uaccess.h> +#include <linux/tracehook.h> #include <asm/cacheflush.h> #include <asm/ucontext.h> +#include <asm/fixed_code.h> +#include <asm/syscall.h> -#define _BLOCKABLE (~(sigmask(SIGKILL) | sigmask(SIGSTOP))) +/* Location of the trace bit in SYSCFG. */ +#define TRACE_BITS 0x0001 struct fdpic_func_descriptor { unsigned long text; @@ -50,22 +30,22 @@ struct rt_sigframe { int sig; struct siginfo *pinfo; void *puc; + /* This is no longer needed by the kernel, but unfortunately userspace + * code expects it to be there. */ char retcode[8]; struct siginfo info; struct ucontext uc; }; -asmlinkage int sys_sigaltstack(const stack_t * uss, stack_t * uoss) -{ - return do_sigaltstack(uss, uoss, rdusp()); -} - static inline int -rt_restore_sigcontext(struct pt_regs *regs, struct sigcontext *sc, int *pr0) +rt_restore_sigcontext(struct pt_regs *regs, struct sigcontext __user *sc, int *pr0) { unsigned long usp = 0; int err = 0; + /* Always make any pending restarted system calls return -EINTR */ + current_thread_info()->restart_block.fn = do_no_restart_syscall; + #define RESTORE(x) err |= __get_user(regs->x, &sc->sc_##x) /* restore passed registers */ @@ -97,9 +77,9 @@ rt_restore_sigcontext(struct pt_regs *regs, struct sigcontext *sc, int *pr0) return err; } -asmlinkage int do_rt_sigreturn(unsigned long __unused) +asmlinkage int sys_rt_sigreturn(void) { - struct pt_regs *regs = (struct pt_regs *)__unused; + struct pt_regs *regs = current_pt_regs(); unsigned long usp = rdusp(); struct rt_sigframe *frame = (struct rt_sigframe *)(usp); sigset_t set; @@ -110,16 +90,12 @@ asmlinkage int do_rt_sigreturn(unsigned long __unused) if (__copy_from_user(&set, &frame->uc.uc_sigmask, sizeof(set))) goto badframe; - sigdelsetmask(&set, ~_BLOCKABLE); - spin_lock_irq(¤t->sighand->siglock); - current->blocked = set; - recalc_sigpending(); - spin_unlock_irq(¤t->sighand->siglock); + set_current_blocked(&set); if (rt_restore_sigcontext(regs, &frame->uc.uc_mcontext, &r0)) goto badframe; - if (do_sigaltstack(&frame->uc.uc_stack, NULL, regs->usp) == -EFAULT) + if (restore_altstack(&frame->uc.uc_stack)) goto badframe; return r0; @@ -159,11 +135,6 @@ static inline int rt_setup_sigcontext(struct sigcontext *sc, struct pt_regs *reg return err; } -static inline void push_cache(unsigned long vaddr, unsigned int len) -{ - flush_icache_range(vaddr, vaddr + len); -} - static inline void *get_sigframe(struct k_sigaction *ka, struct pt_regs *regs, size_t frame_size) { @@ -202,48 +173,34 @@ setup_rt_frame(int sig, struct k_sigaction *ka, siginfo_t * info, /* Create the ucontext. */ err |= __put_user(0, &frame->uc.uc_flags); err |= __put_user(0, &frame->uc.uc_link); - err |= - __put_user((void *)current->sas_ss_sp, &frame->uc.uc_stack.ss_sp); - err |= __put_user(sas_ss_flags(rdusp()), &frame->uc.uc_stack.ss_flags); - err |= __put_user(current->sas_ss_size, &frame->uc.uc_stack.ss_size); + err |= __save_altstack(&frame->uc.uc_stack, rdusp()); err |= rt_setup_sigcontext(&frame->uc.uc_mcontext, regs); err |= copy_to_user(&frame->uc.uc_sigmask, set, sizeof(*set)); - /* Set up to return from userspace. */ - err |= __put_user(0x28, &(frame->retcode[0])); - err |= __put_user(0xe1, &(frame->retcode[1])); - err |= __put_user(0xad, &(frame->retcode[2])); - err |= __put_user(0x00, &(frame->retcode[3])); - err |= __put_user(0xa0, &(frame->retcode[4])); - err |= __put_user(0x00, &(frame->retcode[5])); - if (err) - goto give_sigsegv; - - push_cache((unsigned long)&frame->retcode, sizeof(frame->retcode)); + return -EFAULT; /* Set up registers for signal handler */ - wrusp((unsigned long)frame); - if (get_personality & FDPIC_FUNCPTRS) { + if (current->personality & FDPIC_FUNCPTRS) { struct fdpic_func_descriptor __user *funcptr = (struct fdpic_func_descriptor *) ka->sa.sa_handler; - __get_user(regs->pc, &funcptr->text); - __get_user(regs->p3, &funcptr->GOT); + u32 pc, p3; + err |= __get_user(pc, &funcptr->text); + err |= __get_user(p3, &funcptr->GOT); + if (err) + return -EFAULT; + regs->pc = pc; + regs->p3 = p3; } else regs->pc = (unsigned long)ka->sa.sa_handler; - regs->rets = (unsigned long)(frame->retcode); + wrusp((unsigned long)frame); + regs->rets = SIGRETURN_STUB; regs->r0 = frame->sig; regs->r1 = (unsigned long)(&frame->info); regs->r2 = (unsigned long)(&frame->uc); return 0; - - give_sigsegv: - if (sig == SIGSEGV) - ka->sa.sa_handler = SIG_DFL; - force_sig(SIGSEGV, current); - return -EFAULT; } static inline void @@ -268,36 +225,32 @@ handle_restart(struct pt_regs *regs, struct k_sigaction *ka, int has_handler) regs->r0 = regs->orig_r0; regs->pc -= 2; break; + + case -ERESTART_RESTARTBLOCK: + regs->p0 = __NR_restart_syscall; + regs->pc -= 2; + break; } } /* * OK, we're invoking a handler */ -static int +static void handle_signal(int sig, siginfo_t *info, struct k_sigaction *ka, - sigset_t *oldset, struct pt_regs *regs) + struct pt_regs *regs) { - int ret; - /* are we from a system call? to see pt_regs->orig_p0 */ if (regs->orig_p0 >= 0) /* If so, check system call restarting.. */ handle_restart(regs, ka, 1); /* set up the stack frame */ - ret = setup_rt_frame(sig, ka, info, oldset, regs); - - if (ret == 0) { - spin_lock_irq(¤t->sighand->siglock); - sigorsets(¤t->blocked, ¤t->blocked, - &ka->sa.sa_mask); - if (!(ka->sa.sa_flags & SA_NODEFER)) - sigaddset(¤t->blocked, sig); - recalc_sigpending(); - spin_unlock_irq(¤t->sighand->siglock); - } - return ret; + if (setup_rt_frame(sig, ka, info, sigmask_to_save(), regs) < 0) + force_sigsegv(sig, current); + else + signal_delivered(sig, info, ka, regs, + test_thread_flag(TIF_SINGLESTEP)); } /* @@ -314,34 +267,16 @@ asmlinkage void do_signal(struct pt_regs *regs) siginfo_t info; int signr; struct k_sigaction ka; - sigset_t *oldset; current->thread.esp0 = (unsigned long)regs; - if (try_to_freeze()) - goto no_signal; - - if (test_thread_flag(TIF_RESTORE_SIGMASK)) - oldset = ¤t->saved_sigmask; - else - oldset = ¤t->blocked; - signr = get_signal_to_deliver(&info, &ka, regs, NULL); if (signr > 0) { /* Whee! Actually deliver the signal. */ - if (handle_signal(signr, &info, &ka, oldset, regs) == 0) { - /* a signal was successfully delivered; the saved - * sigmask will have been stored in the signal frame, - * and will be restored by sigreturn, so we can simply - * clear the TIF_RESTORE_SIGMASK flag */ - if (test_thread_flag(TIF_RESTORE_SIGMASK)) - clear_thread_flag(TIF_RESTORE_SIGMASK); - } - + handle_signal(signr, &info, &ka, regs); return; } - no_signal: /* Did we come from a system call? */ if (regs->orig_p0 >= 0) /* Restart the system call - no handlers present */ @@ -349,8 +284,20 @@ asmlinkage void do_signal(struct pt_regs *regs) /* if there's no signal to deliver, we just put the saved sigmask * back */ - if (test_thread_flag(TIF_RESTORE_SIGMASK)) { - clear_thread_flag(TIF_RESTORE_SIGMASK); - sigprocmask(SIG_SETMASK, ¤t->saved_sigmask, NULL); + restore_saved_sigmask(); +} + +/* + * notification of userspace execution resumption + */ +asmlinkage void do_notify_resume(struct pt_regs *regs) +{ + if (test_thread_flag(TIF_SIGPENDING)) + do_signal(regs); + + if (test_thread_flag(TIF_NOTIFY_RESUME)) { + clear_thread_flag(TIF_NOTIFY_RESUME); + tracehook_notify_resume(regs); } } + diff --git a/arch/blackfin/kernel/stacktrace.c b/arch/blackfin/kernel/stacktrace.c new file mode 100644 index 00000000000..30301e1eace --- /dev/null +++ b/arch/blackfin/kernel/stacktrace.c @@ -0,0 +1,53 @@ +/* + * Blackfin stacktrace code (mostly copied from avr32) + * + * Copyright 2009 Analog Devices Inc. + * Licensed under the GPL-2 or later. + */ + +#include <linux/sched.h> +#include <linux/stacktrace.h> +#include <linux/thread_info.h> +#include <linux/module.h> + +register unsigned long current_frame_pointer asm("FP"); + +struct stackframe { + unsigned long fp; + unsigned long rets; +}; + +/* + * Save stack-backtrace addresses into a stack_trace buffer. + */ +void save_stack_trace(struct stack_trace *trace) +{ + unsigned long low, high; + unsigned long fp; + struct stackframe *frame; + int skip = trace->skip; + + low = (unsigned long)task_stack_page(current); + high = low + THREAD_SIZE; + fp = current_frame_pointer; + + while (fp >= low && fp <= (high - sizeof(*frame))) { + frame = (struct stackframe *)fp; + + if (skip) { + skip--; + } else { + trace->entries[trace->nr_entries++] = frame->rets; + if (trace->nr_entries >= trace->max_entries) + break; + } + + /* + * The next frame must be at a higher address than the + * current frame. + */ + low = fp + sizeof(*frame); + fp = frame->fp; + } +} +EXPORT_SYMBOL_GPL(save_stack_trace); diff --git a/arch/blackfin/kernel/sys_bfin.c b/arch/blackfin/kernel/sys_bfin.c index abcd14817d0..d998383cb95 100644 --- a/arch/blackfin/kernel/sys_bfin.c +++ b/arch/blackfin/kernel/sys_bfin.c @@ -1,35 +1,12 @@ /* - * File: arch/blackfin/kernel/sys_bfin.c - * Based on: - * Author: + * contains various random system calls that have a non-standard + * calling sequence on the Linux/Blackfin platform. * - * Created: - * Description: This file contains various random system calls that - * have a non-standard calling sequence on the Linux/bfin - * platform. + * Copyright 2004-2009 Analog Devices Inc. * - * Modified: - * Copyright 2004-2006 Analog Devices Inc. - * - * Bugs: Enter bugs at http://blackfin.uclinux.org/ - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, see the file COPYING, or write - * to the Free Software Foundation, Inc., - * 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA + * Licensed under the GPL-2 or later */ -#include <linux/smp_lock.h> #include <linux/spinlock.h> #include <linux/sem.h> #include <linux/msg.h> @@ -44,73 +21,68 @@ #include <asm/cacheflush.h> #include <asm/dma.h> +#include <asm/cachectl.h> +#include <asm/ptrace.h> -/* - * sys_pipe() is the normal C calling standard for creating - * a pipe. It's not the way unix traditionally does this, though. - */ -asmlinkage int sys_pipe(unsigned long *fildes) +asmlinkage void *sys_sram_alloc(size_t size, unsigned long flags) { - int fd[2]; - int error; - - error = do_pipe(fd); - if (!error) { - if (copy_to_user(fildes, fd, 2 * sizeof(int))) - error = -EFAULT; - } - return error; + return sram_alloc_with_lsl(size, flags); } -/* common code for old and new mmaps */ -static inline long -do_mmap2(unsigned long addr, unsigned long len, - unsigned long prot, unsigned long flags, - unsigned long fd, unsigned long pgoff) +asmlinkage int sys_sram_free(const void *addr) { - int error = -EBADF; - struct file *file = NULL; - - flags &= ~(MAP_EXECUTABLE | MAP_DENYWRITE); - if (!(flags & MAP_ANONYMOUS)) { - file = fget(fd); - if (!file) - goto out; - } - - down_write(¤t->mm->mmap_sem); - error = do_mmap_pgoff(file, addr, len, prot, flags, pgoff); - up_write(¤t->mm->mmap_sem); - - if (file) - fput(file); - out: - return error; + return sram_free_with_lsl(addr); } -asmlinkage long sys_mmap2(unsigned long addr, unsigned long len, - unsigned long prot, unsigned long flags, - unsigned long fd, unsigned long pgoff) +asmlinkage void *sys_dma_memcpy(void *dest, const void *src, size_t len) { - return do_mmap2(addr, len, prot, flags, fd, pgoff); + return safe_dma_memcpy(dest, src, len); } -asmlinkage int sys_getpagesize(void) +#if defined(CONFIG_FB) || defined(CONFIG_FB_MODULE) +#include <linux/fb.h> +#include <linux/export.h> +unsigned long get_fb_unmapped_area(struct file *filp, unsigned long orig_addr, + unsigned long len, unsigned long pgoff, unsigned long flags) { - return PAGE_SIZE; + struct fb_info *info = filp->private_data; + return (unsigned long)info->screen_base; } +EXPORT_SYMBOL(get_fb_unmapped_area); +#endif -asmlinkage void *sys_sram_alloc(size_t size, unsigned long flags) -{ - return sram_alloc_with_lsl(size, flags); -} +/* Needed for legacy userspace atomic emulation */ +static DEFINE_SPINLOCK(bfin_spinlock_lock); -asmlinkage int sys_sram_free(const void *addr) +#ifdef CONFIG_SYS_BFIN_SPINLOCK_L1 +__attribute__((l1_text)) +#endif +asmlinkage int sys_bfin_spinlock(int *p) { - return sram_free_with_lsl(addr); + int ret, tmp = 0; + + spin_lock(&bfin_spinlock_lock); /* This would also hold kernel preemption. */ + ret = get_user(tmp, p); + if (likely(ret == 0)) { + if (unlikely(tmp)) + ret = 1; + else + put_user(1, p); + } + spin_unlock(&bfin_spinlock_lock); + + return ret; } -asmlinkage void *sys_dma_memcpy(void *dest, const void *src, size_t len) +SYSCALL_DEFINE3(cacheflush, unsigned long, addr, unsigned long, len, int, op) { - return safe_dma_memcpy(dest, src, len); + if (is_user_addr_valid(current, addr, len) != 0) + return -EINVAL; + + if (op & DCACHE) + blackfin_dcache_flush_range(addr, addr + len); + if (op & ICACHE) + blackfin_icache_flush_range(addr, addr + len); + + return 0; } diff --git a/arch/blackfin/kernel/time-ts.c b/arch/blackfin/kernel/time-ts.c new file mode 100644 index 00000000000..cb0a4845339 --- /dev/null +++ b/arch/blackfin/kernel/time-ts.c @@ -0,0 +1,392 @@ +/* + * Based on arm clockevents implementation and old bfin time tick. + * + * Copyright 2008-2009 Analog Devics Inc. + * 2008 GeoTechnologies + * Vitja Makarov + * + * Licensed under the GPL-2 + */ + +#include <linux/module.h> +#include <linux/profile.h> +#include <linux/interrupt.h> +#include <linux/time.h> +#include <linux/timex.h> +#include <linux/irq.h> +#include <linux/clocksource.h> +#include <linux/clockchips.h> +#include <linux/cpufreq.h> + +#include <asm/blackfin.h> +#include <asm/time.h> +#include <asm/gptimers.h> +#include <asm/nmi.h> + + +#if defined(CONFIG_CYCLES_CLOCKSOURCE) + +static notrace cycle_t bfin_read_cycles(struct clocksource *cs) +{ +#ifdef CONFIG_CPU_FREQ + return __bfin_cycles_off + (get_cycles() << __bfin_cycles_mod); +#else + return get_cycles(); +#endif +} + +static struct clocksource bfin_cs_cycles = { + .name = "bfin_cs_cycles", + .rating = 400, + .read = bfin_read_cycles, + .mask = CLOCKSOURCE_MASK(64), + .flags = CLOCK_SOURCE_IS_CONTINUOUS, +}; + +static inline unsigned long long bfin_cs_cycles_sched_clock(void) +{ + return clocksource_cyc2ns(bfin_read_cycles(&bfin_cs_cycles), + bfin_cs_cycles.mult, bfin_cs_cycles.shift); +} + +static int __init bfin_cs_cycles_init(void) +{ + if (clocksource_register_hz(&bfin_cs_cycles, get_cclk())) + panic("failed to register clocksource"); + + return 0; +} +#else +# define bfin_cs_cycles_init() +#endif + +#ifdef CONFIG_GPTMR0_CLOCKSOURCE + +void __init setup_gptimer0(void) +{ + disable_gptimers(TIMER0bit); + +#ifdef CONFIG_BF60x + bfin_write16(TIMER_DATA_IMSK, 0); + set_gptimer_config(TIMER0_id, TIMER_OUT_DIS + | TIMER_MODE_PWM_CONT | TIMER_PULSE_HI | TIMER_IRQ_PER); +#else + set_gptimer_config(TIMER0_id, \ + TIMER_OUT_DIS | TIMER_PERIOD_CNT | TIMER_MODE_PWM); +#endif + set_gptimer_period(TIMER0_id, -1); + set_gptimer_pwidth(TIMER0_id, -2); + SSYNC(); + enable_gptimers(TIMER0bit); +} + +static cycle_t bfin_read_gptimer0(struct clocksource *cs) +{ + return bfin_read_TIMER0_COUNTER(); +} + +static struct clocksource bfin_cs_gptimer0 = { + .name = "bfin_cs_gptimer0", + .rating = 350, + .read = bfin_read_gptimer0, + .mask = CLOCKSOURCE_MASK(32), + .flags = CLOCK_SOURCE_IS_CONTINUOUS, +}; + +static inline unsigned long long bfin_cs_gptimer0_sched_clock(void) +{ + return clocksource_cyc2ns(bfin_read_TIMER0_COUNTER(), + bfin_cs_gptimer0.mult, bfin_cs_gptimer0.shift); +} + +static int __init bfin_cs_gptimer0_init(void) +{ + setup_gptimer0(); + + if (clocksource_register_hz(&bfin_cs_gptimer0, get_sclk())) + panic("failed to register clocksource"); + + return 0; +} +#else +# define bfin_cs_gptimer0_init() +#endif + +#if defined(CONFIG_GPTMR0_CLOCKSOURCE) || defined(CONFIG_CYCLES_CLOCKSOURCE) +/* prefer to use cycles since it has higher rating */ +notrace unsigned long long sched_clock(void) +{ +#if defined(CONFIG_CYCLES_CLOCKSOURCE) + return bfin_cs_cycles_sched_clock(); +#else + return bfin_cs_gptimer0_sched_clock(); +#endif +} +#endif + +#if defined(CONFIG_TICKSOURCE_GPTMR0) +static int bfin_gptmr0_set_next_event(unsigned long cycles, + struct clock_event_device *evt) +{ + disable_gptimers(TIMER0bit); + + /* it starts counting three SCLK cycles after the TIMENx bit is set */ + set_gptimer_pwidth(TIMER0_id, cycles - 3); + enable_gptimers(TIMER0bit); + return 0; +} + +static void bfin_gptmr0_set_mode(enum clock_event_mode mode, + struct clock_event_device *evt) +{ + switch (mode) { + case CLOCK_EVT_MODE_PERIODIC: { +#ifndef CONFIG_BF60x + set_gptimer_config(TIMER0_id, \ + TIMER_OUT_DIS | TIMER_IRQ_ENA | \ + TIMER_PERIOD_CNT | TIMER_MODE_PWM); +#else + set_gptimer_config(TIMER0_id, TIMER_OUT_DIS + | TIMER_MODE_PWM_CONT | TIMER_PULSE_HI | TIMER_IRQ_PER); +#endif + + set_gptimer_period(TIMER0_id, get_sclk() / HZ); + set_gptimer_pwidth(TIMER0_id, get_sclk() / HZ - 1); + enable_gptimers(TIMER0bit); + break; + } + case CLOCK_EVT_MODE_ONESHOT: + disable_gptimers(TIMER0bit); +#ifndef CONFIG_BF60x + set_gptimer_config(TIMER0_id, \ + TIMER_OUT_DIS | TIMER_IRQ_ENA | TIMER_MODE_PWM); +#else + set_gptimer_config(TIMER0_id, TIMER_OUT_DIS | TIMER_MODE_PWM + | TIMER_PULSE_HI | TIMER_IRQ_WID_DLY); +#endif + + set_gptimer_period(TIMER0_id, 0); + break; + case CLOCK_EVT_MODE_UNUSED: + case CLOCK_EVT_MODE_SHUTDOWN: + disable_gptimers(TIMER0bit); + break; + case CLOCK_EVT_MODE_RESUME: + break; + } +} + +static void bfin_gptmr0_ack(void) +{ + clear_gptimer_intr(TIMER0_id); +} + +static void __init bfin_gptmr0_init(void) +{ + disable_gptimers(TIMER0bit); +} + +#ifdef CONFIG_CORE_TIMER_IRQ_L1 +__attribute__((l1_text)) +#endif +irqreturn_t bfin_gptmr0_interrupt(int irq, void *dev_id) +{ + struct clock_event_device *evt = dev_id; + smp_mb(); + /* + * We want to ACK before we handle so that we can handle smaller timer + * intervals. This way if the timer expires again while we're handling + * things, we're more likely to see that 2nd int rather than swallowing + * it by ACKing the int at the end of this handler. + */ + bfin_gptmr0_ack(); + evt->event_handler(evt); + return IRQ_HANDLED; +} + +static struct irqaction gptmr0_irq = { + .name = "Blackfin GPTimer0", + .flags = IRQF_TIMER | IRQF_IRQPOLL | IRQF_PERCPU, + .handler = bfin_gptmr0_interrupt, +}; + +static struct clock_event_device clockevent_gptmr0 = { + .name = "bfin_gptimer0", + .rating = 300, + .irq = IRQ_TIMER0, + .shift = 32, + .features = CLOCK_EVT_FEAT_PERIODIC | CLOCK_EVT_FEAT_ONESHOT, + .set_next_event = bfin_gptmr0_set_next_event, + .set_mode = bfin_gptmr0_set_mode, +}; + +static void __init bfin_gptmr0_clockevent_init(struct clock_event_device *evt) +{ + unsigned long clock_tick; + + clock_tick = get_sclk(); + evt->mult = div_sc(clock_tick, NSEC_PER_SEC, evt->shift); + evt->max_delta_ns = clockevent_delta2ns(-1, evt); + evt->min_delta_ns = clockevent_delta2ns(100, evt); + + evt->cpumask = cpumask_of(0); + + clockevents_register_device(evt); +} +#endif /* CONFIG_TICKSOURCE_GPTMR0 */ + +#if defined(CONFIG_TICKSOURCE_CORETMR) +/* per-cpu local core timer */ +DEFINE_PER_CPU(struct clock_event_device, coretmr_events); + +static int bfin_coretmr_set_next_event(unsigned long cycles, + struct clock_event_device *evt) +{ + bfin_write_TCNTL(TMPWR); + CSYNC(); + bfin_write_TCOUNT(cycles); + CSYNC(); + bfin_write_TCNTL(TMPWR | TMREN); + return 0; +} + +static void bfin_coretmr_set_mode(enum clock_event_mode mode, + struct clock_event_device *evt) +{ + switch (mode) { + case CLOCK_EVT_MODE_PERIODIC: { + unsigned long tcount = ((get_cclk() / (HZ * TIME_SCALE)) - 1); + bfin_write_TCNTL(TMPWR); + CSYNC(); + bfin_write_TSCALE(TIME_SCALE - 1); + bfin_write_TPERIOD(tcount); + bfin_write_TCOUNT(tcount); + CSYNC(); + bfin_write_TCNTL(TMPWR | TMREN | TAUTORLD); + break; + } + case CLOCK_EVT_MODE_ONESHOT: + bfin_write_TCNTL(TMPWR); + CSYNC(); + bfin_write_TSCALE(TIME_SCALE - 1); + bfin_write_TPERIOD(0); + bfin_write_TCOUNT(0); + break; + case CLOCK_EVT_MODE_UNUSED: + case CLOCK_EVT_MODE_SHUTDOWN: + bfin_write_TCNTL(0); + CSYNC(); + break; + case CLOCK_EVT_MODE_RESUME: + break; + } +} + +void bfin_coretmr_init(void) +{ + /* power up the timer, but don't enable it just yet */ + bfin_write_TCNTL(TMPWR); + CSYNC(); + + /* the TSCALE prescaler counter. */ + bfin_write_TSCALE(TIME_SCALE - 1); + bfin_write_TPERIOD(0); + bfin_write_TCOUNT(0); + + CSYNC(); +} + +#ifdef CONFIG_CORE_TIMER_IRQ_L1 +__attribute__((l1_text)) +#endif + +irqreturn_t bfin_coretmr_interrupt(int irq, void *dev_id) +{ + int cpu = smp_processor_id(); + struct clock_event_device *evt = &per_cpu(coretmr_events, cpu); + + smp_mb(); + evt->event_handler(evt); + + touch_nmi_watchdog(); + + return IRQ_HANDLED; +} + +static struct irqaction coretmr_irq = { + .name = "Blackfin CoreTimer", + .flags = IRQF_TIMER | IRQF_IRQPOLL | IRQF_PERCPU, + .handler = bfin_coretmr_interrupt, +}; + +void bfin_coretmr_clockevent_init(void) +{ + unsigned long clock_tick; + unsigned int cpu = smp_processor_id(); + struct clock_event_device *evt = &per_cpu(coretmr_events, cpu); + +#ifdef CONFIG_SMP + evt->broadcast = smp_timer_broadcast; +#endif + + evt->name = "bfin_core_timer"; + evt->rating = 350; + evt->irq = -1; + evt->shift = 32; + evt->features = CLOCK_EVT_FEAT_PERIODIC | CLOCK_EVT_FEAT_ONESHOT; + evt->set_next_event = bfin_coretmr_set_next_event; + evt->set_mode = bfin_coretmr_set_mode; + + clock_tick = get_cclk() / TIME_SCALE; + evt->mult = div_sc(clock_tick, NSEC_PER_SEC, evt->shift); + evt->max_delta_ns = clockevent_delta2ns(-1, evt); + evt->min_delta_ns = clockevent_delta2ns(100, evt); + + evt->cpumask = cpumask_of(cpu); + + clockevents_register_device(evt); +} +#endif /* CONFIG_TICKSOURCE_CORETMR */ + + +void read_persistent_clock(struct timespec *ts) +{ + time_t secs_since_1970 = (365 * 37 + 9) * 24 * 60 * 60; /* 1 Jan 2007 */ + ts->tv_sec = secs_since_1970; + ts->tv_nsec = 0; +} + +void __init time_init(void) +{ + +#ifdef CONFIG_RTC_DRV_BFIN + /* [#2663] hack to filter junk RTC values that would cause + * userspace to have to deal with time values greater than + * 2^31 seconds (which uClibc cannot cope with yet) + */ + if ((bfin_read_RTC_STAT() & 0xC0000000) == 0xC0000000) { + printk(KERN_NOTICE "bfin-rtc: invalid date; resetting\n"); + bfin_write_RTC_STAT(0); + } +#endif + + bfin_cs_cycles_init(); + bfin_cs_gptimer0_init(); + +#if defined(CONFIG_TICKSOURCE_CORETMR) + bfin_coretmr_init(); + setup_irq(IRQ_CORETMR, &coretmr_irq); + bfin_coretmr_clockevent_init(); +#endif + +#if defined(CONFIG_TICKSOURCE_GPTMR0) + bfin_gptmr0_init(); + setup_irq(IRQ_TIMER0, &gptmr0_irq); + gptmr0_irq.dev_id = &clockevent_gptmr0; + bfin_gptmr0_clockevent_init(&clockevent_gptmr0); +#endif + +#if !defined(CONFIG_TICKSOURCE_CORETMR) && !defined(CONFIG_TICKSOURCE_GPTMR0) +# error at least one clock event device is required +#endif +} diff --git a/arch/blackfin/kernel/time.c b/arch/blackfin/kernel/time.c index 9bdc8f99183..3126b920a4a 100644 --- a/arch/blackfin/kernel/time.c +++ b/arch/blackfin/kernel/time.c @@ -1,31 +1,11 @@ /* - * File: arch/blackfin/kernel/time.c - * Based on: none - original work - * Author: + * arch/blackfin/kernel/time.c * - * Created: - * Description: This file contains the bfin-specific time handling details. - * Most of the stuff is located in the machine specific files. + * This file contains the Blackfin-specific time handling details. + * Most of the stuff is located in the machine specific files. * - * Modified: - * Copyright 2004-2006 Analog Devices Inc. - * - * Bugs: Enter bugs at http://blackfin.uclinux.org/ - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, see the file COPYING, or write - * to the Free Software Foundation, Inc., - * 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA + * Copyright 2004-2008 Analog Devices Inc. + * Licensed under the GPL-2 or later. */ #include <linux/module.h> @@ -33,49 +13,48 @@ #include <linux/interrupt.h> #include <linux/time.h> #include <linux/irq.h> +#include <linux/delay.h> +#include <linux/sched.h> #include <asm/blackfin.h> +#include <asm/time.h> +#include <asm/gptimers.h> /* This is an NTP setting */ #define TICK_SIZE (tick_nsec / 1000) -static void time_sched_init(irqreturn_t(*timer_routine) - (int, void *)); -static unsigned long gettimeoffset(void); - static struct irqaction bfin_timer_irq = { - .name = "BFIN Timer Tick", - .flags = IRQF_DISABLED + .name = "Blackfin Timer Tick", }; -/* - * The way that the Blackfin core timer works is: - * - CCLK is divided by a programmable 8-bit pre-scaler (TSCALE) - * - Every time TSCALE ticks, a 32bit is counted down (TCOUNT) - * - * If you take the fastest clock (1ns, or 1GHz to make the math work easier) - * 10ms is 10,000,000 clock ticks, which fits easy into a 32-bit counter - * (32 bit counter is 4,294,967,296ns or 4.2 seconds) so, we don't need - * to use TSCALE, and program it to zero (which is pass CCLK through). - * If you feel like using it, try to keep HZ * TIMESCALE to some - * value that divides easy (like power of 2). - */ - -#define TIME_SCALE 1 - -static void -time_sched_init(irqreturn_t(*timer_routine) (int, void *)) +#if defined(CONFIG_IPIPE) +void __init setup_system_timer0(void) +{ + /* Power down the core timer, just to play safe. */ + bfin_write_TCNTL(0); + + disable_gptimers(TIMER0bit); + set_gptimer_status(0, TIMER_STATUS_TRUN0); + while (get_gptimer_status(0) & TIMER_STATUS_TRUN0) + udelay(10); + + set_gptimer_config(0, 0x59); /* IRQ enable, periodic, PWM_OUT, SCLKed, OUT PAD disabled */ + set_gptimer_period(TIMER0_id, get_sclk() / HZ); + set_gptimer_pwidth(TIMER0_id, 1); + SSYNC(); + enable_gptimers(TIMER0bit); +} +#else +void __init setup_core_timer(void) { u32 tcount; /* power up the timer, but don't enable it just yet */ - bfin_write_TCNTL(1); + bfin_write_TCNTL(TMPWR); CSYNC(); - /* - * the TSCALE prescaler counter. - */ - bfin_write_TSCALE((TIME_SCALE - 1)); + /* the TSCALE prescaler counter */ + bfin_write_TSCALE(TIME_SCALE - 1); tcount = ((get_cclk() / (HZ * TIME_SCALE)) - 1); bfin_write_TPERIOD(tcount); @@ -84,91 +63,87 @@ time_sched_init(irqreturn_t(*timer_routine) (int, void *)) /* now enable the timer */ CSYNC(); - bfin_write_TCNTL(7); + bfin_write_TCNTL(TAUTORLD | TMREN | TMPWR); +} +#endif - bfin_timer_irq.handler = (irq_handler_t)timer_routine; - /* call setup_irq instead of request_irq because request_irq calls - * kmalloc which has not been initialized yet - */ +static void __init +time_sched_init(irqreturn_t(*timer_routine) (int, void *)) +{ +#if defined(CONFIG_IPIPE) + setup_system_timer0(); + bfin_timer_irq.handler = timer_routine; + setup_irq(IRQ_TIMER0, &bfin_timer_irq); +#else + setup_core_timer(); + bfin_timer_irq.handler = timer_routine; setup_irq(IRQ_CORETMR, &bfin_timer_irq); +#endif } +#ifdef CONFIG_ARCH_USES_GETTIMEOFFSET /* * Should return useconds since last timer tick */ -static unsigned long gettimeoffset(void) +static u32 blackfin_gettimeoffset(void) { unsigned long offset; unsigned long clocks_per_jiffy; +#if defined(CONFIG_IPIPE) + clocks_per_jiffy = bfin_read_TIMER0_PERIOD(); + offset = bfin_read_TIMER0_COUNTER() / \ + (((clocks_per_jiffy + 1) * HZ) / USEC_PER_SEC); + + if ((get_gptimer_status(0) & TIMER_STATUS_TIMIL0) && offset < (100000 / HZ / 2)) + offset += (USEC_PER_SEC / HZ); +#else clocks_per_jiffy = bfin_read_TPERIOD(); - offset = - (clocks_per_jiffy - - bfin_read_TCOUNT()) / (((clocks_per_jiffy + 1) * HZ) / - USEC_PER_SEC); + offset = (clocks_per_jiffy - bfin_read_TCOUNT()) / \ + (((clocks_per_jiffy + 1) * HZ) / USEC_PER_SEC); /* Check if we just wrapped the counters and maybe missed a tick */ if ((bfin_read_ILAT() & (1 << IRQ_CORETMR)) - && (offset < (100000 / HZ / 2))) + && (offset < (100000 / HZ / 2))) offset += (USEC_PER_SEC / HZ); - +#endif return offset; } - -static inline int set_rtc_mmss(unsigned long nowtime) -{ - return 0; -} +#endif /* * timer_interrupt() needs to keep up the real-time clock, - * as well as call the "do_timer()" routine every clocktick + * as well as call the "xtime_update()" routine every clocktick */ #ifdef CONFIG_CORE_TIMER_IRQ_L1 -irqreturn_t timer_interrupt(int irq, void *dummy)__attribute__((l1_text)); +__attribute__((l1_text)) #endif - irqreturn_t timer_interrupt(int irq, void *dummy) { - /* last time the cmos clock got updated */ - static long last_rtc_update; - - write_seqlock(&xtime_lock); - - do_timer(1); - - profile_tick(CPU_PROFILING); - - /* - * If we have an externally synchronized Linux clock, then update - * CMOS clock accordingly every ~11 minutes. Set_rtc_mmss() has to be - * called as close as possible to 500 ms before the new second starts. - */ + xtime_update(1); - if (ntp_synced() && - xtime.tv_sec > last_rtc_update + 660 && - (xtime.tv_nsec / NSEC_PER_USEC) >= - 500000 - ((unsigned)TICK_SIZE) / 2 - && (xtime.tv_nsec / NSEC_PER_USEC) <= - 500000 + ((unsigned)TICK_SIZE) / 2) { - if (set_rtc_mmss(xtime.tv_sec) == 0) - last_rtc_update = xtime.tv_sec; - else - /* Do it again in 60s. */ - last_rtc_update = xtime.tv_sec - 600; - } - write_sequnlock(&xtime_lock); - -#ifndef CONFIG_SMP +#ifdef CONFIG_IPIPE + update_root_process_times(get_irq_regs()); +#else update_process_times(user_mode(get_irq_regs())); #endif + profile_tick(CPU_PROFILING); return IRQ_HANDLED; } -void __init time_init(void) +void read_persistent_clock(struct timespec *ts) { time_t secs_since_1970 = (365 * 37 + 9) * 24 * 60 * 60; /* 1 Jan 2007 */ + ts->tv_sec = secs_since_1970; + ts->tv_nsec = 0; +} + +void __init time_init(void) +{ +#ifdef CONFIG_ARCH_USES_GETTIMEOFFSET + arch_gettimeoffset = blackfin_gettimeoffset; +#endif #ifdef CONFIG_RTC_DRV_BFIN /* [#2663] hack to filter junk RTC values that would cause @@ -181,78 +156,5 @@ void __init time_init(void) } #endif - /* Initialize xtime. From now on, xtime is updated with timer interrupts */ - xtime.tv_sec = secs_since_1970; - xtime.tv_nsec = 0; - - wall_to_monotonic.tv_sec = -xtime.tv_sec; - time_sched_init(timer_interrupt); } - -#ifndef CONFIG_GENERIC_TIME -void do_gettimeofday(struct timeval *tv) -{ - unsigned long flags; - unsigned long seq; - unsigned long usec, sec; - - do { - seq = read_seqbegin_irqsave(&xtime_lock, flags); - usec = gettimeoffset(); - sec = xtime.tv_sec; - usec += (xtime.tv_nsec / NSEC_PER_USEC); - } - while (read_seqretry_irqrestore(&xtime_lock, seq, flags)); - - while (usec >= USEC_PER_SEC) { - usec -= USEC_PER_SEC; - sec++; - } - - tv->tv_sec = sec; - tv->tv_usec = usec; -} -EXPORT_SYMBOL(do_gettimeofday); - -int do_settimeofday(struct timespec *tv) -{ - time_t wtm_sec, sec = tv->tv_sec; - long wtm_nsec, nsec = tv->tv_nsec; - - if ((unsigned long)tv->tv_nsec >= NSEC_PER_SEC) - return -EINVAL; - - write_seqlock_irq(&xtime_lock); - /* - * This is revolting. We need to set the xtime.tv_usec - * correctly. However, the value in this location is - * is value at the last tick. - * Discover what correction gettimeofday - * would have done, and then undo it! - */ - nsec -= (gettimeoffset() * NSEC_PER_USEC); - - wtm_sec = wall_to_monotonic.tv_sec + (xtime.tv_sec - sec); - wtm_nsec = wall_to_monotonic.tv_nsec + (xtime.tv_nsec - nsec); - - set_normalized_timespec(&xtime, sec, nsec); - set_normalized_timespec(&wall_to_monotonic, wtm_sec, wtm_nsec); - - ntp_clear(); - - write_sequnlock_irq(&xtime_lock); - clock_was_set(); - - return 0; -} -EXPORT_SYMBOL(do_settimeofday); -#endif /* !CONFIG_GENERIC_TIME */ - -/* - * Scheduler clock - returns current time in nanosec units. - */ -unsigned long long sched_clock(void) -{ - return (unsigned long long)jiffies *(NSEC_PER_SEC / HZ); -} diff --git a/arch/blackfin/kernel/trace.c b/arch/blackfin/kernel/trace.c new file mode 100644 index 00000000000..c36efa0c716 --- /dev/null +++ b/arch/blackfin/kernel/trace.c @@ -0,0 +1,986 @@ +/* provide some functions which dump the trace buffer, in a nice way for people + * to read it, and understand what is going on + * + * Copyright 2004-2010 Analog Devices Inc. + * + * Licensed under the GPL-2 or later + */ + +#include <linux/kernel.h> +#include <linux/hardirq.h> +#include <linux/thread_info.h> +#include <linux/mm.h> +#include <linux/oom.h> +#include <linux/sched.h> +#include <linux/uaccess.h> +#include <linux/module.h> +#include <linux/kallsyms.h> +#include <linux/err.h> +#include <linux/fs.h> +#include <linux/irq.h> +#include <asm/dma.h> +#include <asm/trace.h> +#include <asm/fixed_code.h> +#include <asm/traps.h> +#include <asm/irq_handler.h> +#include <asm/pda.h> + +void decode_address(char *buf, unsigned long address) +{ + struct task_struct *p; + struct mm_struct *mm; + unsigned long offset; + struct rb_node *n; + +#ifdef CONFIG_KALLSYMS + unsigned long symsize; + const char *symname; + char *modname; + char *delim = ":"; + char namebuf[128]; +#endif + + buf += sprintf(buf, "<0x%08lx> ", address); + +#ifdef CONFIG_KALLSYMS + /* look up the address and see if we are in kernel space */ + symname = kallsyms_lookup(address, &symsize, &offset, &modname, namebuf); + + if (symname) { + /* yeah! kernel space! */ + if (!modname) + modname = delim = ""; + sprintf(buf, "{ %s%s%s%s + 0x%lx }", + delim, modname, delim, symname, + (unsigned long)offset); + return; + } +#endif + + if (address >= FIXED_CODE_START && address < FIXED_CODE_END) { + /* Problem in fixed code section? */ + strcat(buf, "/* Maybe fixed code section */"); + return; + + } else if (address < CONFIG_BOOT_LOAD) { + /* Problem somewhere before the kernel start address */ + strcat(buf, "/* Maybe null pointer? */"); + return; + + } else if (address >= COREMMR_BASE) { + strcat(buf, "/* core mmrs */"); + return; + + } else if (address >= SYSMMR_BASE) { + strcat(buf, "/* system mmrs */"); + return; + + } else if (address >= L1_ROM_START && address < L1_ROM_START + L1_ROM_LENGTH) { + strcat(buf, "/* on-chip L1 ROM */"); + return; + + } else if (address >= L1_SCRATCH_START && address < L1_SCRATCH_START + L1_SCRATCH_LENGTH) { + strcat(buf, "/* on-chip scratchpad */"); + return; + + } else if (address >= physical_mem_end && address < ASYNC_BANK0_BASE) { + strcat(buf, "/* unconnected memory */"); + return; + + } else if (address >= ASYNC_BANK3_BASE + ASYNC_BANK3_SIZE && address < BOOT_ROM_START) { + strcat(buf, "/* reserved memory */"); + return; + + } else if (address >= L1_DATA_A_START && address < L1_DATA_A_START + L1_DATA_A_LENGTH) { + strcat(buf, "/* on-chip Data Bank A */"); + return; + + } else if (address >= L1_DATA_B_START && address < L1_DATA_B_START + L1_DATA_B_LENGTH) { + strcat(buf, "/* on-chip Data Bank B */"); + return; + } + + /* + * Don't walk any of the vmas if we are oopsing, it has been known + * to cause problems - corrupt vmas (kernel crashes) cause double faults + */ + if (oops_in_progress) { + strcat(buf, "/* kernel dynamic memory (maybe user-space) */"); + return; + } + + /* looks like we're off in user-land, so let's walk all the + * mappings of all our processes and see if we can't be a whee + * bit more specific + */ + read_lock(&tasklist_lock); + for_each_process(p) { + struct task_struct *t; + + t = find_lock_task_mm(p); + if (!t) + continue; + + mm = t->mm; + if (!down_read_trylock(&mm->mmap_sem)) + goto __continue; + + for (n = rb_first(&mm->mm_rb); n; n = rb_next(n)) { + struct vm_area_struct *vma; + + vma = rb_entry(n, struct vm_area_struct, vm_rb); + + if (address >= vma->vm_start && address < vma->vm_end) { + char _tmpbuf[256]; + char *name = t->comm; + struct file *file = vma->vm_file; + + if (file) { + char *d_name = d_path(&file->f_path, _tmpbuf, + sizeof(_tmpbuf)); + if (!IS_ERR(d_name)) + name = d_name; + } + + /* FLAT does not have its text aligned to the start of + * the map while FDPIC ELF does ... + */ + + /* before we can check flat/fdpic, we need to + * make sure current is valid + */ + if ((unsigned long)current >= FIXED_CODE_START && + !((unsigned long)current & 0x3)) { + if (current->mm && + (address > current->mm->start_code) && + (address < current->mm->end_code)) + offset = address - current->mm->start_code; + else + offset = (address - vma->vm_start) + + (vma->vm_pgoff << PAGE_SHIFT); + + sprintf(buf, "[ %s + 0x%lx ]", name, offset); + } else + sprintf(buf, "[ %s vma:0x%lx-0x%lx]", + name, vma->vm_start, vma->vm_end); + + up_read(&mm->mmap_sem); + task_unlock(t); + + if (buf[0] == '\0') + sprintf(buf, "[ %s ] dynamic memory", name); + + goto done; + } + } + + up_read(&mm->mmap_sem); +__continue: + task_unlock(t); + } + + /* + * we were unable to find this address anywhere, + * or some MMs were skipped because they were in use. + */ + sprintf(buf, "/* kernel dynamic memory */"); + +done: + read_unlock(&tasklist_lock); +} + +#define EXPAND_LEN ((1 << CONFIG_DEBUG_BFIN_HWTRACE_EXPAND_LEN) * 256 - 1) + +/* + * Similar to get_user, do some address checking, then dereference + * Return true on success, false on bad address + */ +bool get_mem16(unsigned short *val, unsigned short *address) +{ + unsigned long addr = (unsigned long)address; + + /* Check for odd addresses */ + if (addr & 0x1) + return false; + + switch (bfin_mem_access_type(addr, 2)) { + case BFIN_MEM_ACCESS_CORE: + case BFIN_MEM_ACCESS_CORE_ONLY: + *val = *address; + return true; + case BFIN_MEM_ACCESS_DMA: + dma_memcpy(val, address, 2); + return true; + case BFIN_MEM_ACCESS_ITEST: + isram_memcpy(val, address, 2); + return true; + default: /* invalid access */ + return false; + } +} + +bool get_instruction(unsigned int *val, unsigned short *address) +{ + unsigned long addr = (unsigned long)address; + unsigned short opcode0, opcode1; + + /* Check for odd addresses */ + if (addr & 0x1) + return false; + + /* MMR region will never have instructions */ + if (addr >= SYSMMR_BASE) + return false; + + /* Scratchpad will never have instructions */ + if (addr >= L1_SCRATCH_START && addr < L1_SCRATCH_START + L1_SCRATCH_LENGTH) + return false; + + /* Data banks will never have instructions */ + if (addr >= BOOT_ROM_START + BOOT_ROM_LENGTH && addr < L1_CODE_START) + return false; + + if (!get_mem16(&opcode0, address)) + return false; + + /* was this a 32-bit instruction? If so, get the next 16 bits */ + if ((opcode0 & 0xc000) == 0xc000) { + if (!get_mem16(&opcode1, address + 1)) + return false; + *val = (opcode0 << 16) + opcode1; + } else + *val = opcode0; + + return true; +} + +#if defined(CONFIG_DEBUG_BFIN_HWTRACE_ON) +/* + * decode the instruction if we are printing out the trace, as it + * makes things easier to follow, without running it through objdump + * Decode the change of flow, and the common load/store instructions + * which are the main cause for faults, and discontinuities in the trace + * buffer. + */ + +#define ProgCtrl_opcode 0x0000 +#define ProgCtrl_poprnd_bits 0 +#define ProgCtrl_poprnd_mask 0xf +#define ProgCtrl_prgfunc_bits 4 +#define ProgCtrl_prgfunc_mask 0xf +#define ProgCtrl_code_bits 8 +#define ProgCtrl_code_mask 0xff + +static void decode_ProgCtrl_0(unsigned int opcode) +{ + int poprnd = ((opcode >> ProgCtrl_poprnd_bits) & ProgCtrl_poprnd_mask); + int prgfunc = ((opcode >> ProgCtrl_prgfunc_bits) & ProgCtrl_prgfunc_mask); + + if (prgfunc == 0 && poprnd == 0) + pr_cont("NOP"); + else if (prgfunc == 1 && poprnd == 0) + pr_cont("RTS"); + else if (prgfunc == 1 && poprnd == 1) + pr_cont("RTI"); + else if (prgfunc == 1 && poprnd == 2) + pr_cont("RTX"); + else if (prgfunc == 1 && poprnd == 3) + pr_cont("RTN"); + else if (prgfunc == 1 && poprnd == 4) + pr_cont("RTE"); + else if (prgfunc == 2 && poprnd == 0) + pr_cont("IDLE"); + else if (prgfunc == 2 && poprnd == 3) + pr_cont("CSYNC"); + else if (prgfunc == 2 && poprnd == 4) + pr_cont("SSYNC"); + else if (prgfunc == 2 && poprnd == 5) + pr_cont("EMUEXCPT"); + else if (prgfunc == 3) + pr_cont("CLI R%i", poprnd); + else if (prgfunc == 4) + pr_cont("STI R%i", poprnd); + else if (prgfunc == 5) + pr_cont("JUMP (P%i)", poprnd); + else if (prgfunc == 6) + pr_cont("CALL (P%i)", poprnd); + else if (prgfunc == 7) + pr_cont("CALL (PC + P%i)", poprnd); + else if (prgfunc == 8) + pr_cont("JUMP (PC + P%i", poprnd); + else if (prgfunc == 9) + pr_cont("RAISE %i", poprnd); + else if (prgfunc == 10) + pr_cont("EXCPT %i", poprnd); + else + pr_cont("0x%04x", opcode); + +} + +#define BRCC_opcode 0x1000 +#define BRCC_offset_bits 0 +#define BRCC_offset_mask 0x3ff +#define BRCC_B_bits 10 +#define BRCC_B_mask 0x1 +#define BRCC_T_bits 11 +#define BRCC_T_mask 0x1 +#define BRCC_code_bits 12 +#define BRCC_code_mask 0xf + +static void decode_BRCC_0(unsigned int opcode) +{ + int B = ((opcode >> BRCC_B_bits) & BRCC_B_mask); + int T = ((opcode >> BRCC_T_bits) & BRCC_T_mask); + + pr_cont("IF %sCC JUMP pcrel %s", T ? "" : "!", B ? "(BP)" : ""); +} + +#define CALLa_opcode 0xe2000000 +#define CALLa_addr_bits 0 +#define CALLa_addr_mask 0xffffff +#define CALLa_S_bits 24 +#define CALLa_S_mask 0x1 +#define CALLa_code_bits 25 +#define CALLa_code_mask 0x7f + +static void decode_CALLa_0(unsigned int opcode) +{ + int S = ((opcode >> (CALLa_S_bits - 16)) & CALLa_S_mask); + + if (S) + pr_cont("CALL pcrel"); + else + pr_cont("JUMP.L"); +} + +#define LoopSetup_opcode 0xe0800000 +#define LoopSetup_eoffset_bits 0 +#define LoopSetup_eoffset_mask 0x3ff +#define LoopSetup_dontcare_bits 10 +#define LoopSetup_dontcare_mask 0x3 +#define LoopSetup_reg_bits 12 +#define LoopSetup_reg_mask 0xf +#define LoopSetup_soffset_bits 16 +#define LoopSetup_soffset_mask 0xf +#define LoopSetup_c_bits 20 +#define LoopSetup_c_mask 0x1 +#define LoopSetup_rop_bits 21 +#define LoopSetup_rop_mask 0x3 +#define LoopSetup_code_bits 23 +#define LoopSetup_code_mask 0x1ff + +static void decode_LoopSetup_0(unsigned int opcode) +{ + int c = ((opcode >> LoopSetup_c_bits) & LoopSetup_c_mask); + int reg = ((opcode >> LoopSetup_reg_bits) & LoopSetup_reg_mask); + int rop = ((opcode >> LoopSetup_rop_bits) & LoopSetup_rop_mask); + + pr_cont("LSETUP <> LC%i", c); + if ((rop & 1) == 1) + pr_cont("= P%i", reg); + if ((rop & 2) == 2) + pr_cont(" >> 0x1"); +} + +#define DspLDST_opcode 0x9c00 +#define DspLDST_reg_bits 0 +#define DspLDST_reg_mask 0x7 +#define DspLDST_i_bits 3 +#define DspLDST_i_mask 0x3 +#define DspLDST_m_bits 5 +#define DspLDST_m_mask 0x3 +#define DspLDST_aop_bits 7 +#define DspLDST_aop_mask 0x3 +#define DspLDST_W_bits 9 +#define DspLDST_W_mask 0x1 +#define DspLDST_code_bits 10 +#define DspLDST_code_mask 0x3f + +static void decode_dspLDST_0(unsigned int opcode) +{ + int i = ((opcode >> DspLDST_i_bits) & DspLDST_i_mask); + int m = ((opcode >> DspLDST_m_bits) & DspLDST_m_mask); + int W = ((opcode >> DspLDST_W_bits) & DspLDST_W_mask); + int aop = ((opcode >> DspLDST_aop_bits) & DspLDST_aop_mask); + int reg = ((opcode >> DspLDST_reg_bits) & DspLDST_reg_mask); + + if (W == 0) { + pr_cont("R%i", reg); + switch (m) { + case 0: + pr_cont(" = "); + break; + case 1: + pr_cont(".L = "); + break; + case 2: + pr_cont(".W = "); + break; + } + } + + pr_cont("[ I%i", i); + + switch (aop) { + case 0: + pr_cont("++ ]"); + break; + case 1: + pr_cont("-- ]"); + break; + } + + if (W == 1) { + pr_cont(" = R%i", reg); + switch (m) { + case 1: + pr_cont(".L = "); + break; + case 2: + pr_cont(".W = "); + break; + } + } +} + +#define LDST_opcode 0x9000 +#define LDST_reg_bits 0 +#define LDST_reg_mask 0x7 +#define LDST_ptr_bits 3 +#define LDST_ptr_mask 0x7 +#define LDST_Z_bits 6 +#define LDST_Z_mask 0x1 +#define LDST_aop_bits 7 +#define LDST_aop_mask 0x3 +#define LDST_W_bits 9 +#define LDST_W_mask 0x1 +#define LDST_sz_bits 10 +#define LDST_sz_mask 0x3 +#define LDST_code_bits 12 +#define LDST_code_mask 0xf + +static void decode_LDST_0(unsigned int opcode) +{ + int Z = ((opcode >> LDST_Z_bits) & LDST_Z_mask); + int W = ((opcode >> LDST_W_bits) & LDST_W_mask); + int sz = ((opcode >> LDST_sz_bits) & LDST_sz_mask); + int aop = ((opcode >> LDST_aop_bits) & LDST_aop_mask); + int reg = ((opcode >> LDST_reg_bits) & LDST_reg_mask); + int ptr = ((opcode >> LDST_ptr_bits) & LDST_ptr_mask); + + if (W == 0) + pr_cont("%s%i = ", (sz == 0 && Z == 1) ? "P" : "R", reg); + + switch (sz) { + case 1: + pr_cont("W"); + break; + case 2: + pr_cont("B"); + break; + } + + pr_cont("[P%i", ptr); + + switch (aop) { + case 0: + pr_cont("++"); + break; + case 1: + pr_cont("--"); + break; + } + pr_cont("]"); + + if (W == 1) + pr_cont(" = %s%i ", (sz == 0 && Z == 1) ? "P" : "R", reg); + + if (sz) { + if (Z) + pr_cont(" (X)"); + else + pr_cont(" (Z)"); + } +} + +#define LDSTii_opcode 0xa000 +#define LDSTii_reg_bit 0 +#define LDSTii_reg_mask 0x7 +#define LDSTii_ptr_bit 3 +#define LDSTii_ptr_mask 0x7 +#define LDSTii_offset_bit 6 +#define LDSTii_offset_mask 0xf +#define LDSTii_op_bit 10 +#define LDSTii_op_mask 0x3 +#define LDSTii_W_bit 12 +#define LDSTii_W_mask 0x1 +#define LDSTii_code_bit 13 +#define LDSTii_code_mask 0x7 + +static void decode_LDSTii_0(unsigned int opcode) +{ + int reg = ((opcode >> LDSTii_reg_bit) & LDSTii_reg_mask); + int ptr = ((opcode >> LDSTii_ptr_bit) & LDSTii_ptr_mask); + int offset = ((opcode >> LDSTii_offset_bit) & LDSTii_offset_mask); + int op = ((opcode >> LDSTii_op_bit) & LDSTii_op_mask); + int W = ((opcode >> LDSTii_W_bit) & LDSTii_W_mask); + + if (W == 0) { + pr_cont("%s%i = %s[P%i + %i]", op == 3 ? "R" : "P", reg, + op == 1 || op == 2 ? "" : "W", ptr, offset); + if (op == 2) + pr_cont("(Z)"); + if (op == 3) + pr_cont("(X)"); + } else { + pr_cont("%s[P%i + %i] = %s%i", op == 0 ? "" : "W", ptr, + offset, op == 3 ? "P" : "R", reg); + } +} + +#define LDSTidxI_opcode 0xe4000000 +#define LDSTidxI_offset_bits 0 +#define LDSTidxI_offset_mask 0xffff +#define LDSTidxI_reg_bits 16 +#define LDSTidxI_reg_mask 0x7 +#define LDSTidxI_ptr_bits 19 +#define LDSTidxI_ptr_mask 0x7 +#define LDSTidxI_sz_bits 22 +#define LDSTidxI_sz_mask 0x3 +#define LDSTidxI_Z_bits 24 +#define LDSTidxI_Z_mask 0x1 +#define LDSTidxI_W_bits 25 +#define LDSTidxI_W_mask 0x1 +#define LDSTidxI_code_bits 26 +#define LDSTidxI_code_mask 0x3f + +static void decode_LDSTidxI_0(unsigned int opcode) +{ + int Z = ((opcode >> LDSTidxI_Z_bits) & LDSTidxI_Z_mask); + int W = ((opcode >> LDSTidxI_W_bits) & LDSTidxI_W_mask); + int sz = ((opcode >> LDSTidxI_sz_bits) & LDSTidxI_sz_mask); + int reg = ((opcode >> LDSTidxI_reg_bits) & LDSTidxI_reg_mask); + int ptr = ((opcode >> LDSTidxI_ptr_bits) & LDSTidxI_ptr_mask); + int offset = ((opcode >> LDSTidxI_offset_bits) & LDSTidxI_offset_mask); + + if (W == 0) + pr_cont("%s%i = ", sz == 0 && Z == 1 ? "P" : "R", reg); + + if (sz == 1) + pr_cont("W"); + if (sz == 2) + pr_cont("B"); + + pr_cont("[P%i + %s0x%x]", ptr, offset & 0x20 ? "-" : "", + (offset & 0x1f) << 2); + + if (W == 0 && sz != 0) { + if (Z) + pr_cont("(X)"); + else + pr_cont("(Z)"); + } + + if (W == 1) + pr_cont("= %s%i", (sz == 0 && Z == 1) ? "P" : "R", reg); + +} + +static void decode_opcode(unsigned int opcode) +{ +#ifdef CONFIG_BUG + if (opcode == BFIN_BUG_OPCODE) + pr_cont("BUG"); + else +#endif + if ((opcode & 0xffffff00) == ProgCtrl_opcode) + decode_ProgCtrl_0(opcode); + else if ((opcode & 0xfffff000) == BRCC_opcode) + decode_BRCC_0(opcode); + else if ((opcode & 0xfffff000) == 0x2000) + pr_cont("JUMP.S"); + else if ((opcode & 0xfe000000) == CALLa_opcode) + decode_CALLa_0(opcode); + else if ((opcode & 0xff8000C0) == LoopSetup_opcode) + decode_LoopSetup_0(opcode); + else if ((opcode & 0xfffffc00) == DspLDST_opcode) + decode_dspLDST_0(opcode); + else if ((opcode & 0xfffff000) == LDST_opcode) + decode_LDST_0(opcode); + else if ((opcode & 0xffffe000) == LDSTii_opcode) + decode_LDSTii_0(opcode); + else if ((opcode & 0xfc000000) == LDSTidxI_opcode) + decode_LDSTidxI_0(opcode); + else if (opcode & 0xffff0000) + pr_cont("0x%08x", opcode); + else + pr_cont("0x%04x", opcode); +} + +#define BIT_MULTI_INS 0x08000000 +static void decode_instruction(unsigned short *address) +{ + unsigned int opcode; + + if (!get_instruction(&opcode, address)) + return; + + decode_opcode(opcode); + + /* If things are a 32-bit instruction, it has the possibility of being + * a multi-issue instruction (a 32-bit, and 2 16 bit instrucitions) + * This test collidates with the unlink instruction, so disallow that + */ + if ((opcode & 0xc0000000) == 0xc0000000 && + (opcode & BIT_MULTI_INS) && + (opcode & 0xe8000000) != 0xe8000000) { + pr_cont(" || "); + if (!get_instruction(&opcode, address + 2)) + return; + decode_opcode(opcode); + pr_cont(" || "); + if (!get_instruction(&opcode, address + 3)) + return; + decode_opcode(opcode); + } +} +#endif + +void dump_bfin_trace_buffer(void) +{ +#ifdef CONFIG_DEBUG_BFIN_HWTRACE_ON + int tflags, i = 0, fault = 0; + char buf[150]; + unsigned short *addr; + unsigned int cpu = raw_smp_processor_id(); +#ifdef CONFIG_DEBUG_BFIN_HWTRACE_EXPAND + int j, index; +#endif + + trace_buffer_save(tflags); + + pr_notice("Hardware Trace:\n"); + +#ifdef CONFIG_DEBUG_BFIN_HWTRACE_EXPAND + pr_notice("WARNING: Expanded trace turned on - can not trace exceptions\n"); +#endif + + if (likely(bfin_read_TBUFSTAT() & TBUFCNT)) { + for (; bfin_read_TBUFSTAT() & TBUFCNT; i++) { + addr = (unsigned short *)bfin_read_TBUF(); + decode_address(buf, (unsigned long)addr); + pr_notice("%4i Target : %s\n", i, buf); + /* Normally, the faulting instruction doesn't go into + * the trace buffer, (since it doesn't commit), so + * we print out the fault address here + */ + if (!fault && addr == ((unsigned short *)evt_ivhw)) { + addr = (unsigned short *)bfin_read_TBUF(); + decode_address(buf, (unsigned long)addr); + pr_notice(" FAULT : %s ", buf); + decode_instruction(addr); + pr_cont("\n"); + fault = 1; + continue; + } + if (!fault && addr == (unsigned short *)trap && + (cpu_pda[cpu].seqstat & SEQSTAT_EXCAUSE) > VEC_EXCPT15) { + decode_address(buf, cpu_pda[cpu].icplb_fault_addr); + pr_notice(" FAULT : %s ", buf); + decode_instruction((unsigned short *)cpu_pda[cpu].icplb_fault_addr); + pr_cont("\n"); + fault = 1; + } + addr = (unsigned short *)bfin_read_TBUF(); + decode_address(buf, (unsigned long)addr); + pr_notice(" Source : %s ", buf); + decode_instruction(addr); + pr_cont("\n"); + } + } + +#ifdef CONFIG_DEBUG_BFIN_HWTRACE_EXPAND + if (trace_buff_offset) + index = trace_buff_offset / 4; + else + index = EXPAND_LEN; + + j = (1 << CONFIG_DEBUG_BFIN_HWTRACE_EXPAND_LEN) * 128; + while (j) { + decode_address(buf, software_trace_buff[index]); + pr_notice("%4i Target : %s\n", i, buf); + index -= 1; + if (index < 0) + index = EXPAND_LEN; + decode_address(buf, software_trace_buff[index]); + pr_notice(" Source : %s ", buf); + decode_instruction((unsigned short *)software_trace_buff[index]); + pr_cont("\n"); + index -= 1; + if (index < 0) + index = EXPAND_LEN; + j--; + i++; + } +#endif + + trace_buffer_restore(tflags); +#endif +} +EXPORT_SYMBOL(dump_bfin_trace_buffer); + +void dump_bfin_process(struct pt_regs *fp) +{ + /* We should be able to look at fp->ipend, but we don't push it on the + * stack all the time, so do this until we fix that */ + unsigned int context = bfin_read_IPEND(); + + if (oops_in_progress) + pr_emerg("Kernel OOPS in progress\n"); + + if (context & 0x0020 && (fp->seqstat & SEQSTAT_EXCAUSE) == VEC_HWERR) + pr_notice("HW Error context\n"); + else if (context & 0x0020) + pr_notice("Deferred Exception context\n"); + else if (context & 0x3FC0) + pr_notice("Interrupt context\n"); + else if (context & 0x4000) + pr_notice("Deferred Interrupt context\n"); + else if (context & 0x8000) + pr_notice("Kernel process context\n"); + + /* Because we are crashing, and pointers could be bad, we check things + * pretty closely before we use them + */ + if ((unsigned long)current >= FIXED_CODE_START && + !((unsigned long)current & 0x3) && current->pid) { + pr_notice("CURRENT PROCESS:\n"); + if (current->comm >= (char *)FIXED_CODE_START) + pr_notice("COMM=%s PID=%d", + current->comm, current->pid); + else + pr_notice("COMM= invalid"); + + pr_cont(" CPU=%d\n", current_thread_info()->cpu); + if (!((unsigned long)current->mm & 0x3) && + (unsigned long)current->mm >= FIXED_CODE_START) { + pr_notice("TEXT = 0x%p-0x%p DATA = 0x%p-0x%p\n", + (void *)current->mm->start_code, + (void *)current->mm->end_code, + (void *)current->mm->start_data, + (void *)current->mm->end_data); + pr_notice(" BSS = 0x%p-0x%p USER-STACK = 0x%p\n\n", + (void *)current->mm->end_data, + (void *)current->mm->brk, + (void *)current->mm->start_stack); + } else + pr_notice("invalid mm\n"); + } else + pr_notice("No Valid process in current context\n"); +} + +void dump_bfin_mem(struct pt_regs *fp) +{ + unsigned short *addr, *erraddr, val = 0, err = 0; + char sti = 0, buf[6]; + + erraddr = (void *)fp->pc; + + pr_notice("return address: [0x%p]; contents of:", erraddr); + + for (addr = (unsigned short *)((unsigned long)erraddr & ~0xF) - 0x10; + addr < (unsigned short *)((unsigned long)erraddr & ~0xF) + 0x10; + addr++) { + if (!((unsigned long)addr & 0xF)) + pr_notice("0x%p: ", addr); + + if (!get_mem16(&val, addr)) { + val = 0; + sprintf(buf, "????"); + } else + sprintf(buf, "%04x", val); + + if (addr == erraddr) { + pr_cont("[%s]", buf); + err = val; + } else + pr_cont(" %s ", buf); + + /* Do any previous instructions turn on interrupts? */ + if (addr <= erraddr && /* in the past */ + ((val >= 0x0040 && val <= 0x0047) || /* STI instruction */ + val == 0x017b)) /* [SP++] = RETI */ + sti = 1; + } + + pr_cont("\n"); + + /* Hardware error interrupts can be deferred */ + if (unlikely(sti && (fp->seqstat & SEQSTAT_EXCAUSE) == VEC_HWERR && + oops_in_progress)){ + pr_notice("Looks like this was a deferred error - sorry\n"); +#ifndef CONFIG_DEBUG_HWERR + pr_notice("The remaining message may be meaningless\n"); + pr_notice("You should enable CONFIG_DEBUG_HWERR to get a better idea where it came from\n"); +#else + /* If we are handling only one peripheral interrupt + * and current mm and pid are valid, and the last error + * was in that user space process's text area + * print it out - because that is where the problem exists + */ + if ((!(((fp)->ipend & ~0x30) & (((fp)->ipend & ~0x30) - 1))) && + (current->pid && current->mm)) { + /* And the last RETI points to the current userspace context */ + if ((fp + 1)->pc >= current->mm->start_code && + (fp + 1)->pc <= current->mm->end_code) { + pr_notice("It might be better to look around here :\n"); + pr_notice("-------------------------------------------\n"); + show_regs(fp + 1); + pr_notice("-------------------------------------------\n"); + } + } +#endif + } +} + +void show_regs(struct pt_regs *fp) +{ + char buf[150]; + struct irqaction *action; + unsigned int i; + unsigned long flags = 0; + unsigned int cpu = raw_smp_processor_id(); + unsigned char in_atomic = (bfin_read_IPEND() & 0x10) || in_atomic(); + + pr_notice("\n"); + show_regs_print_info(KERN_NOTICE); + + if (CPUID != bfin_cpuid()) + pr_notice("Compiled for cpu family 0x%04x (Rev %d), " + "but running on:0x%04x (Rev %d)\n", + CPUID, bfin_compiled_revid(), bfin_cpuid(), bfin_revid()); + + pr_notice("ADSP-%s-0.%d", + CPU, bfin_compiled_revid()); + + if (bfin_compiled_revid() != bfin_revid()) + pr_cont("(Detected 0.%d)", bfin_revid()); + + pr_cont(" %lu(MHz CCLK) %lu(MHz SCLK) (%s)\n", + get_cclk()/1000000, get_sclk()/1000000, +#ifdef CONFIG_MPU + "mpu on" +#else + "mpu off" +#endif + ); + + pr_notice("%s", linux_banner); + + pr_notice("\nSEQUENCER STATUS:\t\t%s\n", print_tainted()); + pr_notice(" SEQSTAT: %08lx IPEND: %04lx IMASK: %04lx SYSCFG: %04lx\n", + (long)fp->seqstat, fp->ipend, cpu_pda[raw_smp_processor_id()].ex_imask, fp->syscfg); + if (fp->ipend & EVT_IRPTEN) + pr_notice(" Global Interrupts Disabled (IPEND[4])\n"); + if (!(cpu_pda[raw_smp_processor_id()].ex_imask & (EVT_IVG13 | EVT_IVG12 | EVT_IVG11 | + EVT_IVG10 | EVT_IVG9 | EVT_IVG8 | EVT_IVG7 | EVT_IVTMR))) + pr_notice(" Peripheral interrupts masked off\n"); + if (!(cpu_pda[raw_smp_processor_id()].ex_imask & (EVT_IVG15 | EVT_IVG14))) + pr_notice(" Kernel interrupts masked off\n"); + if ((fp->seqstat & SEQSTAT_EXCAUSE) == VEC_HWERR) { + pr_notice(" HWERRCAUSE: 0x%lx\n", + (fp->seqstat & SEQSTAT_HWERRCAUSE) >> 14); +#ifdef EBIU_ERRMST + /* If the error was from the EBIU, print it out */ + if (bfin_read_EBIU_ERRMST() & CORE_ERROR) { + pr_notice(" EBIU Error Reason : 0x%04x\n", + bfin_read_EBIU_ERRMST()); + pr_notice(" EBIU Error Address : 0x%08x\n", + bfin_read_EBIU_ERRADD()); + } +#endif + } + pr_notice(" EXCAUSE : 0x%lx\n", + fp->seqstat & SEQSTAT_EXCAUSE); + for (i = 2; i <= 15 ; i++) { + if (fp->ipend & (1 << i)) { + if (i != 4) { + decode_address(buf, bfin_read32(EVT0 + 4*i)); + pr_notice(" physical IVG%i asserted : %s\n", i, buf); + } else + pr_notice(" interrupts disabled\n"); + } + } + + /* if no interrupts are going off, don't print this out */ + if (fp->ipend & ~0x3F) { + for (i = 0; i < (NR_IRQS - 1); i++) { + struct irq_desc *desc = irq_to_desc(i); + if (!in_atomic) + raw_spin_lock_irqsave(&desc->lock, flags); + + action = desc->action; + if (!action) + goto unlock; + + decode_address(buf, (unsigned int)action->handler); + pr_notice(" logical irq %3d mapped : %s", i, buf); + for (action = action->next; action; action = action->next) { + decode_address(buf, (unsigned int)action->handler); + pr_cont(", %s", buf); + } + pr_cont("\n"); +unlock: + if (!in_atomic) + raw_spin_unlock_irqrestore(&desc->lock, flags); + } + } + + decode_address(buf, fp->rete); + pr_notice(" RETE: %s\n", buf); + decode_address(buf, fp->retn); + pr_notice(" RETN: %s\n", buf); + decode_address(buf, fp->retx); + pr_notice(" RETX: %s\n", buf); + decode_address(buf, fp->rets); + pr_notice(" RETS: %s\n", buf); + decode_address(buf, fp->pc); + pr_notice(" PC : %s\n", buf); + + if (((long)fp->seqstat & SEQSTAT_EXCAUSE) && + (((long)fp->seqstat & SEQSTAT_EXCAUSE) != VEC_HWERR)) { + decode_address(buf, cpu_pda[cpu].dcplb_fault_addr); + pr_notice("DCPLB_FAULT_ADDR: %s\n", buf); + decode_address(buf, cpu_pda[cpu].icplb_fault_addr); + pr_notice("ICPLB_FAULT_ADDR: %s\n", buf); + } + + pr_notice("PROCESSOR STATE:\n"); + pr_notice(" R0 : %08lx R1 : %08lx R2 : %08lx R3 : %08lx\n", + fp->r0, fp->r1, fp->r2, fp->r3); + pr_notice(" R4 : %08lx R5 : %08lx R6 : %08lx R7 : %08lx\n", + fp->r4, fp->r5, fp->r6, fp->r7); + pr_notice(" P0 : %08lx P1 : %08lx P2 : %08lx P3 : %08lx\n", + fp->p0, fp->p1, fp->p2, fp->p3); + pr_notice(" P4 : %08lx P5 : %08lx FP : %08lx SP : %08lx\n", + fp->p4, fp->p5, fp->fp, (long)fp); + pr_notice(" LB0: %08lx LT0: %08lx LC0: %08lx\n", + fp->lb0, fp->lt0, fp->lc0); + pr_notice(" LB1: %08lx LT1: %08lx LC1: %08lx\n", + fp->lb1, fp->lt1, fp->lc1); + pr_notice(" B0 : %08lx L0 : %08lx M0 : %08lx I0 : %08lx\n", + fp->b0, fp->l0, fp->m0, fp->i0); + pr_notice(" B1 : %08lx L1 : %08lx M1 : %08lx I1 : %08lx\n", + fp->b1, fp->l1, fp->m1, fp->i1); + pr_notice(" B2 : %08lx L2 : %08lx M2 : %08lx I2 : %08lx\n", + fp->b2, fp->l2, fp->m2, fp->i2); + pr_notice(" B3 : %08lx L3 : %08lx M3 : %08lx I3 : %08lx\n", + fp->b3, fp->l3, fp->m3, fp->i3); + pr_notice("A0.w: %08lx A0.x: %08lx A1.w: %08lx A1.x: %08lx\n", + fp->a0w, fp->a0x, fp->a1w, fp->a1x); + + pr_notice("USP : %08lx ASTAT: %08lx\n", + rdusp(), fp->astat); + + pr_notice("\n"); +} diff --git a/arch/blackfin/kernel/traps.c b/arch/blackfin/kernel/traps.c index 56a67ab698c..de5c2c3ebd9 100644 --- a/arch/blackfin/kernel/traps.c +++ b/arch/blackfin/kernel/traps.c @@ -1,53 +1,30 @@ /* - * File: arch/blackfin/kernel/traps.c - * Based on: - * Author: Hamish Macdonald + * Main exception handling logic. * - * Created: - * Description: uses S/W interrupt 15 for the system calls + * Copyright 2004-2010 Analog Devices Inc. * - * Modified: - * Copyright 2004-2006 Analog Devices Inc. - * - * Bugs: Enter bugs at http://blackfin.uclinux.org/ - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, see the file COPYING, or write - * to the Free Software Foundation, Inc., - * 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA + * Licensed under the GPL-2 or later */ +#include <linux/bug.h> #include <linux/uaccess.h> -#include <linux/interrupt.h> #include <linux/module.h> -#include <linux/kallsyms.h> -#include <linux/fs.h> #include <asm/traps.h> -#include <asm/cacheflush.h> +#include <asm/cplb.h> #include <asm/blackfin.h> #include <asm/irq_handler.h> #include <linux/irq.h> #include <asm/trace.h> #include <asm/fixed_code.h> -#include <asm/dma.h> +#include <asm/pseudo_instructions.h> +#include <asm/pda.h> #ifdef CONFIG_KGDB -# include <linux/debugger.h> # include <linux/kgdb.h> # define CHK_DEBUGGER_TRAP() \ do { \ - CHK_DEBUGGER(trapnr, sig, info.si_code, fp, ); \ + kgdb_handle_exception(trapnr, sig, info.si_code, fp); \ } while (0) # define CHK_DEBUGGER_TRAP_MAYBE() \ do { \ @@ -59,6 +36,22 @@ # define CHK_DEBUGGER_TRAP_MAYBE() do { } while (0) #endif + +#ifdef CONFIG_DEBUG_VERBOSE +#define verbose_printk(fmt, arg...) \ + printk(fmt, ##arg) +#else +#define verbose_printk(fmt, arg...) \ + ({ if (0) printk(fmt, ##arg); 0; }) +#endif + +#if defined(CONFIG_DEBUG_MMRS) || defined(CONFIG_DEBUG_MMRS_MODULE) +u32 last_seqstat; +#ifdef CONFIG_DEBUG_MMRS_MODULE +EXPORT_SYMBOL(last_seqstat); +#endif +#endif + /* Initiate the event table handler */ void __init trap_init(void) { @@ -67,152 +60,34 @@ void __init trap_init(void) CSYNC(); } -int kstack_depth_to_print = 48; - -static void decode_address(char *buf, unsigned long address) +static int kernel_mode_regs(struct pt_regs *regs) { - struct vm_list_struct *vml; - struct task_struct *p; - struct mm_struct *mm; - unsigned long flags, offset; - unsigned int in_exception = bfin_read_IPEND() & 0x10; - -#ifdef CONFIG_KALLSYMS - unsigned long symsize; - const char *symname; - char *modname; - char *delim = ":"; - char namebuf[128]; - - /* look up the address and see if we are in kernel space */ - symname = kallsyms_lookup(address, &symsize, &offset, &modname, namebuf); - - if (symname) { - /* yeah! kernel space! */ - if (!modname) - modname = delim = ""; - sprintf(buf, "<0x%p> { %s%s%s%s + 0x%lx }", - (void *)address, delim, modname, delim, symname, - (unsigned long)offset); - return; - - } -#endif - - /* Problem in fixed code section? */ - if (address >= FIXED_CODE_START && address < FIXED_CODE_END) { - sprintf(buf, "<0x%p> /* Maybe fixed code section */", (void *)address); - return; - } - - /* Problem somewhere before the kernel start address */ - if (address < CONFIG_BOOT_LOAD) { - sprintf(buf, "<0x%p> /* Maybe null pointer? */", (void *)address); - return; - } - - /* looks like we're off in user-land, so let's walk all the - * mappings of all our processes and see if we can't be a whee - * bit more specific - */ - write_lock_irqsave(&tasklist_lock, flags); - for_each_process(p) { - mm = (in_exception ? p->mm : get_task_mm(p)); - if (!mm) - continue; - - vml = mm->context.vmlist; - while (vml) { - struct vm_area_struct *vma = vml->vma; - - if (address >= vma->vm_start && address < vma->vm_end) { - char _tmpbuf[256]; - char *name = p->comm; - struct file *file = vma->vm_file; - - if (file) - name = d_path(&file->f_path, _tmpbuf, - sizeof(_tmpbuf)); - - /* FLAT does not have its text aligned to the start of - * the map while FDPIC ELF does ... - */ - if (current->mm && - (address > current->mm->start_code) && - (address < current->mm->end_code)) - offset = address - current->mm->start_code; - else - offset = (address - vma->vm_start) + (vma->vm_pgoff << PAGE_SHIFT); - - sprintf(buf, "<0x%p> [ %s + 0x%lx ]", - (void *)address, name, offset); - if (!in_exception) - mmput(mm); - goto done; - } - - vml = vml->next; - } - if (!in_exception) - mmput(mm); - } - - /* we were unable to find this address anywhere */ - sprintf(buf, "<0x%p> /* unknown address */", (void *)address); - -done: - write_unlock_irqrestore(&tasklist_lock, flags); + return regs->ipend & 0xffc0; } -asmlinkage void double_fault_c(struct pt_regs *fp) -{ - console_verbose(); - oops_in_progress = 1; - printk(KERN_EMERG "\n" KERN_EMERG "Double Fault\n"); - dump_bfin_process(fp); - dump_bfin_mem(fp); - show_regs(fp); - panic("Double Fault - unrecoverable event\n"); - -} - -asmlinkage void trap_c(struct pt_regs *fp) +asmlinkage notrace void trap_c(struct pt_regs *fp) { #ifdef CONFIG_DEBUG_BFIN_HWTRACE_ON int j; #endif +#ifdef CONFIG_BFIN_PSEUDODBG_INSNS + int opcode; +#endif + unsigned int cpu = raw_smp_processor_id(); + const char *strerror = NULL; int sig = 0; siginfo_t info; unsigned long trapnr = fp->seqstat & SEQSTAT_EXCAUSE; trace_buffer_save(j); +#if defined(CONFIG_DEBUG_MMRS) || defined(CONFIG_DEBUG_MMRS_MODULE) + last_seqstat = (u32)fp->seqstat; +#endif /* Important - be very careful dereferncing pointers - will lead to * double faults if the stack has become corrupt */ - /* If the fault was caused by a kernel thread, or interrupt handler - * we will kernel panic, so the system reboots. - * If KGDB is enabled, don't set this for kernel breakpoints - */ - - /* TODO: check to see if we are in some sort of deferred HWERR - * that we should be able to recover from, not kernel panic - */ - if ((bfin_read_IPEND() & 0xFFC0) && (trapnr != VEC_STEP) -#ifdef CONFIG_KGDB - && (trapnr != VEC_EXCPT02) -#endif - ){ - console_verbose(); - oops_in_progress = 1; - } else if (current) { - if (current->mm == NULL) { - console_verbose(); - oops_in_progress = 1; - } - } - /* trap_c() will be called for exceptions. During exceptions * processing, the pc value should be set with retx value. * With this change we can cleanup some code in signal.c- TODO @@ -224,7 +99,7 @@ asmlinkage void trap_c(struct pt_regs *fp) /* send the appropriate signal to the user program */ switch (trapnr) { - /* This table works in conjuction with the one in ./mach-common/entry.S + /* This table works in conjunction with the one in ./mach-common/entry.S * Some exceptions are handled there (in assembly, in exception space) * Some are handled here, (in C, in interrupt space) * Some, like CPLB, are handled in both, where the normal path is @@ -239,54 +114,62 @@ asmlinkage void trap_c(struct pt_regs *fp) sig = SIGTRAP; CHK_DEBUGGER_TRAP_MAYBE(); /* Check if this is a breakpoint in kernel space */ - if (fp->ipend & 0xffc0) - return; + if (kernel_mode_regs(fp)) + goto traps_done; else break; -#ifdef CONFIG_KGDB - case VEC_EXCPT02 : /* gdb connection */ - info.si_code = TRAP_ILLTRAP; - sig = SIGTRAP; - CHK_DEBUGGER_TRAP(); - return; -#else - /* 0x02 - User Defined, Caught by default */ -#endif /* 0x03 - User Defined, userspace stack overflow */ case VEC_EXCPT03: info.si_code = SEGV_STACKFLOW; sig = SIGSEGV; - printk(KERN_NOTICE EXC_0x03(KERN_NOTICE)); + strerror = KERN_NOTICE EXC_0x03(KERN_NOTICE); + CHK_DEBUGGER_TRAP_MAYBE(); + break; + /* 0x02 - KGDB initial connection and break signal trap */ + case VEC_EXCPT02: +#ifdef CONFIG_KGDB + info.si_code = TRAP_ILLTRAP; + sig = SIGTRAP; CHK_DEBUGGER_TRAP(); + goto traps_done; +#endif + /* 0x04 - User Defined */ + /* 0x05 - User Defined */ + /* 0x06 - User Defined */ + /* 0x07 - User Defined */ + /* 0x08 - User Defined */ + /* 0x09 - User Defined */ + /* 0x0A - User Defined */ + /* 0x0B - User Defined */ + /* 0x0C - User Defined */ + /* 0x0D - User Defined */ + /* 0x0E - User Defined */ + /* 0x0F - User Defined */ + /* If we got here, it is most likely that someone was trying to use a + * custom exception handler, and it is not actually installed properly + */ + case VEC_EXCPT04 ... VEC_EXCPT15: + info.si_code = ILL_ILLPARAOP; + sig = SIGILL; + strerror = KERN_NOTICE EXC_0x04(KERN_NOTICE); + CHK_DEBUGGER_TRAP_MAYBE(); break; - /* 0x04 - User Defined, Caught by default */ - /* 0x05 - User Defined, Caught by default */ - /* 0x06 - User Defined, Caught by default */ - /* 0x07 - User Defined, Caught by default */ - /* 0x08 - User Defined, Caught by default */ - /* 0x09 - User Defined, Caught by default */ - /* 0x0A - User Defined, Caught by default */ - /* 0x0B - User Defined, Caught by default */ - /* 0x0C - User Defined, Caught by default */ - /* 0x0D - User Defined, Caught by default */ - /* 0x0E - User Defined, Caught by default */ - /* 0x0F - User Defined, Caught by default */ /* 0x10 HW Single step, handled here */ case VEC_STEP: info.si_code = TRAP_STEP; sig = SIGTRAP; CHK_DEBUGGER_TRAP_MAYBE(); /* Check if this is a single step in kernel space */ - if (fp->ipend & 0xffc0) - return; + if (kernel_mode_regs(fp)) + goto traps_done; else break; /* 0x11 - Trace Buffer Full, handled here */ case VEC_OVFLOW: info.si_code = TRAP_TRACEFLOW; sig = SIGTRAP; - printk(KERN_NOTICE EXC_0x11(KERN_NOTICE)); - CHK_DEBUGGER_TRAP(); + strerror = KERN_NOTICE EXC_0x11(KERN_NOTICE); + CHK_DEBUGGER_TRAP_MAYBE(); break; /* 0x12 - Reserved, Caught by default */ /* 0x13 - Reserved, Caught by default */ @@ -305,58 +188,87 @@ asmlinkage void trap_c(struct pt_regs *fp) /* 0x20 - Reserved, Caught by default */ /* 0x21 - Undefined Instruction, handled here */ case VEC_UNDEF_I: +#ifdef CONFIG_BUG + if (kernel_mode_regs(fp)) { + switch (report_bug(fp->pc, fp)) { + case BUG_TRAP_TYPE_NONE: + break; + case BUG_TRAP_TYPE_WARN: + dump_bfin_trace_buffer(); + fp->pc += 2; + goto traps_done; + case BUG_TRAP_TYPE_BUG: + /* call to panic() will dump trace, and it is + * off at this point, so it won't be clobbered + */ + panic("BUG()"); + } + } +#endif +#ifdef CONFIG_BFIN_PSEUDODBG_INSNS + /* + * Support for the fake instructions, if the instruction fails, + * then just execute a illegal opcode failure (like normal). + * Don't support these instructions inside the kernel + */ + if (!kernel_mode_regs(fp) && get_instruction(&opcode, (unsigned short *)fp->pc)) { + if (execute_pseudodbg_assert(fp, opcode)) + goto traps_done; + if (execute_pseudodbg(fp, opcode)) + goto traps_done; + } +#endif info.si_code = ILL_ILLOPC; sig = SIGILL; - printk(KERN_NOTICE EXC_0x21(KERN_NOTICE)); - CHK_DEBUGGER_TRAP(); + strerror = KERN_NOTICE EXC_0x21(KERN_NOTICE); + CHK_DEBUGGER_TRAP_MAYBE(); break; /* 0x22 - Illegal Instruction Combination, handled here */ case VEC_ILGAL_I: info.si_code = ILL_ILLPARAOP; sig = SIGILL; - printk(KERN_NOTICE EXC_0x22(KERN_NOTICE)); - CHK_DEBUGGER_TRAP(); + strerror = KERN_NOTICE EXC_0x22(KERN_NOTICE); + CHK_DEBUGGER_TRAP_MAYBE(); break; /* 0x23 - Data CPLB protection violation, handled here */ case VEC_CPLB_VL: info.si_code = ILL_CPLB_VI; - sig = SIGBUS; - printk(KERN_NOTICE EXC_0x23(KERN_NOTICE)); - CHK_DEBUGGER_TRAP(); + sig = SIGSEGV; + strerror = KERN_NOTICE EXC_0x23(KERN_NOTICE); + CHK_DEBUGGER_TRAP_MAYBE(); break; /* 0x24 - Data access misaligned, handled here */ case VEC_MISALI_D: info.si_code = BUS_ADRALN; sig = SIGBUS; - printk(KERN_NOTICE EXC_0x24(KERN_NOTICE)); - CHK_DEBUGGER_TRAP(); + strerror = KERN_NOTICE EXC_0x24(KERN_NOTICE); + CHK_DEBUGGER_TRAP_MAYBE(); break; /* 0x25 - Unrecoverable Event, handled here */ case VEC_UNCOV: info.si_code = ILL_ILLEXCPT; sig = SIGILL; - printk(KERN_NOTICE EXC_0x25(KERN_NOTICE)); - CHK_DEBUGGER_TRAP(); + strerror = KERN_NOTICE EXC_0x25(KERN_NOTICE); + CHK_DEBUGGER_TRAP_MAYBE(); break; /* 0x26 - Data CPLB Miss, normal case is handled in _cplb_hdr, error case is handled here */ case VEC_CPLB_M: info.si_code = BUS_ADRALN; sig = SIGBUS; - printk(KERN_NOTICE EXC_0x26(KERN_NOTICE)); - CHK_DEBUGGER_TRAP(); + strerror = KERN_NOTICE EXC_0x26(KERN_NOTICE); break; /* 0x27 - Data CPLB Multiple Hits - Linux Trap Zero, handled here */ case VEC_CPLB_MHIT: info.si_code = ILL_CPLB_MULHIT; -#ifdef CONFIG_DEBUG_HUNT_FOR_ZERO sig = SIGSEGV; - printk(KERN_NOTICE "NULL pointer access (probably)\n"); -#else - sig = SIGILL; - printk(KERN_NOTICE EXC_0x27(KERN_NOTICE)); +#ifdef CONFIG_DEBUG_HUNT_FOR_ZERO + if (cpu_pda[cpu].dcplb_fault_addr < FIXED_CODE_START) + strerror = KERN_NOTICE "NULL pointer access\n"; + else #endif - CHK_DEBUGGER_TRAP(); + strerror = KERN_NOTICE EXC_0x27(KERN_NOTICE); + CHK_DEBUGGER_TRAP_MAYBE(); break; /* 0x28 - Emulation Watchpoint, handled here */ case VEC_WATCH: @@ -365,8 +277,8 @@ asmlinkage void trap_c(struct pt_regs *fp) pr_debug(EXC_0x28(KERN_DEBUG)); CHK_DEBUGGER_TRAP_MAYBE(); /* Check if this is a watchpoint in kernel space */ - if (fp->ipend & 0xffc0) - return; + if (kernel_mode_regs(fp)) + goto traps_done; else break; #ifdef CONFIG_BF535 @@ -374,8 +286,8 @@ asmlinkage void trap_c(struct pt_regs *fp) case VEC_ISTRU_VL: /* ADSP-BF535 only (MH) */ info.si_code = BUS_OPFETCH; sig = SIGBUS; - printk(KERN_NOTICE "BF535: VEC_ISTRU_VL\n"); - CHK_DEBUGGER_TRAP(); + strerror = KERN_NOTICE "BF535: VEC_ISTRU_VL\n"; + CHK_DEBUGGER_TRAP_MAYBE(); break; #else /* 0x29 - Reserved, Caught by default */ @@ -384,41 +296,40 @@ asmlinkage void trap_c(struct pt_regs *fp) case VEC_MISALI_I: info.si_code = BUS_ADRALN; sig = SIGBUS; - printk(KERN_NOTICE EXC_0x2A(KERN_NOTICE)); - CHK_DEBUGGER_TRAP(); + strerror = KERN_NOTICE EXC_0x2A(KERN_NOTICE); + CHK_DEBUGGER_TRAP_MAYBE(); break; /* 0x2B - Instruction CPLB protection violation, handled here */ case VEC_CPLB_I_VL: info.si_code = ILL_CPLB_VI; sig = SIGBUS; - printk(KERN_NOTICE EXC_0x2B(KERN_NOTICE)); - CHK_DEBUGGER_TRAP(); + strerror = KERN_NOTICE EXC_0x2B(KERN_NOTICE); + CHK_DEBUGGER_TRAP_MAYBE(); break; /* 0x2C - Instruction CPLB miss, handled in _cplb_hdr */ case VEC_CPLB_I_M: info.si_code = ILL_CPLB_MISS; sig = SIGBUS; - printk(KERN_NOTICE EXC_0x2C(KERN_NOTICE)); - CHK_DEBUGGER_TRAP(); + strerror = KERN_NOTICE EXC_0x2C(KERN_NOTICE); break; /* 0x2D - Instruction CPLB Multiple Hits, handled here */ case VEC_CPLB_I_MHIT: info.si_code = ILL_CPLB_MULHIT; -#ifdef CONFIG_DEBUG_HUNT_FOR_ZERO sig = SIGSEGV; - printk(KERN_NOTICE "Jump to address 0 - 0x0fff\n"); -#else - sig = SIGILL; - printk(KERN_NOTICE EXC_0x2D(KERN_NOTICE)); +#ifdef CONFIG_DEBUG_HUNT_FOR_ZERO + if (cpu_pda[cpu].icplb_fault_addr < FIXED_CODE_START) + strerror = KERN_NOTICE "Jump to NULL address\n"; + else #endif - CHK_DEBUGGER_TRAP(); + strerror = KERN_NOTICE EXC_0x2D(KERN_NOTICE); + CHK_DEBUGGER_TRAP_MAYBE(); break; /* 0x2E - Illegal use of Supervisor Resource, handled here */ case VEC_ILL_RES: info.si_code = ILL_PRVOPC; sig = SIGILL; - printk(KERN_NOTICE EXC_0x2E(KERN_NOTICE)); - CHK_DEBUGGER_TRAP(); + strerror = KERN_NOTICE EXC_0x2E(KERN_NOTICE); + CHK_DEBUGGER_TRAP_MAYBE(); break; /* 0x2F - Reserved, Caught by default */ /* 0x30 - Reserved, Caught by default */ @@ -445,17 +356,47 @@ asmlinkage void trap_c(struct pt_regs *fp) case (SEQSTAT_HWERRCAUSE_SYSTEM_MMR): info.si_code = BUS_ADRALN; sig = SIGBUS; - printk(KERN_NOTICE HWC_x2(KERN_NOTICE)); + strerror = KERN_NOTICE HWC_x2(KERN_NOTICE); break; /* External Memory Addressing Error */ case (SEQSTAT_HWERRCAUSE_EXTERN_ADDR): + if (ANOMALY_05000310) { + static unsigned long anomaly_rets; + + if ((fp->pc >= (L1_CODE_START + L1_CODE_LENGTH - 512)) && + (fp->pc < (L1_CODE_START + L1_CODE_LENGTH))) { + /* + * A false hardware error will happen while fetching at + * the L1 instruction SRAM boundary. Ignore it. + */ + anomaly_rets = fp->rets; + goto traps_done; + } else if (fp->rets == anomaly_rets) { + /* + * While boundary code returns to a function, at the ret + * point, a new false hardware error might occur too based + * on tests. Ignore it too. + */ + goto traps_done; + } else if ((fp->rets >= (L1_CODE_START + L1_CODE_LENGTH - 512)) && + (fp->rets < (L1_CODE_START + L1_CODE_LENGTH))) { + /* + * If boundary code calls a function, at the entry point, + * a new false hardware error maybe happen based on tests. + * Ignore it too. + */ + goto traps_done; + } else + anomaly_rets = 0; + } + info.si_code = BUS_ADRERR; sig = SIGBUS; - printk(KERN_NOTICE HWC_x3(KERN_NOTICE)); + strerror = KERN_NOTICE HWC_x3(KERN_NOTICE); break; /* Performance Monitor Overflow */ case (SEQSTAT_HWERRCAUSE_PERF_FLOW): - printk(KERN_NOTICE HWC_x12(KERN_NOTICE)); + strerror = KERN_NOTICE HWC_x12(KERN_NOTICE); break; /* RAISE 5 instruction */ case (SEQSTAT_HWERRCAUSE_RAISE_5): @@ -465,21 +406,35 @@ asmlinkage void trap_c(struct pt_regs *fp) printk(KERN_NOTICE HWC_default(KERN_NOTICE)); break; } - CHK_DEBUGGER_TRAP(); + CHK_DEBUGGER_TRAP_MAYBE(); break; + /* + * We should be handling all known exception types above, + * if we get here we hit a reserved one, so panic + */ default: - info.si_code = TRAP_ILLTRAP; - sig = SIGTRAP; - printk(KERN_EMERG "Caught Unhandled Exception, code = %08lx\n", + info.si_code = ILL_ILLPARAOP; + sig = SIGILL; + verbose_printk(KERN_EMERG "Caught Unhandled Exception, code = %08lx\n", (fp->seqstat & SEQSTAT_EXCAUSE)); - CHK_DEBUGGER_TRAP(); + CHK_DEBUGGER_TRAP_MAYBE(); break; } BUG_ON(sig == 0); + /* If the fault was caused by a kernel thread, or interrupt handler + * we will kernel panic, so the system reboots. + */ + if (kernel_mode_regs(fp) || (current && !current->mm)) { + console_verbose(); + oops_in_progress = 1; + } + if (sig != SIGTRAP) { - unsigned long stack; + if (strerror) + verbose_printk(strerror); + dump_bfin_process(fp); dump_bfin_mem(fp); show_regs(fp); @@ -487,418 +442,100 @@ asmlinkage void trap_c(struct pt_regs *fp) /* Print out the trace buffer if it makes sense */ #ifndef CONFIG_DEBUG_BFIN_NO_KERN_HWTRACE if (trapnr == VEC_CPLB_I_M || trapnr == VEC_CPLB_M) - printk(KERN_NOTICE "No trace since you do not have " - "CONFIG_DEBUG_BFIN_NO_KERN_HWTRACE enabled\n" - KERN_NOTICE "\n"); + verbose_printk(KERN_NOTICE "No trace since you do not have " + "CONFIG_DEBUG_BFIN_NO_KERN_HWTRACE enabled\n\n"); else #endif dump_bfin_trace_buffer(); - show_stack(current, &stack); + if (oops_in_progress) { + /* Dump the current kernel stack */ + verbose_printk(KERN_NOTICE "Kernel Stack\n"); + show_stack(current, NULL); print_modules(); #ifndef CONFIG_ACCESS_CHECK - printk(KERN_EMERG "Please turn on " + verbose_printk(KERN_EMERG "Please turn on " "CONFIG_ACCESS_CHECK\n"); #endif panic("Kernel exception"); - } - } - - info.si_signo = sig; - info.si_errno = 0; - info.si_addr = (void *)fp->pc; - force_sig_info(sig, &info, current); - - trace_buffer_restore(j); - return; -} - -/* Typical exception handling routines */ - -#define EXPAND_LEN ((1 << CONFIG_DEBUG_BFIN_HWTRACE_EXPAND_LEN) * 256 - 1) - -void dump_bfin_trace_buffer(void) -{ -#ifdef CONFIG_DEBUG_BFIN_HWTRACE_ON - int tflags, i = 0; - char buf[150]; -#ifdef CONFIG_DEBUG_BFIN_HWTRACE_EXPAND - int j, index; + } else { +#ifdef CONFIG_DEBUG_VERBOSE + unsigned long *stack; + /* Dump the user space stack */ + stack = (unsigned long *)rdusp(); + verbose_printk(KERN_NOTICE "Userspace Stack\n"); + show_stack(NULL, stack); #endif - - trace_buffer_save(tflags); - - printk(KERN_NOTICE "Hardware Trace:\n"); - - if (likely(bfin_read_TBUFSTAT() & TBUFCNT)) { - for (; bfin_read_TBUFSTAT() & TBUFCNT; i++) { - decode_address(buf, (unsigned long)bfin_read_TBUF()); - printk(KERN_NOTICE "%4i Target : %s\n", i, buf); - decode_address(buf, (unsigned long)bfin_read_TBUF()); - printk(KERN_NOTICE " Source : %s\n", buf); } } -#ifdef CONFIG_DEBUG_BFIN_HWTRACE_EXPAND - if (trace_buff_offset) - index = trace_buff_offset/4 - 1; - else - index = EXPAND_LEN; - - j = (1 << CONFIG_DEBUG_BFIN_HWTRACE_EXPAND_LEN) * 128; - while (j) { - decode_address(buf, software_trace_buff[index]); - printk(KERN_NOTICE "%4i Target : %s\n", i, buf); - index -= 1; - if (index < 0 ) - index = EXPAND_LEN; - decode_address(buf, software_trace_buff[index]); - printk(KERN_NOTICE " Source : %s\n", buf); - index -= 1; - if (index < 0) - index = EXPAND_LEN; - j--; - i++; - } +#ifdef CONFIG_IPIPE + if (!ipipe_trap_notify(fp->seqstat & 0x3f, fp)) #endif - - trace_buffer_restore(tflags); -#endif -} -EXPORT_SYMBOL(dump_bfin_trace_buffer); - -static void show_trace(struct task_struct *tsk, unsigned long *sp) -{ - unsigned long addr; - - printk(KERN_NOTICE "\n" KERN_NOTICE "Call Trace:\n"); - - while (!kstack_end(sp)) { - addr = *sp++; - /* - * If the address is either in the text segment of the - * kernel, or in the region which contains vmalloc'ed - * memory, it *may* be the address of a calling - * routine; if so, print it so that someone tracing - * down the cause of the crash will be able to figure - * out the call path that was taken. - */ - if (kernel_text_address(addr)) - print_ip_sym(addr); - } - - printk(KERN_NOTICE "\n"); -} - -void show_stack(struct task_struct *task, unsigned long *stack) -{ - unsigned long *endstack, addr; - int i; - - /* Cannot call dump_bfin_trace_buffer() here as show_stack() is - * called externally in some places in the kernel. - */ - - if (!stack) { - if (task) - stack = (unsigned long *)task->thread.ksp; - else - stack = (unsigned long *)&stack; - } - - addr = (unsigned long)stack; - endstack = (unsigned long *)PAGE_ALIGN(addr); - - printk(KERN_NOTICE "Stack from %08lx:", (unsigned long)stack); - for (i = 0; i < kstack_depth_to_print; i++) { - if (stack + 1 > endstack) + { + info.si_signo = sig; + info.si_errno = 0; + switch (trapnr) { + case VEC_CPLB_VL: + case VEC_MISALI_D: + case VEC_CPLB_M: + case VEC_CPLB_MHIT: + info.si_addr = (void __user *)cpu_pda[cpu].dcplb_fault_addr; break; - if (i % 8 == 0) - printk("\n" KERN_NOTICE " "); - printk(" %08lx", *stack++); + default: + info.si_addr = (void __user *)fp->pc; + break; + } + force_sig_info(sig, &info, current); } - printk("\n"); - show_trace(task, stack); + if ((ANOMALY_05000461 && trapnr == VEC_HWERR && !access_ok(VERIFY_READ, fp->pc, 8)) || + (ANOMALY_05000281 && trapnr == VEC_HWERR) || + (ANOMALY_05000189 && (trapnr == VEC_CPLB_I_VL || trapnr == VEC_CPLB_VL))) + fp->pc = SAFE_USER_INSTRUCTION; + + traps_done: + trace_buffer_restore(j); } -void dump_stack(void) +asmlinkage void double_fault_c(struct pt_regs *fp) { - unsigned long stack; #ifdef CONFIG_DEBUG_BFIN_HWTRACE_ON - int tflags; + int j; + trace_buffer_save(j); #endif - trace_buffer_save(tflags); - dump_bfin_trace_buffer(); - show_stack(current, &stack); - trace_buffer_restore(tflags); -} -EXPORT_SYMBOL(dump_stack); -void dump_bfin_process(struct pt_regs *fp) -{ - /* We should be able to look at fp->ipend, but we don't push it on the - * stack all the time, so do this until we fix that */ - unsigned int context = bfin_read_IPEND(); - - if (oops_in_progress) - printk(KERN_EMERG "Kernel OOPS in progress\n"); - - if (context & 0x0020 && (fp->seqstat & SEQSTAT_EXCAUSE) == VEC_HWERR) - printk(KERN_NOTICE "HW Error context\n"); - else if (context & 0x0020) - printk(KERN_NOTICE "Deferred Exception context\n"); - else if (context & 0x3FC0) - printk(KERN_NOTICE "Interrupt context\n"); - else if (context & 0x4000) - printk(KERN_NOTICE "Deferred Interrupt context\n"); - else if (context & 0x8000) - printk(KERN_NOTICE "Kernel process context\n"); - - if (current->pid && current->mm) { - printk(KERN_NOTICE "CURRENT PROCESS:\n"); - printk(KERN_NOTICE "COMM=%s PID=%d\n", - current->comm, current->pid); - - printk(KERN_NOTICE "TEXT = 0x%p-0x%p DATA = 0x%p-0x%p\n" - KERN_NOTICE "BSS = 0x%p-0x%p USER-STACK = 0x%p\n" - KERN_NOTICE "\n", - (void *)current->mm->start_code, - (void *)current->mm->end_code, - (void *)current->mm->start_data, - (void *)current->mm->end_data, - (void *)current->mm->end_data, - (void *)current->mm->brk, - (void *)current->mm->start_stack); + console_verbose(); + oops_in_progress = 1; +#ifdef CONFIG_DEBUG_VERBOSE + printk(KERN_EMERG "Double Fault\n"); +#ifdef CONFIG_DEBUG_DOUBLEFAULT_PRINT + if (((long)fp->seqstat & SEQSTAT_EXCAUSE) == VEC_UNCOV) { + unsigned int cpu = raw_smp_processor_id(); + char buf[150]; + decode_address(buf, cpu_pda[cpu].retx_doublefault); + printk(KERN_EMERG "While handling exception (EXCAUSE = 0x%x) at %s:\n", + (unsigned int)cpu_pda[cpu].seqstat_doublefault & SEQSTAT_EXCAUSE, buf); + decode_address(buf, cpu_pda[cpu].dcplb_doublefault_addr); + printk(KERN_NOTICE " DCPLB_FAULT_ADDR: %s\n", buf); + decode_address(buf, cpu_pda[cpu].icplb_doublefault_addr); + printk(KERN_NOTICE " ICPLB_FAULT_ADDR: %s\n", buf); + + decode_address(buf, fp->retx); + printk(KERN_NOTICE "The instruction at %s caused a double exception\n", buf); } else - printk(KERN_NOTICE "\n" KERN_NOTICE - "No Valid process in current context\n"); -} - -void dump_bfin_mem(struct pt_regs *fp) -{ - unsigned short *addr, *erraddr, val = 0, err = 0; - char sti = 0, buf[6]; - - if (unlikely((fp->seqstat & SEQSTAT_EXCAUSE) == VEC_HWERR)) - erraddr = (void *)fp->pc; - else - erraddr = (void *)fp->retx; - - printk(KERN_NOTICE "return address: [0x%p]; contents of:", erraddr); - - for (addr = (unsigned short *)((unsigned long)erraddr & ~0xF) - 0x10; - addr < (unsigned short *)((unsigned long)erraddr & ~0xF) + 0x10; - addr++) { - if (!((unsigned long)addr & 0xF)) - printk("\n" KERN_NOTICE "0x%p: ", addr); - - if (get_user(val, addr)) { - if (addr >= (unsigned short *)L1_CODE_START && - addr < (unsigned short *)(L1_CODE_START + L1_CODE_LENGTH)) { - dma_memcpy(&val, addr, sizeof(val)); - sprintf(buf, "%04x", val); - } else if (addr >= (unsigned short *)FIXED_CODE_START && - addr <= (unsigned short *)memory_start) { - val = bfin_read16(addr); - sprintf(buf, "%04x", val); - } else { - val = 0; - sprintf(buf, "????"); - } - } else - sprintf(buf, "%04x", val); - - if (addr == erraddr) { - printk("[%s]", buf); - err = val; - } else - printk(" %s ", buf); - - /* Do any previous instructions turn on interrupts? */ - if (addr <= erraddr && /* in the past */ - ((val >= 0x0040 && val <= 0x0047) || /* STI instruction */ - val == 0x017b)) /* [SP++] = RETI */ - sti = 1; - } - - printk("\n"); - - /* Hardware error interrupts can be deferred */ - if (unlikely(sti && (fp->seqstat & SEQSTAT_EXCAUSE) == VEC_HWERR && - oops_in_progress)){ - printk(KERN_NOTICE "Looks like this was a deferred error - sorry\n"); -#ifndef CONFIG_DEBUG_HWERR - printk(KERN_NOTICE "The remaining message may be meaningless\n" - KERN_NOTICE "You should enable CONFIG_DEBUG_HWERR to get a" - " better idea where it came from\n"); -#else - /* If we are handling only one peripheral interrupt - * and current mm and pid are valid, and the last error - * was in that user space process's text area - * print it out - because that is where the problem exists - */ - if ((!(((fp)->ipend & ~0x30) & (((fp)->ipend & ~0x30) - 1))) && - (current->pid && current->mm)) { - /* And the last RETI points to the current userspace context */ - if ((fp + 1)->pc >= current->mm->start_code && - (fp + 1)->pc <= current->mm->end_code) { - printk(KERN_NOTICE "It might be better to look around here : \n"); - printk(KERN_NOTICE "-------------------------------------------\n"); - show_regs(fp + 1); - printk(KERN_NOTICE "-------------------------------------------\n"); - } - } #endif + { + dump_bfin_process(fp); + dump_bfin_mem(fp); + show_regs(fp); + dump_bfin_trace_buffer(); } -} - -void show_regs(struct pt_regs *fp) -{ - char buf [150]; - struct irqaction *action; - unsigned int i; - unsigned long flags; - - printk(KERN_NOTICE "\n" KERN_NOTICE "SEQUENCER STATUS:\t\t%s\n", print_tainted()); - printk(KERN_NOTICE " SEQSTAT: %08lx IPEND: %04lx SYSCFG: %04lx\n", - (long)fp->seqstat, fp->ipend, fp->syscfg); - printk(KERN_NOTICE " HWERRCAUSE: 0x%lx\n", - (fp->seqstat & SEQSTAT_HWERRCAUSE) >> 14); - printk(KERN_NOTICE " EXCAUSE : 0x%lx\n", - fp->seqstat & SEQSTAT_EXCAUSE); - for (i = 6; i <= 15 ; i++) { - if (fp->ipend & (1 << i)) { - decode_address(buf, bfin_read32(EVT0 + 4*i)); - printk(KERN_NOTICE " physical IVG%i asserted : %s\n", i, buf); - } - } - - /* if no interrupts are going off, don't print this out */ - if (fp->ipend & ~0x3F) { - for (i = 0; i < (NR_IRQS - 1); i++) { - spin_lock_irqsave(&irq_desc[i].lock, flags); - action = irq_desc[i].action; - if (!action) - goto unlock; - - decode_address(buf, (unsigned int)action->handler); - printk(KERN_NOTICE " logical irq %3d mapped : %s", i, buf); - for (action = action->next; action; action = action->next) { - decode_address(buf, (unsigned int)action->handler); - printk(", %s", buf); - } - printk("\n"); -unlock: - spin_unlock_irqrestore(&irq_desc[i].lock, flags); - } - } - - decode_address(buf, fp->rete); - printk(KERN_NOTICE " RETE: %s\n", buf); - decode_address(buf, fp->retn); - printk(KERN_NOTICE " RETN: %s\n", buf); - decode_address(buf, fp->retx); - printk(KERN_NOTICE " RETX: %s\n", buf); - decode_address(buf, fp->rets); - printk(KERN_NOTICE " RETS: %s\n", buf); - decode_address(buf, fp->pc); - printk(KERN_NOTICE " PC : %s\n", buf); - - if (((long)fp->seqstat & SEQSTAT_EXCAUSE) && - (((long)fp->seqstat & SEQSTAT_EXCAUSE) != VEC_HWERR)) { - decode_address(buf, bfin_read_DCPLB_FAULT_ADDR()); - printk(KERN_NOTICE "DCPLB_FAULT_ADDR: %s\n", buf); - decode_address(buf, bfin_read_ICPLB_FAULT_ADDR()); - printk(KERN_NOTICE "ICPLB_FAULT_ADDR: %s\n", buf); - } - - printk(KERN_NOTICE "\n" KERN_NOTICE "PROCESSOR STATE:\n"); - printk(KERN_NOTICE " R0 : %08lx R1 : %08lx R2 : %08lx R3 : %08lx\n", - fp->r0, fp->r1, fp->r2, fp->r3); - printk(KERN_NOTICE " R4 : %08lx R5 : %08lx R6 : %08lx R7 : %08lx\n", - fp->r4, fp->r5, fp->r6, fp->r7); - printk(KERN_NOTICE " P0 : %08lx P1 : %08lx P2 : %08lx P3 : %08lx\n", - fp->p0, fp->p1, fp->p2, fp->p3); - printk(KERN_NOTICE " P4 : %08lx P5 : %08lx FP : %08lx SP : %08lx\n", - fp->p4, fp->p5, fp->fp, (long)fp); - printk(KERN_NOTICE " LB0: %08lx LT0: %08lx LC0: %08lx\n", - fp->lb0, fp->lt0, fp->lc0); - printk(KERN_NOTICE " LB1: %08lx LT1: %08lx LC1: %08lx\n", - fp->lb1, fp->lt1, fp->lc1); - printk(KERN_NOTICE " B0 : %08lx L0 : %08lx M0 : %08lx I0 : %08lx\n", - fp->b0, fp->l0, fp->m0, fp->i0); - printk(KERN_NOTICE " B1 : %08lx L1 : %08lx M1 : %08lx I1 : %08lx\n", - fp->b1, fp->l1, fp->m1, fp->i1); - printk(KERN_NOTICE " B2 : %08lx L2 : %08lx M2 : %08lx I2 : %08lx\n", - fp->b2, fp->l2, fp->m2, fp->i2); - printk(KERN_NOTICE " B3 : %08lx L3 : %08lx M3 : %08lx I3 : %08lx\n", - fp->b3, fp->l3, fp->m3, fp->i3); - printk(KERN_NOTICE "A0.w: %08lx A0.x: %08lx A1.w: %08lx A1.x: %08lx\n", - fp->a0w, fp->a0x, fp->a1w, fp->a1x); - - printk(KERN_NOTICE "USP : %08lx ASTAT: %08lx\n", - rdusp(), fp->astat); - - printk(KERN_NOTICE "\n"); -} - -#ifdef CONFIG_SYS_BFIN_SPINLOCK_L1 -asmlinkage int sys_bfin_spinlock(int *spinlock)__attribute__((l1_text)); #endif + panic("Double Fault - unrecoverable event"); -asmlinkage int sys_bfin_spinlock(int *spinlock) -{ - int ret = 0; - int tmp = 0; - - local_irq_disable(); - ret = get_user(tmp, spinlock); - if (ret == 0) { - if (tmp) - ret = 1; - tmp = 1; - put_user(tmp, spinlock); - } - local_irq_enable(); - return ret; } -int bfin_request_exception(unsigned int exception, void (*handler)(void)) -{ - void (*curr_handler)(void); - - if (exception > 0x3F) - return -EINVAL; - - curr_handler = ex_table[exception]; - - if (curr_handler != ex_replaceable) - return -EBUSY; - - ex_table[exception] = handler; - - return 0; -} -EXPORT_SYMBOL(bfin_request_exception); - -int bfin_free_exception(unsigned int exception, void (*handler)(void)) -{ - void (*curr_handler)(void); - - if (exception > 0x3F) - return -EINVAL; - - curr_handler = ex_table[exception]; - - if (curr_handler != handler) - return -EBUSY; - - ex_table[exception] = ex_replaceable; - - return 0; -} -EXPORT_SYMBOL(bfin_free_exception); void panic_cplb_error(int cplb_panic, struct pt_regs *fp) { @@ -917,11 +554,29 @@ void panic_cplb_error(int cplb_panic, struct pt_regs *fp) oops_in_progress = 1; - printk(KERN_EMERG "DCPLB_FAULT_ADDR=%p\n", (void *)bfin_read_DCPLB_FAULT_ADDR()); - printk(KERN_EMERG "ICPLB_FAULT_ADDR=%p\n", (void *)bfin_read_ICPLB_FAULT_ADDR()); dump_bfin_process(fp); dump_bfin_mem(fp); show_regs(fp); dump_stack(); - panic("Unrecoverable event\n"); + panic("Unrecoverable event"); +} + +#ifdef CONFIG_BUG +int is_valid_bugaddr(unsigned long addr) +{ + unsigned int opcode; + + if (!get_instruction(&opcode, (unsigned short *)addr)) + return 0; + + return opcode == BFIN_BUG_OPCODE; } +#endif + +/* stub this out */ +#ifndef CONFIG_DEBUG_VERBOSE +void show_regs(struct pt_regs *fp) +{ + +} +#endif diff --git a/arch/blackfin/kernel/vmlinux.lds.S b/arch/blackfin/kernel/vmlinux.lds.S index cb01a9de268..c9eec84aa25 100644 --- a/arch/blackfin/kernel/vmlinux.lds.S +++ b/arch/blackfin/kernel/vmlinux.lds.S @@ -1,34 +1,9 @@ /* - * File: arch/blackfin/kernel/vmlinux.lds.S - * Based on: none - original work - * Author: + * Copyright 2004-2009 Analog Devices Inc. * - * Created: Tue Sep 21 2004 - * Description: Master linker script for blackfin architecture - * - * Modified: - * Copyright 2004-2007 Analog Devices Inc. - * - * Bugs: Enter bugs at http://blackfin.uclinux.org/ - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, see the file COPYING, or write - * to the Free Software Foundation, Inc., - * 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA + * Licensed under the GPL-2 or later */ -#define VMLINUX_SYMBOL(_sym_) _##_sym_ - #include <asm-generic/vmlinux.lds.h> #include <asm/mem_map.h> #include <asm/page.h> @@ -40,7 +15,12 @@ _jiffies = _jiffies_64; SECTIONS { +#ifdef CONFIG_RAMKERNEL . = CONFIG_BOOT_LOAD; +#else + . = CONFIG_ROM_BASE; +#endif + /* Neither the text, ro_data or bss section need to be aligned * So pack them back to back */ @@ -50,52 +30,88 @@ SECTIONS _text = .; __stext = .; TEXT_TEXT +#ifndef CONFIG_SCHEDULE_L1 SCHED_TEXT +#endif LOCK_TEXT + IRQENTRY_TEXT KPROBES_TEXT +#ifdef CONFIG_ROMKERNEL + __sinittext = .; + INIT_TEXT + __einittext = .; + EXIT_TEXT +#endif *(.text.*) *(.fixup) - . = ALIGN(16); - ___start___ex_table = .; - *(__ex_table) - ___stop___ex_table = .; - +#if !L1_CODE_LENGTH + *(.l1.text) +#endif __etext = .; } + EXCEPTION_TABLE(4) + NOTES + /* Just in case the first read only is a 32-bit access */ RO_DATA(4) + __rodata_end = .; +#ifdef CONFIG_ROMKERNEL + . = CONFIG_BOOT_LOAD; + .bss : AT(__rodata_end) +#else .bss : +#endif { . = ALIGN(4); ___bss_start = .; *(.bss .bss.*) *(COMMON) +#if !L1_DATA_A_LENGTH + *(.l1.bss) +#endif +#if !L1_DATA_B_LENGTH + *(.l1.bss.B) +#endif + . = ALIGN(4); ___bss_stop = .; } +#if defined(CONFIG_ROMKERNEL) + .data : AT(LOADADDR(.bss) + SIZEOF(.bss)) +#else .data : +#endif { __sdata = .; /* This gets done first, so the glob doesn't suck it in */ + CACHELINE_ALIGNED_DATA(32) + +#if !L1_DATA_A_LENGTH + . = ALIGN(32); + *(.data_l1.cacheline_aligned) + *(.l1.data) +#endif +#if !L1_DATA_B_LENGTH + *(.l1.data.B) +#endif +#if !L2_LENGTH . = ALIGN(32); - *(.data.cacheline_aligned) + *(.data_l2.cacheline_aligned) + *(.l2.data) +#endif DATA_DATA - *(.data.*) CONSTRUCTORS - /* make sure the init_task is aligned to the - * kernel thread size so we can locate the kernel - * stack properly and quickly. - */ - . = ALIGN(THREAD_SIZE); - *(.init_task.data) + INIT_TASK_DATA(THREAD_SIZE) __edata = .; } + __data_lma = LOADADDR(.data); + __data_len = SIZEOF(.data); /* The init section should be last, so when we free it, it goes into * the general memory pool, and (hopefully) will decrease fragmentation @@ -105,115 +121,139 @@ SECTIONS . = ALIGN(PAGE_SIZE); ___init_begin = .; - .init.text : - { - . = ALIGN(PAGE_SIZE); - __sinittext = .; - INIT_TEXT - __einittext = .; - } - .init.data : - { - . = ALIGN(16); - INIT_DATA - } - .init.setup : - { - . = ALIGN(16); - ___setup_start = .; - *(.init.setup) - ___setup_end = .; - } - .initcall.init : +#ifdef CONFIG_RAMKERNEL + INIT_TEXT_SECTION(PAGE_SIZE) + + /* We have to discard exit text and such at runtime, not link time, to + * handle embedded cross-section references (alt instructions, bug + * table, eh_frame, etc...). We need all of our .text up front and + * .data after it for PCREL call issues. + */ + .exit.text : { - ___initcall_start = .; - INITCALLS - ___initcall_end = .; + EXIT_TEXT } - .con_initcall.init : + + . = ALIGN(16); + INIT_DATA_SECTION(16) + PERCPU_SECTION(32) + + .exit.data : { - ___con_initcall_start = .; - *(.con_initcall.init) - ___con_initcall_end = .; + EXIT_DATA } - SECURITY_INIT - .init.ramfs : + + .text_l1 L1_CODE_START : AT(LOADADDR(.exit.data) + SIZEOF(.exit.data)) +#else + .init.data : AT(__data_lma + __data_len + 32) { - . = ALIGN(4); - ___initramfs_start = .; - *(.init.ramfs) - ___initramfs_end = .; - } + __sinitdata = .; + INIT_DATA + INIT_SETUP(16) + INIT_CALLS + CON_INITCALL + SECURITY_INITCALL + INIT_RAM_FS - __l1_lma_start = .; + . = ALIGN(PAGE_SIZE); + ___per_cpu_load = .; + PERCPU_INPUT(32) -#if L1_CODE_LENGTH -# define LDS_L1_CODE *(.l1.text) -#else -# define LDS_L1_CODE + EXIT_DATA + __einitdata = .; + } + __init_data_lma = LOADADDR(.init.data); + __init_data_len = SIZEOF(.init.data); + __init_data_end = .; + + .text_l1 L1_CODE_START : AT(__init_data_lma + __init_data_len) #endif - .text_l1 L1_CODE_START : AT(LOADADDR(.init.ramfs) + SIZEOF(.init.ramfs)) { . = ALIGN(4); __stext_l1 = .; - LDS_L1_CODE + *(.l1.text.head) + *(.l1.text) +#ifdef CONFIG_SCHEDULE_L1 + SCHED_TEXT +#endif . = ALIGN(4); __etext_l1 = .; } + __text_l1_lma = LOADADDR(.text_l1); + __text_l1_len = SIZEOF(.text_l1); + ASSERT (__text_l1_len <= L1_CODE_LENGTH, "L1 text overflow!") -#if L1_DATA_A_LENGTH -# define LDS_L1_A_DATA *(.l1.data) -# define LDS_L1_A_BSS *(.l1.bss) -# define LDS_L1_A_CACHE *(.data_l1.cacheline_aligned) -#else -# define LDS_L1_A_DATA -# define LDS_L1_A_BSS -# define LDS_L1_A_CACHE -#endif - .data_l1 L1_DATA_A_START : AT(LOADADDR(.text_l1) + SIZEOF(.text_l1)) + .data_l1 L1_DATA_A_START : AT(__text_l1_lma + __text_l1_len) { . = ALIGN(4); __sdata_l1 = .; - LDS_L1_A_DATA + *(.l1.data) __edata_l1 = .; - . = ALIGN(4); - __sbss_l1 = .; - LDS_L1_A_BSS - . = ALIGN(32); - LDS_L1_A_CACHE + *(.data_l1.cacheline_aligned) . = ALIGN(4); + __sbss_l1 = .; + *(.l1.bss) + . = ALIGN(4); __ebss_l1 = .; } + __data_l1_lma = LOADADDR(.data_l1); + __data_l1_len = SIZEOF(.data_l1); + ASSERT (__data_l1_len <= L1_DATA_A_LENGTH, "L1 data A overflow!") -#if L1_DATA_B_LENGTH -# define LDS_L1_B_DATA *(.l1.data.B) -# define LDS_L1_B_BSS *(.l1.bss.B) -#else -# define LDS_L1_B_DATA -# define LDS_L1_B_BSS -#endif - .data_b_l1 L1_DATA_B_START : AT(LOADADDR(.data_l1) + SIZEOF(.data_l1)) + .data_b_l1 L1_DATA_B_START : AT(__data_l1_lma + __data_l1_len) { . = ALIGN(4); __sdata_b_l1 = .; - LDS_L1_B_DATA + *(.l1.data.B) __edata_b_l1 = .; . = ALIGN(4); __sbss_b_l1 = .; - LDS_L1_B_BSS - + *(.l1.bss.B) . = ALIGN(4); __ebss_b_l1 = .; } + __data_b_l1_lma = LOADADDR(.data_b_l1); + __data_b_l1_len = SIZEOF(.data_b_l1); + ASSERT (__data_b_l1_len <= L1_DATA_B_LENGTH, "L1 data B overflow!") + + .text_data_l2 L2_START : AT(__data_b_l1_lma + __data_b_l1_len) + { + . = ALIGN(4); + __stext_l2 = .; + *(.l2.text) + . = ALIGN(4); + __etext_l2 = .; + + . = ALIGN(4); + __sdata_l2 = .; + *(.l2.data) + __edata_l2 = .; + + . = ALIGN(32); + *(.data_l2.cacheline_aligned) + + . = ALIGN(4); + __sbss_l2 = .; + *(.l2.bss) + . = ALIGN(4); + __ebss_l2 = .; + } + __l2_lma = LOADADDR(.text_data_l2); + __l2_len = SIZEOF(.text_data_l2); + ASSERT (__l2_len <= L2_LENGTH, "L2 overflow!") /* Force trailing alignment of our init section so that when we * free our init memory, we don't leave behind a partial page. */ - . = LOADADDR(.data_b_l1) + SIZEOF(.data_b_l1); +#ifdef CONFIG_RAMKERNEL + . = __l2_lma + __l2_len; +#else + . = __init_data_end; +#endif . = ALIGN(PAGE_SIZE); ___init_end = .; @@ -223,12 +263,5 @@ SECTIONS DWARF_DEBUG - NOTES - - /DISCARD/ : - { - EXIT_TEXT - EXIT_DATA - *(.exitcall.exit) - } + DISCARDS } |