emscripten-fastcomp - LLVM with the emscripten fastcomp javascript backend

Age	Commit message (Expand)	Author
2012-07-18	Make x86 asm parser to check for xmm vs ymm for index register in gather inst...	Craig Topper
2012-01-27	Intel Syntax: Parse mem operand with seg reg. QWORD PTR FS:[320]	Devang Patel
2012-01-23	Intel syntax: Robustify parsing of memory operand's displacement experssion.	Devang Patel
2012-01-23	Intel syntax: Parse memory operand with empty base reg, e.g. DWORD PTR [4*RDI]	Devang Patel
2012-01-23	Intel syntax: Parse segment registers.	Devang Patel
2012-01-20	Intel syntax: Robustify register parsing.	Devang Patel
2012-01-18	Process instructions after match to select alternative encoding which may be ...	Devang Patel
2012-01-17	Intel syntax: Fix parser match class to check memory operand size.	Devang Patel
2012-01-17	Intel syntax: Parse "BYTE PTR [RDX + RCX]"	Devang Patel
2012-01-17	Intel syntax: Do not unncessarily create plus expression for memory operand d...	Devang Patel
2012-01-17	Intel syntax: Ignore mnemonic aliases.	Devang Patel
2012-01-17	Intel syntax: Robustify memory operand parsing.	Devang Patel
2012-01-13	Add new test.	Devang Patel