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author | Devang Patel <dpatel@apple.com> | 2012-01-27 19:48:28 +0000 |
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committer | Devang Patel <dpatel@apple.com> | 2012-01-27 19:48:28 +0000 |
commit | a28101e61aa3aeed5baf3d5b91d0f8bcb4e9e12a (patch) | |
tree | fdfe858b1789520f3b7652875a239b1834f5fa94 /test/MC/X86/intel-syntax.s | |
parent | a21bb20f5943f5f4c66d4727784c26007db2470c (diff) |
Intel Syntax: Parse mem operand with seg reg. QWORD PTR FS:[320]
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@149142 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'test/MC/X86/intel-syntax.s')
-rw-r--r-- | test/MC/X86/intel-syntax.s | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/test/MC/X86/intel-syntax.s b/test/MC/X86/intel-syntax.s index 2c69280711..7cd56777b0 100644 --- a/test/MC/X86/intel-syntax.s +++ b/test/MC/X86/intel-syntax.s @@ -61,4 +61,6 @@ _main: lea R8D, DWORD PTR [4*RDI] // CHECK: movl _fnan(,%ecx,4), %ecx mov ECX, DWORD PTR [4*ECX + _fnan] +// CHECK: movq %fs:320, %rax + mov RAX, QWORD PTR FS:[320] ret |