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AgeCommit message (Expand)Author
2012-05-09Add another peephole pattern for conditional moves.Akira Hatanaka
2012-05-09Make register FP allocatable if the compiled function does not have dynamicAkira Hatanaka
2012-05-09Expand 64-bit shifts if target ABI is O32.Akira Hatanaka
2012-05-08Remove 256-bit AVX non-temporal store intrinsics. Similar was previously done...Craig Topper
2012-05-07Teach DAG combine to fold x-x to 0.0 when unsafe FP math is enabled.Owen Anderson
2012-05-07Fix a regression from r147481. This combine should only happen if there is aChad Rosier
2012-05-07X86: optimization for -(x != 0)Manman Ren
2012-05-07Add support for the 'l' constraint.Eric Christopher
2012-05-07Add support for the 'c' constraint.Eric Christopher
2012-05-07Add support for the 'P' constraint.Eric Christopher
2012-05-07Add support for the 'O' constraint.Eric Christopher
2012-05-07Add support for the 'N' inline asm constraint.Eric Christopher
2012-05-07Add support for the 'L' inline asm constraint.Eric Christopher
2012-05-07Add support for the inline asm constraint 'K'.Eric Christopher
2012-05-07Add SSE4A MOVNTSS/MOVNTSD instructions.Craig Topper
2012-05-07Support the 'J' constraint.Eric Christopher
2012-05-07Add support for the 'I' inline asm constraint. Also add testsEric Christopher
2012-05-06Switch the select to branch transformation on by default.Benjamin Kramer
2012-05-05CodeGenPrepare: Add a transform to turn selects into branches in some cases.Benjamin Kramer
2012-05-04This patch adds a new NVPTX back-end to LLVM which supports code generation f...Justin Holewinski
2012-05-04Added missing CMN case in Thumb2SizeReduction pass so that LLVM emits 16-bits...Sebastian Pop
2012-05-04Allow v16i16 and v32i8 shuffles to be rewritten as narrower shuffles.Craig Topper
2012-05-03Support for target dependent Hexagon VLIW packetizer.Sirish Pande
2012-05-03Fix 256-bit vpshuflw and vpshufhw immediate encoding to handle undefs in the ...Craig Topper
2012-05-03Fix two-address pass's aggressive instruction commuting heuristics. It's meantEvan Cheng
2012-05-02Teach DAGCombine the same multiply-by-1.0 folding trick when doing FMAs, just...Owen Anderson
2012-05-02Teach DAG combine that multiplication by 1.0 can always be constant folded.Owen Anderson
2012-05-02Revert r155853Manman Ren
2012-05-02Add support for selecting AVX2 vpshuflw and vpshufhw. Add decoding support fo...Craig Topper
2012-05-01Strip the pointer casts off of allocas so that the selection DAG can find them.Bill Wendling
2012-05-01X86: optimization for max-like structManman Ren
2012-05-01Regression test for PR2960.Jay Foad
2012-04-30X86: optimization for -(x != 0)Manman Ren
2012-04-30test/CodeGen/X86/select.ll: remove spacesManman Ren
2012-04-30Fix fastcc structure return with fast-isel on x86-32Derek Schuff
2012-04-30Don't introduce illegal types when creating vmull operations. <rdar://11324364>Bob Wilson
2012-04-28Reapply 155668: Fix the SD scheduler to avoid gluing the same node twice.Andrew Trick
2012-04-27Revert r155745Derek Schuff
2012-04-27Fix fastcc structure return with fast-isel on x86-32Derek Schuff
2012-04-27Temporarily revert r155668: Fix the SD scheduler to avoid gluing.Andrew Trick
2012-04-27Add x86-specific DAG combine to simplify:Chad Rosier
2012-04-27Make test less fragile.Evan Cheng
2012-04-27Fix the order of the operands in the llvm.fma intrinsic patterns for ARM,Lang Hames
2012-04-27X86: Don't emit conditional floating point moves on when targeting pre-pentiu...Benjamin Kramer
2012-04-27Add mcpu to tests to prevent them from using AVX instructions on Sandy Bridge...Craig Topper
2012-04-27Implement a bastardized ABI.Evan Cheng
2012-04-27- thumbv6 shouldn't imply +thumb2. Cortex-M0 doesn't suppport 32-bit Thumb2Evan Cheng
2012-04-26Fix the SD scheduler to avoid gluing the same node twice.Andrew Trick
2012-04-26Use VLD1 in NEON extenting-load patterns instead of VLDR.Tim Northover
2012-04-26If triple is armv7 / thumbv7 and a CPU is specified, do not automatically assumeEvan Cheng
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