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| author | Tim Northover <Tim.Northover@arm.com> | 2012-04-26 08:46:29 +0000 |
|---|---|---|
| committer | Tim Northover <Tim.Northover@arm.com> | 2012-04-26 08:46:29 +0000 |
| commit | 37abe8df4a4e74513e2daa0cdf0b801bec94dade (patch) | |
| tree | 3781eee52c4e726f27b66a97ce219ab6df307549 /test/CodeGen | |
| parent | e38993f89288f8dd96451fe3ba514950520757ad (diff) | |
Use VLD1 in NEON extenting-load patterns instead of VLDR.
On some cores it's a bad idea for performance to mix VFP and NEON instructions
and since these patterns are NEON anyway, the NEON load should be used.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@155630 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'test/CodeGen')
| -rw-r--r-- | test/CodeGen/ARM/vector-extend-narrow.ll | 8 |
1 files changed, 6 insertions, 2 deletions
diff --git a/test/CodeGen/ARM/vector-extend-narrow.ll b/test/CodeGen/ARM/vector-extend-narrow.ll index 1ec36da38f..8fd3db2919 100644 --- a/test/CodeGen/ARM/vector-extend-narrow.ll +++ b/test/CodeGen/ARM/vector-extend-narrow.ll @@ -20,7 +20,9 @@ define float @f(<4 x i16>* nocapture %in) { ; CHECK: g: define float @g(<4 x i8>* nocapture %in) { - ; CHECK: vldr +; Note: vld1 here is reasonably important. Mixing VFP and NEON +; instructions is bad on some cores + ; CHECK: vld1 ; CHECK: vmovl.u8 ; CHECK: vmovl.u16 %1 = load <4 x i8>* %in @@ -47,7 +49,9 @@ define <4 x i8> @h(<4 x float> %v) { ; CHECK: i: define <4 x i8> @i(<4 x i8>* %x) { - ; CHECK: vldr +; Note: vld1 here is reasonably important. Mixing VFP and NEON +; instructions is bad on some cores + ; CHECK: vld1 ; CHECK: vmovl.s8 ; CHECK: vmovl.s16 ; CHECK: vrecpe |