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AgeCommit message (Expand)Author
2012-05-22revert my previous patches that introduced an additional parameter to the obj...Nuno Lopes
2012-05-22Only erase virtregs with no uses left.Jakob Stoklund Olesen
2012-05-21FileCheck'ize test, and add a bit to test for r157221.Jim Grosbach
2012-05-21Allow 256-bit shuffles to still be split even if only half of the shuffle com...Craig Topper
2012-05-20When legalising shifts, do not pre-build a list of operands whichPeter Collingbourne
2012-05-20Add a missing PPC 64-bit stwu pattern.Hal Finkel
2012-05-20Use the right register class for LDRrs.Jakob Stoklund Olesen
2012-05-20Transfer memory operands to the right instruction.Jakob Stoklund Olesen
2012-05-20Properly constrain register classes for sub-registers.Jakob Stoklund Olesen
2012-05-20Properly constrain register classes in 2-addr.Jakob Stoklund Olesen
2012-05-19Fix 12892.Jakob Stoklund Olesen
2012-05-19Erase joined copies immediately.Jakob Stoklund Olesen
2012-05-19On Haswell, perfer storing YMM registers using a single instruction.Nadav Rotem
2012-05-19Add support for additional in-reg vbroadcast patternsNadav Rotem
2012-05-19Add support for the 'd' mips inline asm output modifier.Eric Christopher
2012-05-18Refactor data-in-code annotations.Jim Grosbach
2012-05-18Add support for the mips 'x' inline asm modifier.Eric Christopher
2012-05-18Simplify handling of v16i8 shuffles and fix a missed optimization.Craig Topper
2012-05-18Teach two-address pass to update the "source" map so it doesn't perform aEvan Cheng
2012-05-18Remove a test that was only testing for physreg joining.Jakob Stoklund Olesen
2012-05-17Remove -join-physregs from the test suite.Jakob Stoklund Olesen
2012-05-17Remove incorrect pattern for ARM SMML instruction.Tim Northover
2012-05-16Avoid creating a cycle when folding load / op with flag / store. PR11451474. ...Evan Cheng
2012-05-15Enable sub-sub-register copy coalescing.Jakob Stoklund Olesen
2012-05-15Enable all Hexagon tests.Sirish Pande
2012-05-14Fix PR12821.Jakob Stoklund Olesen
2012-05-14Revert 156634 upon request until code improvement changes are made.Brendon Cahoon
2012-05-14Rename @llvm.debugger to @llvm.debugtrap.Dan Gohman
2012-05-12Support for Hexagon feature, New Value Jump.Sirish Pande
2012-05-12Fix test cases.Akira Hatanaka
2012-05-12Make the following changes in MipsAsmPrinter.cpp:Akira Hatanaka
2012-05-12Insert instructions to the entry basic block which initializes the globalAkira Hatanaka
2012-05-11Do not replace operands of pseudo instructions with register $zero.Akira Hatanaka
2012-05-11Use regular expression to match register names. Akira Hatanaka
2012-05-11[fast-isel] Add support for selecting @llvm.trap().Chad Rosier
2012-05-11Hexagon constant extender support.Brendon Cahoon
2012-05-11[fast-isel] Remove -disable-arm-fast-isel option. -fast-isel=0 suffices. Min...Chad Rosier
2012-05-11[fast-isel] Cleaner fix for when we're unable to handle a non-double multi-regChad Rosier
2012-05-11Fix test/CodeGen/X86/tls-pie.ll.Hans Wennborg
2012-05-11Implement initial-exec TLS model for 32-bit PIC x86Hans Wennborg
2012-05-11ARM: peephole optimization to remove cmp instructionManman Ren
2012-05-11Define a new intrinsic, @llvm.debugger. It will be similar to __builtin_trap(),Dan Gohman
2012-05-10Add support for the 'X' inline asm operand modifier.Eric Christopher
2012-05-10Hexagon V5 FP Support.Sirish Pande
2012-05-10Revert: 156550 "ARM: peephole optimization to remove cmp instruction"Manman Ren
2012-05-10ARM: peephole optimization to remove cmp instructionManman Ren
2012-05-10AVX2: Add an additional broadcast idiom.Nadav Rotem
2012-05-10Generate AVX/AVX2 shuffles even when there is a memory op somewhere else in t...Nadav Rotem
2012-05-09Added a regress test for the bug #9964 before close it.Danil Malyshev
2012-05-09change the objectsize intrinsic signature: add a 3rd parameter to denote the ...Nuno Lopes
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