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path: root/lib/Target/ARM/Disassembler
AgeCommit message (Expand)Author
2013-04-26ARM: Fix encoding of hint instruction for Thumb.Quentin Colombet
2013-04-19ARM: Permit "sp" in ARM variant of STREXD instructionsTim Northover
2013-04-19ARM: permit "sp" in ARM variants of MOVW/MOVT instructionsTim Northover
2013-04-17Fix treatment of ARM unallocated hint instructions.Quentin Colombet
2013-03-28Fix issue with disassembler decoding CBZ/CBNZ immediates as negatives when th...Gordon Keiser
2013-03-26Patch by Gordon Keiser!Joe Abbey
2012-12-19Remove edis - the enhanced disassembler. Fixes PR14654.Roman Divacky
2012-12-03Use the new script to sort the includes of every file under lib.Chandler Carruth
2012-11-29Fixed the arm disassembly of invalid BFI instructions to not build a bad MCInstKevin Enderby
2012-10-29Fix ARM's b.w instruction for thumb 2 and the encoding T4. The branch targetKevin Enderby
2012-10-18Fix a bug where a 32-bit address with the high bit does not get symbolicatedKevin Enderby
2012-09-22Fix the handling of edge cases in ARM shifted operands.Tim Northover
2012-09-06Diagnose invalid alignments on duplicating VLDn instructions.Tim Northover
2012-09-06Check for invalid alignment values when decoding VLDn/VSTn (single ln) instru...Tim Northover
2012-08-24Fix integer undefined behavior due to signed left shift overflow in LLVM.Richard Smith
2012-08-17Remove unnecessary include of ARMGenInstrInfo.inc.Craig Topper
2012-08-14Switch the fixed-length disassembler to be table-driven.Jim Grosbach
2012-08-02Fix #13035, a bug around Thumb instruction LDRD/STRD with negative #0 offset ...Jiangning Liu
2012-08-02Fix #13138, a bug around ARM instruction DSB encoding and decoding issue.Jiangning Liu
2012-07-23Fix a typo (the the => the)Sylvestre Ledru
2012-07-10Fix instruction description of VMOV (between two ARM core registers and two s...Richard Barton
2012-07-09Revert r159938 (and r159945) to appease the buildbots.Chad Rosier
2012-07-09Oops - correct broken disassembly for VMOVRichard Barton
2012-07-09Fix instruction description of VMOV (between two ARM core registers and two s...Richard Barton
2012-06-06Correct decoder for T1 conditional B encodingRichard Barton
2012-05-22ARMDisassembler.cpp: Fix utf8 char in comments.NAKAMURA Takumi
2012-05-04Tweak to the fix in r156212, as with the change in removing the shift theKevin Enderby
2012-05-04Fix a bug in the ARM disassembler for wide branch conditional instructionsKevin Enderby
2012-05-03Fix issues with the ARM bl and blx thumb instructions and the J1 and J2 bitsKevin Enderby
2012-05-03Fixed disassembler for vstm/vldm ARM VFP instructions.Silviu Baranga
2012-04-27ARM: Tweak tADDrSP definition for consistent operand order.Jim Grosbach
2012-04-27Refactor IT handling not to store the bottom bit of the condition code in the...Richard Barton
2012-04-24Refactor Thumb ITState handling in ARM Disassembler to more efficiently use i...Richard Barton
2012-04-18Added support for disassembling unpredictable swp/swpb ARM instructions.Silviu Baranga
2012-04-18Added support for unpredictable mcrr/mcrr2/mrrc/mrrc2 ARM instruction in the ...Silviu Baranga
2012-04-17Fix ARM disassembly of VLD2 (single 2-element structure to all lanes)Kevin Enderby
2012-04-12Fix a few more places in the ARM disassembler so that branches getKevin Enderby
2012-04-11Fixed a case of ARM disassembly getting an assert on a bad encodingKevin Enderby
2012-04-11Fix ARM disassembly of VLD instructions with writebacks.  And add test a caseKevin Enderby
2012-04-03ARMDisassembler: drop bogus dependency on ARMCodeGenDylan Noblesmith
2012-03-27Remove unnecessary llvm:: qualificationsCraig Topper
2012-03-22Added soft fail checks for the disassembler when decoding some corner cases o...Silviu Baranga
2012-03-22Added soft fail cases for the disassembler when decoding LDRSBT, LDRHT or LDR...Silviu Baranga
2012-03-21Fix ARM disassembly of VST1 and VST2 instructions with writeback. And add testKevin Enderby
2012-03-20The ARM instructions that have an unpredictable behavior when the pc register...Silviu Baranga
2012-03-11Use uint16_t to store registers and opcode in static tables in the target spe...Craig Topper
2012-03-07Tidy up. Remove dead code that slipped into previous commit.Jim Grosbach
2012-03-06ARM more NEON VLD/VST composite physical register refactoring.Jim Grosbach
2012-03-06ARM refactor more NEON VLD/VST instructions to use composite physregsJim Grosbach
2012-03-06Fix a bug in the ARM disassembly of the neon VLD2 all lanes instruction.Kevin Enderby
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