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path: root/include/llvm/CodeGen/MachineInstr.h
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2012-03-17MachineInstr: Inline the fast path (non-bundle instruction) of hasProperty.Benjamin Kramer
This is particularly helpful as both arguments tend to be constants. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@152991 91177308-0d34-0410-b5e6-96231b3b80d8
2012-03-16Limit the number of memory operands in MachineInstr to 2^16 and store the ↵Benjamin Kramer
number in padding. Saves one machine word on MachineInstr (88->80 bytes on x86_64, 48->44 on i386). git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@152930 91177308-0d34-0410-b5e6-96231b3b80d8
2012-03-01Move getBundleStart() into MachineInstrBundle.h.Jakob Stoklund Olesen
This allows the function to be inlined, and makes it suitable for use in getInstructionIndex(). Also provide a const version. C++ is great for touch typing practice. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@151782 91177308-0d34-0410-b5e6-96231b3b80d8
2012-02-15Make LiveIntervals::handleMove() bundle aware.Lang Hames
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@150630 91177308-0d34-0410-b5e6-96231b3b80d8
2012-02-14Handle regmasks in findRegisterDefOperandIdx().Jakob Stoklund Olesen
Only accept register masks when looking for an 'overlapping' def. When Overlap is not set, the function searches for a proper definition of Reg. This means MI->modifiesRegister() considers register masks, but MI->definesRegister() doesn't. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@150529 91177308-0d34-0410-b5e6-96231b3b80d8
2012-02-08Added MachineInstr::isBundled() to check if an instruction is part of a bundle.Andrew Trick
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@150044 91177308-0d34-0410-b5e6-96231b3b80d8
2012-02-08whitespaceAndrew Trick
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@150042 91177308-0d34-0410-b5e6-96231b3b80d8
2012-02-03Handle register mask operands in setPhysRegsDeadExcept().Jakob Stoklund Olesen
Calls that use register mask operands don't have implicit defs for returned values. The register mask operand handles the call clobber, but it always behaves like a set of dead defs. Add live implicit defs for any implicitly defined physregs that are actually used. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@149715 91177308-0d34-0410-b5e6-96231b3b80d8
2012-02-03ArrayRef'ize MI::setPhysRegsDeadExcept().Jakob Stoklund Olesen
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@149709 91177308-0d34-0410-b5e6-96231b3b80d8
2012-01-27Fix typo.Jim Grosbach
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@149137 91177308-0d34-0410-b5e6-96231b3b80d8
2012-01-26Clear kill flags before propagating a copy.Jakob Stoklund Olesen
The live range of the source register may be extended when a redundant copy is eliminated. Make sure any kill flags between the two copies are cleared. This fixes PR11765. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@149069 91177308-0d34-0410-b5e6-96231b3b80d8
2012-01-25Update hasProperty comment.Evan Cheng
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@148936 91177308-0d34-0410-b5e6-96231b3b80d8
2011-12-14- Add MachineInstrBundle.h and MachineInstrBundle.cpp. This includes a functionEvan Cheng
to finalize MI bundles (i.e. add BUNDLE instruction and computing register def and use lists of the BUNDLE instruction) and a pass to unpack bundles. - Teach more of MachineBasic and MachineInstr methods to be bundle aware. - Switch Thumb2 IT block to MI bundles and delete the hazard recognizer hack to prevent IT blocks from being broken apart. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@146542 91177308-0d34-0410-b5e6-96231b3b80d8
2011-12-08Make MachineInstr instruction property queries more flexible. This change allEvan Cheng
clients to decide whether to look inside bundled instructions and whether the query should return true if any / all bundled instructions have the queried property. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@146168 91177308-0d34-0410-b5e6-96231b3b80d8
2011-12-07Add bundle aware API for querying instruction properties and switch the codeEvan Cheng
generator to it. For non-bundle instructions, these behave exactly the same as the MC layer API. For properties like mayLoad / mayStore, look into the bundle and if any of the bundled instructions has the property it would return true. For properties like isPredicable, only return true if *all* of the bundled instructions have the property. For properties like canFoldAsLoad, isCompare, conservatively return false for bundles. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@146026 91177308-0d34-0410-b5e6-96231b3b80d8
2011-12-06First chunk of MachineInstr bundle support.Evan Cheng
1. Added opcode BUNDLE 2. Taught MachineInstr class to deal with bundled MIs 3. Changed MachineBasicBlock iterator to skip over bundled MIs; added an iterator to walk all the MIs 4. Taught MachineBasicBlock methods about bundled MIs git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@145975 91177308-0d34-0410-b5e6-96231b3b80d8
2011-10-12Add MachineInstr::getRegClassConstraint().Jakob Stoklund Olesen
Most instructions have some requirements for their register operands. Usually, this is expressed as register class constraints in the MCInstrDesc, but for inline assembly the constraints are encoded in the flag words. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141835 91177308-0d34-0410-b5e6-96231b3b80d8
2011-10-12Extract a method for finding the inline asm flag operand.Jakob Stoklund Olesen
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141834 91177308-0d34-0410-b5e6-96231b3b80d8
2011-09-29Remove NumImplicitOps which is now unused.Jakob Stoklund Olesen
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140767 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-02Include a source location when complaining about bad inline assembly.Jakob Stoklund Olesen
Add a MI->emitError() method that the backend can use to report errors related to inline assembly. Call it from X86FloatingPoint.cpp when the constraints are wrong. This enables proper clang diagnostics from the backend: $ clang -c pr30848.c pr30848.c:5:12: error: Inline asm output regs must be last on the x87 stack __asm__ ("" : "=u" (d)); /* { dg-error "output regs" } */ ^ 1 error generated. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134307 91177308-0d34-0410-b5e6-96231b3b80d8
2011-06-30Create a isFullCopy predicate.Rafael Espindola
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134189 91177308-0d34-0410-b5e6-96231b3b80d8
2011-06-28- Rename TargetInstrDesc, TargetOperandInfo to MCInstrDesc and MCOperandInfo andEvan Cheng
sink them into MC layer. - Added MCInstrInfo, which captures the tablegen generated static data. Chang TargetInstrInfo so it's based off MCInstrInfo. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134021 91177308-0d34-0410-b5e6-96231b3b80d8
2011-05-12Re-commit 131172 with fix. MachineInstr identity checks should check deadEvan Cheng
markers. In some cases a register def is dead on one path, but not on another. This is passing Clang self-hosting. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131214 91177308-0d34-0410-b5e6-96231b3b80d8
2011-03-1180 columns.Jim Grosbach
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127495 91177308-0d34-0410-b5e6-96231b3b80d8
2011-03-11Trailing whitespace.Jim Grosbach
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127493 91177308-0d34-0410-b5e6-96231b3b80d8
2011-03-05Add FrameSetup MI flagsAnton Korobeynikov
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127098 91177308-0d34-0410-b5e6-96231b3b80d8
2011-03-05Shorten AsmPrinterFlags filed to accomodate for future Flags fieldAnton Korobeynikov
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127097 91177308-0d34-0410-b5e6-96231b3b80d8
2011-01-07Do not model all INLINEASM instructions as having unmodelled side effects.Evan Cheng
Instead encode llvm IR level property "HasSideEffects" in an operand (shared with IsAlignStack). Added MachineInstrs::hasUnmodeledSideEffects() to check the operand when the instruction is an INLINEASM. This allows memory instructions to be moved around INLINEASM instructions. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@123044 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-21add some helper methods for asmprinter flags, from PR8417Chris Lattner
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@119932 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-12add operand iterator apis to MachineInstr, patch by ether zhhb.Chris Lattner
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@118862 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-22Transfer implicit ops when forming load multiple and return instructions.Evan Cheng
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117151 91177308-0d34-0410-b5e6-96231b3b80d8
2010-07-16Rename DBG_LABEL PROLOG_LABEL, because it's only used during prolog emission andBill Wendling
thus is a much more meaningful name. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108563 91177308-0d34-0410-b5e6-96231b3b80d8
2010-07-08Convert EXTRACT_SUBREG to COPY when emitting machine instrs.Jakob Stoklund Olesen
EXTRACT_SUBREG no longer appears as a machine instruction. Use COPY instead. Add isCopy() checks in many places using isMoveInstr() and isExtractSubreg(). The isMoveInstr hook will be removed later. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107879 91177308-0d34-0410-b5e6-96231b3b80d8
2010-07-03Detect and handle COPY in many places.Jakob Stoklund Olesen
This code is transitional, it will soon be possible to eliminate isExtractSubreg, isInsertSubreg, and isMoveInstr in most places. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107547 91177308-0d34-0410-b5e6-96231b3b80d8
2010-07-02Add a new target independent COPY instruction and code to lower it.Jakob Stoklund Olesen
The COPY instruction is intended to replace the target specific copy instructions for virtual registers as well as the EXTRACT_SUBREG and INSERT_SUBREG instructions in MachineFunctions. It won't we used in a selection DAG. COPY is lowered to native register copies by LowerSubregs. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107529 91177308-0d34-0410-b5e6-96231b3b80d8
2010-06-18Teach regular and fast isel to set dead flags on unused implicit defsDan Gohman
on calls and similar instructions. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@106353 91177308-0d34-0410-b5e6-96231b3b80d8
2010-06-02Slightly change the meaning of the reMaterialize target hook when the originalJakob Stoklund Olesen
instruction defines subregisters. Any existing subreg indices on the original instruction are preserved or composed with the new subreg index. Also substitute multiple operands mentioning the original register by using the new MachineInstr::substituteRegister() function. This is necessary because there will soon be <imp-def> operands added to non read-modify-write partial definitions. This instruction: %reg1234:foo = FLAP %reg1234<imp-def> will reMaterialize(%reg3333, bar) like this: %reg3333:bar-foo = FLAP %reg333:bar<imp-def> Finally, replace the TargetRegisterInfo pointer argument with a reference to indicate that it cannot be NULL. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@105358 91177308-0d34-0410-b5e6-96231b3b80d8
2010-05-21- Change MachineInstr::findRegisterDefOperandIdx so it can also look for defsEvan Cheng
that are aliases of the specified register. - Rename modifiesRegister to definesRegister since it's looking a def of the specific register or one of its super-registers. It's not looking for def of a sub-register or alias that could change the specified register. - Added modifiesRegister to look for defs of aliases. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104377 91177308-0d34-0410-b5e6-96231b3b80d8
2010-05-21Add MachineInstr::readsWritesVirtualRegister() to determine if an instructionJakob Stoklund Olesen
reads or writes a register. This takes partial redefines and undef uses into account. Don't actually use it yet. That caused miscompiles. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104372 91177308-0d34-0410-b5e6-96231b3b80d8
2010-05-21Revert "Use MachineInstr::readsWritesVirtualRegister to determine if a ↵Jakob Stoklund Olesen
register is read." This reverts r104322. I think it was causing miscompilations. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104323 91177308-0d34-0410-b5e6-96231b3b80d8
2010-05-21Use MachineInstr::readsWritesVirtualRegister to determine if a register is read.Jakob Stoklund Olesen
This correctly handles partial redefines and undef uses. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104322 91177308-0d34-0410-b5e6-96231b3b80d8
2010-05-21If the first definition of a virtual register is a partial redef, add anJakob Stoklund Olesen
<imp-def> operand for the full register. This ensures that the full physical register is marked live after register allocation. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104320 91177308-0d34-0410-b5e6-96231b3b80d8
2010-05-19Add MachineInstr::readsVirtualRegister() in preparation for proper handling ofJakob Stoklund Olesen
partial redefines. We are going to treat a partial redefine of a virtual register as a read-modify-write: %reg1024:6 = OP Unless the register is fully clobbered: %reg1024:6 = OP, %reg1024<imp-def> MachineInstr::readsVirtualRegister() knows the difference. The first case is a read, the second isn't. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104149 91177308-0d34-0410-b5e6-96231b3b80d8
2010-05-13Teach MachineLICM and MachineSink how to clear kill flags conservativelyDan Gohman
when they move instructions. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@103737 91177308-0d34-0410-b5e6-96231b3b80d8
2010-05-05Move REG_SEQUENCE removal to 2addr pass.Evan Cheng
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@103109 91177308-0d34-0410-b5e6-96231b3b80d8
2010-04-09Fix up header comments to match the comment fixups I made in r100849.Bob Wilson
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@100869 91177308-0d34-0410-b5e6-96231b3b80d8
2010-04-08Coalescer should not delete copy instructions whose defs are partially dead. ↵Evan Cheng
e.g. %RDI<def,dead> = MOV64rr %RAX<kill>, %EDI<imp-def> git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@100804 91177308-0d34-0410-b5e6-96231b3b80d8
2010-04-02rename NewDebugLoc -> DebugLoc, prune #includes in DebugLoc.h.Chris Lattner
This keeps around temporary typedef for clang/llvm-gcc so the build won't break when I commit this :) git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@100218 91177308-0d34-0410-b5e6-96231b3b80d8
2010-03-03Move MachineInstrExpressionTrait::getHashValue() out of line so it can skip ↵Evan Cheng
over only virtual register defs. This matches what isEqual() is doing. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@97680 91177308-0d34-0410-b5e6-96231b3b80d8
2010-03-03Re-apply r97667 but with a little bit of thought put into the patch. This ↵Evan Cheng
implements a special DenseMapInfo trait for DenseMap<MachineInstr*> that compare the value of the MachineInstr rather than the pointer value. Since the hashing and equality test functions ignore defs it's useful for doing CSE kind optimization. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@97678 91177308-0d34-0410-b5e6-96231b3b80d8
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