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| author | Evan Cheng <evan.cheng@apple.com> | 2010-10-22 21:29:58 +0000 |
|---|---|---|
| committer | Evan Cheng <evan.cheng@apple.com> | 2010-10-22 21:29:58 +0000 |
| commit | b179b46cc558c720d23a066c768bad71f975eb93 (patch) | |
| tree | 8a7a1c856c4b08f75e467a55e3fb61c052dfed24 /include/llvm/CodeGen/MachineInstr.h | |
| parent | 458509476bd0f9911965de3b550d3f9c43303b0b (diff) | |
Transfer implicit ops when forming load multiple and return instructions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117151 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'include/llvm/CodeGen/MachineInstr.h')
| -rw-r--r-- | include/llvm/CodeGen/MachineInstr.h | 4 |
1 files changed, 4 insertions, 0 deletions
diff --git a/include/llvm/CodeGen/MachineInstr.h b/include/llvm/CodeGen/MachineInstr.h index f843196105..fc84f8c953 100644 --- a/include/llvm/CodeGen/MachineInstr.h +++ b/include/llvm/CodeGen/MachineInstr.h @@ -416,6 +416,10 @@ public: /// bool allDefsAreDead() const; + /// copyImplicitOps - Copy implicit register operands from specified + /// instruction to this instruction. + void copyImplicitOps(const MachineInstr *MI); + // // Debugging support // |