diff options
author | Jakob Stoklund Olesen <stoklund@2pi.dk> | 2010-07-02 22:29:50 +0000 |
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committer | Jakob Stoklund Olesen <stoklund@2pi.dk> | 2010-07-02 22:29:50 +0000 |
commit | a4e1ba53ddedd08669886b2849926bb33facc198 (patch) | |
tree | e18ec10ce3958c838ea1e5e98a9075e12c354081 /include/llvm/CodeGen/MachineInstr.h | |
parent | f5cd8c51e3d09a2af32e03414e75d3b50f47d0aa (diff) |
Add a new target independent COPY instruction and code to lower it.
The COPY instruction is intended to replace the target specific copy
instructions for virtual registers as well as the EXTRACT_SUBREG and
INSERT_SUBREG instructions in MachineFunctions. It won't we used in a selection
DAG.
COPY is lowered to native register copies by LowerSubregs.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107529 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'include/llvm/CodeGen/MachineInstr.h')
-rw-r--r-- | include/llvm/CodeGen/MachineInstr.h | 5 |
1 files changed, 4 insertions, 1 deletions
diff --git a/include/llvm/CodeGen/MachineInstr.h b/include/llvm/CodeGen/MachineInstr.h index 44d716e734..003ed15f05 100644 --- a/include/llvm/CodeGen/MachineInstr.h +++ b/include/llvm/CodeGen/MachineInstr.h @@ -227,7 +227,10 @@ public: bool isRegSequence() const { return getOpcode() == TargetOpcode::REG_SEQUENCE; } - + bool isCopy() const { + return getOpcode() == TargetOpcode::COPY; + } + /// readsRegister - Return true if the MachineInstr reads the specified /// register. If TargetRegisterInfo is passed, then it also checks if there /// is a read of a super-register. |