aboutsummaryrefslogtreecommitdiff
path: root/src/target
AgeCommit message (Collapse)Author
2020-03-12target/cortex_a: add hypervisor modeAntonio Borneo
Hypervisor mode is present only if the optional virtualization extensions are available. Moreover, virtualization extensions require that also security extensions are implemented. Add the required infrastructure for the shadowed registers in hypervisor mode. Make monitor shadowed registers visible in hypervisor mode too. Make hypervisor shadowed registers visible in hypervisor mode only. Check during cortex_a examine if virtualization extensions are present and then conditionally enable the visibility of both hypervisor and monitor modes shadowed registers. Change-Id: I81dbb1ee8baf4c9f1a2226b77c10c8a2a7b34871 Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com> Reviewed-on: http://openocd.zylin.com/5261 Tested-by: jenkins
2020-03-12armv7a: access monitor registers only with security extensionsAntonio Borneo
Accordingly to ARM DDI 0406C at B1.5, the security extensions for armv7a are optional extensions and can be detected by reading ID_PFR1. The monitor mode is part of the security extensions and the shadow registers "sp_mon", "lr_mon" and "spsr_mon" are only present with the security extensions. Read the register ID_PFR1 during cortex_a examine, determine if security extension is present and then conditionally enable the visibility of the monitor mode shadow registers. Change-Id: Ib4834698659046566f6dc5cd35b44de122dc02e5 Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com> Reviewed-on: http://openocd.zylin.com/5259 Tested-by: jenkins
2020-03-12target/armv4_5: remove unused macroAntonio Borneo
The macro ARMV4_5_CORE_REG_MODENUM() is unused. Remove it! Change-Id: I183df57bd86c9428710ea3583e43fba88fd26e0a Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com> Reviewed-on: http://openocd.zylin.com/5260 Tested-by: jenkins Reviewed-by: Muhammad Omair Javaid <omair.javaid@linaro.org>
2020-03-12arm: Use different enum for core_type and core_modeAntonio Borneo
The fields core_type and core_mode use the same enum arm_mode but encode different information, making the code less immediate to read. Use a different enum arm_core_type for the field core_type. The code behavior is not changed. Change-Id: I60f2095ea6801dfe22f6da81ec295ca71ef90466 Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com> Reviewed-on: http://openocd.zylin.com/5258 Tested-by: jenkins
2020-03-12arm: fix reg num for Monitor modeAntonio Borneo
Commit 2efb1f14f611 ("Add GDB remote target description support for ARM4") inserts two additional registers "sp" and "lr" in the table arm_core_regs[], thus shifting by two the position of the last three registers already present "sp_mon" moved from index 37 to 39 "lr_mon" moved from index 38 to 40 "spsr_mon" moved from index 39 to 41 Part of the code is updated (e.g. enum defining ARM_SPSR_MON and array arm_mon_indices[]), but it's missing the update of mapping in armv4_5_core_reg_map[]. Fix armv4_5_core_reg_map[]. Change-Id: I0bdf766183392eb738206b876cd9559aacc29fa0 Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com> Fixes: 2efb1f14f611 ("Add GDB remote target description support for ARM4") Reviewed-on: http://openocd.zylin.com/5257 Tested-by: jenkins
2020-03-12target: fix crash with jimtcl 0.78Antonio Borneo
The jimtcl commit 41c5ff1809f5 ("jim.c: Fix Object leak in zlib support") https://repo.or.cz/jimtcl.git/commit/41c5ff1809f5 makes Jim_SetResultFormatted() freeing the parameters that have zero refcount. OpenOCD commit 559d08c19ed8 ("jim tests: use installed") adds the only code instance in OpenOCD that first passes a zero refcount object to Jim_SetResultFormatted() and then frees it. By switching jimtcl version to 0.78 or newer this causes a crash of OpenOCD. To trigger the crash in a telnet session, check that the current target is running and type: [target current] arp_waitstate halted 1 Remove the call to Jim_FreeNewObj() after the call to Jim_SetResultFormatted(). Change-Id: I5f5a8bca96a0e8466ff7b789fe578ea9785fa550 Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com> Reviewed-on: http://openocd.zylin.com/5453 Tested-by: jenkins Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2020-03-12semihosting: add semihosting handlers to AArch64Tarek BOCHKATI
note: this works only when the PE is in AArch64 state Change-Id: Id6a336ca7d201df72bd1aaaeccce4185473fc1bd Signed-off-by: Tarek BOCHKATI <tarek.bouchkati@gmail.com> Reviewed-on: http://openocd.zylin.com/5474 Tested-by: jenkins Reviewed-by: Muhammad Omair Javaid <omair.javaid@linaro.org> Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
2020-03-12cortex_a: warn on broken debug_base settingMatthias Welwarsky
A common problem with target configurations appears to be broken debug base address configuration. ARM DDI0406C.d specifies in App. D, 1.4.1, that bit 31 of the debug base address serves as identification of an external debugger, as opposed to an internal access to memory mapped debug registers by the CPU. External accesses are treated as privileged and require no debug authentification via the lock access register. Sometimes the base address of a debug component is wrong even in the targets' ROM table. In this case, the correct base address must be specified using the -dbgbase argument when creating the target. This patch adds a warning when bit 31 of the debug base address is not set, as a hint to the user. Change-Id: I9c41d85a138123c657ef655e3436a2aa39249dcc Signed-off-by: Matthias Welwarsky <matthias.welwarsky@sysgo.com> Reviewed-on: http://openocd.zylin.com/5105 Tested-by: jenkins Reviewed-by: Tommy Vestermark <tov@vestermark.dk> Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
2020-03-12target/armv8_opcodes: use T32 instructions when the PE is in AArch32 stateTarek BOCHKATI
As stated in ARM v8-A Architecture Reference Manual (ARM DDI 0487E.a) in Chapter H4.3 DCC and ITR access modes: Writes to EDITR trigger the instruction to be executed if the PE is in Debug state: - If the PE is in AArch64 state, this is an A64 instruction. - If the PE is in AArch32 state, this is a T32 instruction But in armv8_opcodes specifically in t32_opcodes we were using some A32 instructions for HLT, LDRx and STRx opcodes. Using the correct LDRx and STRx opcodes, fixes 16 and 8 bits memory access when the PE is in AArch32 state. Change-Id: Ib1acbdd4966297e7b069569bcb8deea3c3993615 Signed-off-by: Tarek BOCHKATI <tarek.bouchkati@gmail.com> Reviewed-on: http://openocd.zylin.com/5346 Tested-by: jenkins Reviewed-by: Muhammad Omair Javaid <omair.javaid@linaro.org> Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
2020-03-12target/aarch64: fix soft breakpoint when PE is in AArch32 stateTarek BOCHKATI
Before this patch aarch64_set_breakpoint was using either A64, or A32 HLT opcode by relying on armv8_opcode helper. This behaviors ignores the fact that in AArch32 state the core could execute Thumb-2 instructions, and gdb could request to insert a soft bkpt in a Thumb-2 code chunk. In this change, we check the core_state and bkpt length to know the correct opcode to use. Note: based on https://sourceware.org/gdb/current/onlinedocs/gdb/ARM-Breakpoint-Kinds.html if bkpt length/kind == 3, we should replace a 32-bit Thumb-2 opcode, then we use twice the 16 bits Thumb-2 bkpt opcode and we fix-up the length to 4 bytes, in order to set correctly the bpkt. Change-Id: I8f3551124412c61d155eae87761767e9937f917d Signed-off-by: Tarek BOCHKATI <tarek.bouchkati@gmail.com> Reviewed-on: http://openocd.zylin.com/5355 Tested-by: jenkins Reviewed-by: Muhammad Omair Javaid <omair.javaid@linaro.org> Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
2020-03-12target/aarch64: fix minor stepping issue with gdbTarek BOCHKATI
when using step command from gdb the step happens without any issue, but aarch64_step call explicitly aarch64_poll which consumes the status change to HALTED, so it does not inform gdb that the step has finished. by removing this call, all is back to normal and openocd could inform gdb that the step has finished. Change-Id: I9366aecd20f7d52259b050b8653189b67d9299d0 Signed-off-by: Tarek BOCHKATI <tarek.bouchkati@gmail.com> Reviewed-on: http://openocd.zylin.com/5354 Tested-by: jenkins Reviewed-by: Muhammad Omair Javaid <omair.javaid@linaro.org> Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
2020-03-12target: add examine-fail eventTomas Vanek
A configuration script may want to check the reason why examine fails e.g. device has security lock engaged. tcl/target/kx.cfg and klx.cfg is modified to use the new event for testing of the security lock of Kinetis MCU Change-Id: Id1d3a79d24e84b513f4ea35586cd2ab0437ff9b3 Signed-off-by: Tomas Vanek <vanekt@fbl.cz> Reviewed-on: http://openocd.zylin.com/4289 Tested-by: jenkins Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
2020-03-10semihosting: reorganize semihosting commandsTarek BOCHKATI
the same semihosting handlers chain is declared twice: 1. in src/target/armv4_5.c 2. in src/target/riscv/riscv.c to make it simpler we moved the declaration into 'src/target/semihosting_common.c' under semihosting_common_handlers[]. then we used this into both of armv4_5.c and riscv.c Change-Id: If813b3fd5eb2476658f1308f741c4e805141f617 Signed-off-by: Tarek BOCHKATI <tarek.bouchkati@gmail.com> Reviewed-on: http://openocd.zylin.com/5473 Tested-by: jenkins Reviewed-by: Muhammad Omair Javaid <omair.javaid@linaro.org> Reviewed-by: Tim Newsome <tim@sifive.com> Reviewed-by: Liviu Ionescu <ilg@livius.net>
2020-03-07helper/binarybuffer: fix clang static analyzer warningsTomas Vanek
Writing bits to an uninitialized buffer generated false warnings. Zero buffers before setting them by buf_set_u32|64() (do it only if bit-by-bit copy loop is used, zeroed buffer is not necessary if a fast path write is used) Change-Id: I2f7f8ddb45b0cbd08d3e249534fc51f4b5cc6694 Signed-off-by: Tomas Vanek <vanekt@fbl.cz> Reviewed-on: http://openocd.zylin.com/5383 Tested-by: jenkins Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
2020-03-07target/arm920t: fix clang static analyzer warningTomas Vanek
Change-Id: I570dfb8b20a3f187f1fe660343cf0b75691e2c30 Signed-off-by: Tomas Vanek <vanekt@fbl.cz> Reviewed-on: http://openocd.zylin.com/5375 Tested-by: jenkins Reviewed-by: Oleksij Rempel <linux@rempel-privat.de>
2020-02-29target/arc: fix clang static analyzer warningsEvgeniy Didin
Fixes: * Removed typo in *bitfields initializations. * Removed potentional memory leak allocating reg_data_type_struct_field/reg_data_type_flags_field objects. * Initialize buffers with "0" before usage in buf_set_u32(). * Removed memory leak in jim_arc_add_reg(). Change-Id: Iefde57cd4a48c4f3350c376475df8642607f52ff Signed-off-by: Evgeniy Didin <didin@synopsys.com> Reviewed-on: http://openocd.zylin.com/5480 Reviewed-by: Tomas Vanek <vanekt@fbl.cz> Tested-by: jenkins Reviewed-by: Oleksij Rempel <linux@rempel-privat.de>
2020-02-27Introduce ARCv2 architecture related codeEvgeniy Didin
This patch is an initial bump of ARC-specific code which implements the ARCv2 target(EMSK board) initializing routine and some basic remote connection/load/continue functionality. Changes: 03.12.2019: -Add return value checks. -Using static code analizer next fixes were made: Mem leak in functions: arc_jtag_read_memory,arc_jtag_read_memory, arc_jtag_write_registers, arc_jtag_read_registers, jim_arc_add_reg_type_flags, jim_arc_add_reg_type_struct, arc_build_reg_cache, arc_mem_read. Dead code in "arc_mem_read"; In arc_save_context, arc_restore_context correct arguments in"memset" calls. In "build_bcr_reg_cache", "arc_build_reg_cache" check if list is not empty. 29.12.2019 -Moved code from arc_v2.c to arc.c -Added checks of the result of calloc/malloc calls -Reworked arc_cmd.c: replaced spagetty code with functions -Moved to one style in if statements - to "if(!bla)" -Changed Licence headers 22.01.2020 -Removed unused variables in arc_common -Renamed register operation functions -Introduced arc_deinit_target function -Fixed interrupt handling in halt/resume: * add irq_state field in arc_common * fix irq enable/disable calls ( now STATUS32 register is used) -Switched from buf_set(get)_us32() usage to target_buffer_set(get)_u32() -Made some cleanup 30.01.2020 -Removed redundant arc_register struct, moved target link to arc_reg_desc -Introduced link to BCR reg cache in arc_common for freeing memory. -Now arc_deinit_target frees all arc-related allocated memory. Valgrind shows no memory leaks. -Inroduced arch description in arc.c 01.02.2020 -Remove small memory allocations in arc_init_reg. Instead created reg_value and feature fields in arc_reg_desc. -Add return value for arc_init_reg() func. -Replaced some integer constants(61,62,63) with defines. -Removed redundant conversions in arc_reg_get_field(). -Moved iccm/dccm configuration code from arc_configure() to separate functions. 19.02.2020 -Change sizeof(struct) to sizeof(*ptr) in allocations -Changed if/while(ptr != NULL) to if/while(ptr) -Removed unused variables from struct arc_jtag -Add additional structs to arc_reg_data_type to reduce amount of memory allocations calls and simplifying memory freeing. -Add helper arc_reg_bitfield_t struct which includes reg_data_type_bitfield object and char[] name. Reduces memory allocations calls. -Add limit for reg_type/reg_type_field names(20 symbols). -Add in jim_arc_add_reg_type*() functions additional argnument checks(amount of field/name size). -In jim_arc_add_reg_type*() reduced amount of memory allocations. -Cleanup of jim_arc_add_reg_type*() functions. -For commands update ".usage" fields according docopt. -Cleanup in arc_jtag.c -Renamed functions which require jtag_exeutre_queue() to arc_jtag_enque_*() -Add arc_jtag_enque_register_rw() function, which r/w to jtag ir/dr regs during regiter r/w. 24.02: -Change include guards in arc* files according coding style -Remove _t suffix in struct arc_reg_bitfield_t -Some cleanup Change-Id: I6ab0e82b12e6ddb683c9d13dfb7dd6f49a30cb9f Signed-off-by: Evgeniy Didin <didin@synopsys.com> Cc: Alexey Brodkin <abrodkin@synopsys.com> Reviewed-on: http://openocd.zylin.com/5332 Tested-by: jenkins Reviewed-by: Oleksij Rempel <linux@rempel-privat.de>
2020-02-24coding style: fix space around pointer's asteriskAntonio Borneo
The script checkpatch available in new Linux kernel offers an experimental feature for automatically fix the code in place. While still experimental, the feature works quite well for simple fixes, like spacing. This patch has been created automatically with the script under review for inclusion in OpenOCD, using the command find src/ -type f -exec ./tools/scripts/checkpatch.pl \ -q --types POINTER_LOCATION --fix-inplace -f {} \; then manually reviewed. OpenOCD coding style does not mention the space around pointer's asterisk, so no check is enforced. This patch only makes the style uniform across the files. The patch only changes amount and position of whitespace, thus the following commands show empty diff git diff -w git log -w -p git log -w --stat Change-Id: Iefb4998e69bebdfe0d1ae65cadfc8d2c4f166d13 Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com> Reviewed-on: http://openocd.zylin.com/5197 Tested-by: jenkins
2020-02-24adi_v5_dapdirect: fix connect under resetAntonio Borneo
Deassert the reset only if connect under reset is not required; otherwise, assert the reset. This fix aligns the behavior of connect under reset in dapdirect with the behavior in jtag and swd. Change-Id: I937ef4320b44e51ef6cb0e349e12348dbfbe4abb Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com> Reviewed-on: http://openocd.zylin.com/5415 Tested-by: jenkins
2020-02-23target/adi_v5_swd: fix clang static analyzer warningTomas Vanek
Change-Id: I24b3e74b62fad469e3150ad97a10a9ab69c2793b Signed-off-by: Tomas Vanek <vanekt@fbl.cz> Reviewed-on: http://openocd.zylin.com/5374 Tested-by: jenkins Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com> Reviewed-by: Tarek BOCHKATI <tarek.bouchkati@gmail.com> Reviewed-by: Oleksij Rempel <linux@rempel-privat.de>
2020-02-15armv8: check the core state to pass the correct arch to gdbAntonio Borneo
Commit 3799eded6761 ("target/aarch64: add support for multi-architecture gdb") passes the constant string "aarch64" as architecture to gdb. This is not working if the core is running in 32 bits mode; gdb reports: Truncated register 8 in remote 'g' packet then closes the connection with OpenOCD. Make the architecture string dependant from the current state of the core. Change-Id: I16e1614ea02ba29bf87f450b3dfe25c83c9a3612 Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com> Reviewed-on: http://openocd.zylin.com/5234 Tested-by: jenkins Reviewed-by: Muhammad Omair Javaid <omair.javaid@linaro.org>
2020-02-15coding style: remove unnecessary parenthesesAntonio Borneo
Identified by checkpatch script from Linux kernel v5.1 using the command find src/ -type f -exec ./tools/scripts/checkpatch.pl \ -q --types UNNECESSARY_PARENTHESES -f {} \; then fixed manually. Change-Id: Ia2d9a0953d9b89fc87dc1195aa05c7f63c068c48 Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com> Reviewed-on: http://openocd.zylin.com/5196 Tested-by: jenkins Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2020-02-15target/nds32: fix type of magic numberAntonio Borneo
The macro NDS32_COMMON_MAGIC was cast-ed to int to avoid compile time error for comparison type mismatch while comparing it with the field common_magic. This is incorrect because the macro value is a 32 bit unsigned value; better changing the type of the field common_magic to keep the unsigned value. Issue identified by checkpatch script from Linux kernel v5.1 using the command find src/ -type f -exec ./tools/scripts/checkpatch.pl \ -q --types TYPECAST_INT_CONSTANT -f {} \; Change-Id: Ib5924b6cecdffe70ab5c78d3b30a9c8e4deb7c7b Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com> Reviewed-on: http://openocd.zylin.com/5193 Tested-by: jenkins Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2020-01-29move ftdi_location deprecation helper to proper placeOleksij Rempel
Change-Id: I927d4e918acbf321aea1dd7a8de95fbaa8fbbbf0 Signed-off-by: Oleksij Rempel <linux@rempel-privat.de> Reviewed-on: http://openocd.zylin.com/5278 Tested-by: jenkins Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
2020-01-27target/arm_cti: fix regression from Tcl_return_values seriesTomas Vanek
Since commit 7f260f5009a774f2d66b5f3037f8f595c6881d4d native OpenOCD command handlers should not directly use Jim_SetResult functions. The Tcl result of a native command is built as concatenation of command_print() strings and Jim_SetResult() is called after return of the command handler. Replace "wrong number of args" error messages (now not delivered to user) by simply return ERROR_COMMAND_SYNTAX_ERROR Change-Id: I40c1374a13859cefbdef68e0f1c13ab93538bd50 Signed-off-by: Tomas Vanek <vanekt@fbl.cz> Reviewed-on: http://openocd.zylin.com/5363 Tested-by: jenkins Reviewed-by: Tarek BOCHKATI <tarek.bouchkati@gmail.com>
2020-01-20mips_ejtag: there is no DCR.MIPS64 bitJiri Kastner
available revisions (2.60, 3.10, 5.06 and 6.10) of MD00047 (EJTAG specification), have only in IMPCODE MIPS32/MIPS64 bit/flag. Change-Id: If9191b6ced760c59bb7551bb041cd72b0a060bb1 Signed-off-by: Jiri Kastner <cz172638@gmail.com> Reviewed-on: http://openocd.zylin.com/4628 Reviewed-by: Oleksij Rempel <linux@rempel-privat.de> Tested-by: jenkins
2020-01-16target/xscale: remove duplicated commandTomas Vanek
Reported by clang static analyzer. Change-Id: I893af10852af4885507ed62d024008159a80dd56 Signed-off-by: Tomas Vanek <vanekt@fbl.cz> Reviewed-on: http://openocd.zylin.com/5382 Tested-by: jenkins Reviewed-by: Oleksij Rempel <linux@rempel-privat.de>
2020-01-16target/etm: add check for calloc errorTomas Vanek
and fix one more clang static analyzer warning. Change-Id: I17f03e318e1cf7617e7f753e7ca960552be547e5 Signed-off-by: Tomas Vanek <vanekt@fbl.cz> Reviewed-on: http://openocd.zylin.com/5381 Tested-by: jenkins Reviewed-by: Oleksij Rempel <linux@rempel-privat.de>
2020-01-16target/semihosting_common: fix minor memory leakTomas Vanek
Reported by clang static analyzer. Change-Id: Ie663f49d92588c0d8b502cfdd8fc34004b308066 Signed-off-by: Tomas Vanek <vanekt@fbl.cz> Reviewed-on: http://openocd.zylin.com/5380 Reviewed-by: Liviu Ionescu <ilg@livius.net> Tested-by: jenkins Reviewed-by: Oleksij Rempel <linux@rempel-privat.de>
2020-01-16target/target: fix clang static analyzer warningsTomas Vanek
Change-Id: I23e6586be60915f21a7179a994a1ec93fb9b2c36 Signed-off-by: Tomas Vanek <vanekt@fbl.cz> Reviewed-on: http://openocd.zylin.com/5379 Tested-by: jenkins Reviewed-by: Oleksij Rempel <linux@rempel-privat.de>
2020-01-16target/avr32_jtag: fix error returnsTomas Vanek
Fixed only 2 error returns discovered by clang static analyzer. There are obviously many more missing error tests in avr32_jtag.c These was not fixed to keep this change minimal. Not tested with hw. Change-Id: I6c79f6248db774990ddb42c0dacdb621651ed69e Signed-off-by: Tomas Vanek <vanekt@fbl.cz> Reviewed-on: http://openocd.zylin.com/5378 Tested-by: jenkins Reviewed-by: Oleksij Rempel <linux@rempel-privat.de>
2020-01-16target/arm_dpm: add missing error returnsTomas Vanek
Discoverd by clang static analyzer. Change-Id: I93d5de0a36216e62b170fe8cc870431226a7777f Signed-off-by: Tomas Vanek <vanekt@fbl.cz> Reviewed-on: http://openocd.zylin.com/5377 Tested-by: jenkins Reviewed-by: Oleksij Rempel <linux@rempel-privat.de>
2020-01-16target/arm946e: add missing error detectionTomas Vanek
Discoverd by clang static analyzer. While on it remove useless type casts from arm946e_read_cp15() parameter. Change-Id: I549e19685b431400243800ee0f7d1bbe6cdb14b4 Signed-off-by: Tomas Vanek <vanekt@fbl.cz> Reviewed-on: http://openocd.zylin.com/5376 Tested-by: jenkins Reviewed-by: Oleksij Rempel <linux@rempel-privat.de>
2020-01-14target/target: parse value as proper typeChristopher Head
The `value` variable is passed into `target_fill_mem` as its second-to-last parameter. That parameter is of type `uint64_t`. It is appropriate to parse the value as that type, since otherwise a target with a 32-bit address space but 64-bit data write capabilities would not be able to exercise those capabilities. Change-Id: Ib336d47d42c27cd2b5ba1206b04e8f740f167dba Signed-off-by: Christopher Head <chead@zaber.com> Reviewed-on: http://openocd.zylin.com/5219 Reviewed-by: Tomas Vanek <vanekt@fbl.cz> Tested-by: jenkins
2020-01-14stlink: add DAP direct driverAntonio Borneo
STLINK-V3 and the new firmware V2J24 for ST-LINK/V2 provide API to directly access the DAP registers. This mode permits to use the native target in cortex_m.c, with no need to override it with the target in hla_target.c. Other advantages wrt HLA are: support for Cortex-A cores, support for SoC multi-core and/or multi AP, support for OpenOCD commands "dap" thus including control of CSW. This obsoletes the existing HLA driver for ST-Link, that should anyway be kept for those cases where it's not possible to update the ST-Link firmware. This commit introduces the minimal implementation for direct DAP access. The implementation is much slower than the HLA because every memory transfer requires several USB packets. Further commits will close the performance gap. The whole ST-Link driver is compiled under BUILD_HLADAPTER, to remove the need to split the driver between the two modes. This has to be reworked, but it's quite invasive! A new interface file stlink-dap.cfg is added and should be used in place of stlink.cfg to enable the DAP mode. Documentation is updated and reports limitation on the maximum AP number that can be accessed by ST-Link for some firmware already tested. Change-Id: I932ffe16bc81d00b1fe489e2944fda13470cce9b Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com> Reviewed-on: http://openocd.zylin.com/4904 Tested-by: jenkins Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2020-01-14adi_v5_dapdirect: add support for adapter drivers that provide DAP APIAntonio Borneo
Some high level adapters, like STLINK-V3 and new firmware for ST-Link/V2, provide API to directly access the DAP registers hiding the details of the physical transport JTAG or SWD. OpenOCD has already the intermediate API in struct dap_ops that are suitable for such adapters, but are not exposed to the adapter drivers. Add in struct adapter_driver two independent struct dap_ops for the cases of physical JTAG and SWD transport. Add new transport names "dapdirect_jtag" and "dapdirect_swd", to be used by the drivers that provide one or both DAP API. Add the necessarily glue in target/adi_v5_dapdirect.c Change-Id: I2bb8e3a80fba750f2c218d877cfa5888428e3c28 Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com> Reviewed-on: http://openocd.zylin.com/4903 Tested-by: jenkins Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2020-01-14adapter: switch from struct jtag_interface to adapter_driverAntonio Borneo
To reorganize the adapters code, introduce an adapter_driver struct that contains all the adapter generic part, while keeping in two separate struct the specific API jtag_ops and swd_ops. Move the allocation of *adapter_driver from the JTAG-specific file core.c to the more adapter-specific file adapter.c While splitting the old jtag_interface for every driver, put the fields in the same order as in the struct declaration so we keep a consistent code across all the drivers. While other transport specific API could/would be added as separate ops, nothing is done here for HLA. Change-Id: I2d60f97ac514c0dd2d93a6ec9be66fd9d388dad5 Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com> Reviewed-on: http://openocd.zylin.com/4900 Tested-by: jenkins Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2020-01-14hla: use the new system_reset APIAntonio Borneo
HLA uses its own internal driver's API to control the adapter's system reset, but at the same time it calls jtag_add_reset() to avoid breaking the internal logic of OpenOCD. This implicitly forces HLA to rely on jtag queue mechanism, even if HLA has no link with JTAG state machine. It requires HLA to implement an empty execute_queue() to comply with the JTAG queue. Modify the HLA framework and the HLA targets to use the new adapter API for system_reset and decouple HLA from JTAG queue. Rename the HLA static functions adapter_assert_reset() and adapter_deassert_reset() to avoid overlap with the global functions with same name. While there, fix a minor typo in a comment s/incase/in case/. Do not remove from HLA the JTAG specific API execute_queue(), even if not required anymore, because OpenOCD code still has calls to jtag_execute_queue() in case of non JTAG transport. Change-Id: I0e65e3e557bd665bd3d3aeaa84ea609b55a05e48 Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com> Reviewed-on: http://openocd.zylin.com/4896 Tested-by: jenkins Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2020-01-14swd: get rid of jtag queue to assert/deassert srstAntonio Borneo
The transport SWD uses the JTAG queue to assert/deassert the system reset srst. This is the major inconsistency that has to be removed to properly split JTAG and SWD. Introduce a new driver API, reset(), to controls both the signals trst and srst in the driver, skipping the JTAG queue. Put the new API in struct jtag_interface, even if in this patch it's used for SWD only; the goal is to get it reused by the other transports. Add the implementation of the API in all the drivers that implement SWD. Such implementation is almost the same of the old code in JTAG queue. Create a wrapper adapter_system_reset() to use the new API and remove the SWD specific swd_add_reset(). In the wrapper replace jtag_add_sleep() with jtag_sleep(), because the former uses the JTAG queue too. Rename the old jtag_add_reset() as legacy_jtag_add_reset() with the target to remove it when all drivers would be ported to the new reset API. Create a new jtag_add_reset() that calls the legacy function for drivers still on the old reset API. Use the new API also on JTAG transport for the drivers that can support both SWD and JTAG. For the moment, do not modify the implementation of JTAG-only drivers, which will continue using the usual method. This should be cleaned-up in future commits. Change-Id: I32331c88313f6059b25e12c6bb0156aebc1c074f Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com> Reviewed-on: http://openocd.zylin.com/4895 Tested-by: jenkins Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2020-01-02arm_adi_v5: add API send_sequence() and use itAntonio Borneo
The method to send an arbitrary sequence to DAP depends on the transport and is thus different on JTAG and SWD. This is already coded in dap_to_jtag() and dap_to_swd(). Add a new API send_sequence() in struct dap_ops. Add the implementations of send_sequence() in adi_v5_jtag.c and adi_v5_swd.c Rewrite dap_to_jtag() and dap_to_swd() using the new API. Move the enum swd_special_seq in arm_adi_v5.h to solve a circular dependencies among swd.h and arm_adi_v5.h Change-Id: I9db13a00f129761eab283783c094cfff2dd92610 Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com> Reviewed-on: http://openocd.zylin.com/4902 Tested-by: jenkins Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2020-01-02target/arm_cti: add new 'ack' and 'channel' commandsTarek BOCHKATI
these commands have been introduced to ease the manipulation of CTI trough script files, these commands are: - $cti_name ack $event : to acknowledge a CTI event - $cti_name channel $channel_number $operation: to perform an operation on a specific channel, the possible operations are: gate, ungate, set, clear and pulse Change-Id: I35463867a3c85072f3776c3aeb1e5788953ec435 Signed-off-by: Tarek BOCHKATI <tarek.bouchkati@gmail.com> Reviewed-on: http://openocd.zylin.com/5315 Reviewed-by: Tomas Vanek <vanekt@fbl.cz> Tested-by: jenkins
2019-12-21target/armv7m_trace: Improve SWO frequency auto-detectionMarc Schink
The SWO frequency auto-detection with J-Link adapters does not work properly in the current implementation. This is because the trace layer has only information about the highest possible SWO frequency supported by the adapter. With that the trace layer calculates the SWO prescaler which usually leads to a frequency deviation greater than what is permitted by J-Link adapters. Move the calculation of the SWO prescaler from the trace layer into the trace configuration of the adapter to overcome this problem. The adapter has the necessary information to choose a suitable SWO frequency and calculate the corresponding prescaler that complies with the maximum allowed frequency deviation. Tested with: - STM32L152RC Discovery Kit (ST-Link) - EFM32GG-STK3700 (J-Link) Change-Id: I38ff2b89d32f0a92c597989b590afe5c75cf4902 Signed-off-by: Marc Schink <openocd-dev@marcschink.de> Reviewed-on: http://openocd.zylin.com/3903 Tested-by: jenkins Reviewed-by: Paul Fertser <fercerpav@gmail.com>
2019-12-19target/armv4_5: use c99 array designator to init arm_core_regs[]Antonio Borneo
During code analysis and development, counting again and again the lines to find the index of the register is a boring error-prone brain-damaging activity. Use the c99 syntax and add once forever the array designators to specify the index values. The code behavior is not changed. Change-Id: I2c70f70794475679efb91a8dfadc00f50715bd3f Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com> Reviewed-on: http://openocd.zylin.com/5256 Tested-by: jenkins Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2019-12-19gdb_server: fix string length with semihosting_fileioAntonio Borneo
The GDB file-I/O remote protocol extension, used for implementing the semihosting file I/O, requires the length of strings to include the trailing zero character, as explicitly stated inside a comment in GDB source code [1]: /* 1. Parameter: Ptr to pathname / length incl. trailing zero. */ ARM specification for semihosting [2] requires the string length to not include the trailing zero character, e.g. in SYS_OPEN specifications: "field 3: An integer that gives the length of the string pointed to by field 1. The length does not include the terminating null character that must be present." The mismatch above requires OpenOCD to add "one" to the string length before passing it to GDB. Such conversion is missing either in the generic semihosting provider of the data, the function semihosting_common(), and in the consumer of the data, the gdb_server function gdb_fileio_reply(). The conversion is already implemented in the target specific function nds32_get_gdb_fileio_info(), but it's not the preferred place for such GDB specific requirement. This issue affects the semihosting calls "open", "unlink", "rename" and "system". Remove the "+1" conversion from nds32_get_gdb_fileio_info(). Add the "+1" conversion in gdb_fileio_reply(). [1] http://sourceware.org/git/gitweb.cgi?p=binutils-gdb.git;f=gdb/remote-fileio.c;h=11c141e42c4d#l381 [2] "Semihosting for AArch32 and AArch64, Release 2.0" https://static.docs.arm.com/100863/0200/semihosting.pdf Change-Id: I35461bcb30f734fe2d51f7f0d418e3d04b4af506 Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com> Reviewed-on: http://openocd.zylin.com/5322 Tested-by: jenkins Reviewed-by: Steven Stallion <sstallion@gmail.com> Reviewed-by: Muhammad Omair Javaid <omair.javaid@linaro.org> Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2019-11-28mips64: Add generic mips64 target supportPeter Mamonov
Change-Id: I2bdd2573f23e65652686d18031698f423eec77c0 Signed-off-by: Konstantin Kostyukhin <kost@niisi.msk.ru> Signed-off-by: Aleksey Kuleshov <rndfax@yandex.ru> Signed-off-by: Peter Mamonov <pmamonov@gmail.com> Signed-off-by: Oleksij Rempel <linux@rempel-privat.de> CC: Dongxue Zhang <elta.era@gmail.com> CC: Paul Fertser <fercerpav@gmail.com> CC: Salvador Arroyo <sarroyofdez@yahoo.es> CC: Spencer Oliver <spen@spen-soft.co.uk> Reviewed-on: http://openocd.zylin.com/2322 Tested-by: jenkins Reviewed-by: Paul Fertser <fercerpav@gmail.com>
2019-11-28mips: Add MIPS64 supportPeter Mamonov
The patch adds support for processors implementing MIPS64 instruction set. Change-Id: I79a983dfdead81553457a0f3e9e739a9785afaac Signed-off-by: Konstantin Kostyukhin <kost@niisi.msk.ru> Signed-off-by: Andrey Sidorov <anysidorov@gmail.com> Signed-off-by: Aleksey Kuleshov <rndfax@yandex.ru> Signed-off-by: Antony Pavlov <antonynpavlov@gmail.com> Signed-off-by: Peter Mamonov <pmamonov@gmail.com> Signed-off-by: Oleksij Rempel <linux@rempel-privat.de> CC: Dongxue Zhang <elta.era@gmail.com> CC: Paul Fertser <fercerpav@gmail.com> CC: Salvador Arroyo <sarroyofdez@yahoo.es> CC: Spencer Oliver <spen@spen-soft.co.uk> Reviewed-on: http://openocd.zylin.com/2321 Tested-by: jenkins Reviewed-by: Paul Fertser <fercerpav@gmail.com>
2019-11-07STM8 Target relicensing to GPLv2 and laterAke Rehnman
Change-Id: I21126945c0475399aaf12239b8972fde5fddd845 Signed-off-by: Ake Rehnman <ake.rehnman@gmail.com> Reviewed-on: http://openocd.zylin.com/5331 Tested-by: jenkins Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com> Reviewed-by: Tomas Vanek <vanekt@fbl.cz> Reviewed-by: Tarek BOCHKATI <tarek.bouchkati@gmail.com>
2019-10-18target/cortex_a: Extract code to read/write from/to register to/from DCCFlorian Fainelli
In preparation for supporting the ARM MCRR and MRRC commands which will require using two 32-bit registers to read/write a 64-bit internal register, extract the common logic to read/write from/to a register to/from DCC and make that parameterized such that we can do this through not just r0. Change-Id: Iadb73f5cde8cf5961b5a18ddd198bf39d791e610 Signed-off-by: Florian Fainelli <f.fainelli@gmail.com> Reviewed-on: http://openocd.zylin.com/5227 Tested-by: jenkins Reviewed-by: Matthias Welwarsky <matthias@welwarsky.de>
2019-10-18target/cortex_a: use aligned accesses for read/write cpu memory slowAntonio Borneo
Armv7a is able to read and write memory at un-aligned address, but only when bit SCTLR.A (Alignment check enable) is zero and the address belongs to a memory space with attribute "Normal" (see [1] chapter A3.2.1 "Unaligned data access"). In all the other cases the memory access will trigger an alignment fault data abort exception. Memory attributes are explained in [1] chapter A3.5 "Memory types and attributes and the memory order model". Disabling the MMU cause a change in memory attribute, as explained in [1] chapter B3.2 "The effects of disabling MMUs on VMSA behavior". This can cause several issues. e.g. a SW breakpoint on un-aligned 4-byte Thumb instruction, set when MMU is on, can be impossible to remove when MMU turns off. While is possible to check all the possible conditions before an un-aligned memory access, it's clearly more maintainable to skip such complexity and only perform aligned accesses. Check the alignment and eventually modify the data size before calling the functions cortex_a_{read,write}_cpu_memory_slow(). Change the comment in the two functions above to comply with the new behaviour. [1] ARM DDI 0406C.d - "ARM Architecture Reference Manual, ARMv7-A and ARMv7-R edition" Change-Id: I57b4c11e7fa7e78aaaaee4406a5734b48db740ae Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com> Reviewed-on: http://openocd.zylin.com/5138 Tested-by: jenkins Reviewed-by: Matthias Welwarsky <matthias@welwarsky.de>
2019-10-18adi_v5_jtag: avoid RAM exhaustion by limiting jtag queue sizeBohdan Tymkiv
Issue has been found when I tried to read 64 MiB QSPI flash bank. Bank is memory mapped, default_flash_read() is used for 'flash read_bank' command. OpenOCD consumed as much as 6.8 GiB of RAM during this process. Investigation showed that this happens because JTAG queue is not limited in any way. OpenOCD queues 16 millions of AP reads allocating all corresponding data structures. Most of this memory is allocated in: cmd_queue_alloc (commands.c) - 4.2 GiB dap_cmd_new (adi_v5_jtag.c) - 2.25GiB This patch implements a pool of "struct dap_cmd" objects using linked list. Objects are taken from a pool in "dap_cmd_new()" and returned to the pool when they are not needed. Size of the pool is limited to 64K of objects, JTAG queue is forcibly executed when this limit is reached. Checked with Valgrind and Clang analyzer - no new warnings. Change-Id: I5aaaecce5ed71414f7965a2598f49742f6a6b2b5 Signed-off-by: Bohdan Tymkiv <bhdt@cypress.com> Reviewed-on: http://openocd.zylin.com/4948 Tested-by: jenkins Reviewed-by: Matthias Welwarsky <matthias@welwarsky.de>
generated by cgit v1.2.3-18-g5258 (git 2.32.0) at 2025-07-05 20:54:00 +0000