aboutsummaryrefslogtreecommitdiff
path: root/test/CodeGen/X86
AgeCommit message (Expand)Author
2011-11-29Fix shuffle decoding for memory forms for (V)SHUFPS/D.Craig Topper
2011-11-29Fix issues in shuffle decoding around VPERM* instructions. Fix shuffle decodi...Craig Topper
2011-11-29Fix VINSERTF128/VEXTRACTF128 to be marked as FP instructions. Allow execution...Craig Topper
2011-11-29Correctly mark VPERM2F128 as being an FP instruction and add execution domain...Craig Topper
2011-11-28Revert r145273 and fix in SelectionDAG::InferPtrAlignment() instead.Evan Cheng
2011-11-28DAG combine should not increase alignment of loads / stores with alignment lessEvan Cheng
2011-11-28Add X86 instruction selection for VPERM2I128 when AVX2 is enabled. Merge VPER...Craig Topper
2011-11-27Take two on rotating the block ordering of loops. My previous attemptChandler Carruth
2011-11-27Rework a bit of the implementation of loop block rotation to not rely soChandler Carruth
2011-11-27remove autoupgrade support for old forms of llvm.prefetch and the oldChris Lattner
2011-11-27Upgrade syntax of tests using volatile instructions to use 'load volatile' in...Chris Lattner
2011-11-27remove some old autoupgrade logicChris Lattner
2011-11-27Introduce a loop block rotation optimization to the new block placementChandler Carruth
2011-11-26Fix APFloat::convert so that it handles narrowing conversions correctly; itEli Friedman
2011-11-25This patch contains support for encoding FMA4 instructions andBruno Cardoso Lopes
2011-11-24Remove 256-bit specific node types for UNPCKHPS/D and instead use the 128-bit...Craig Topper
2011-11-24Fix a silly use-after-free issue. A much earlier version of this codeChandler Carruth
2011-11-24When adding blocks to the list of those which no longer have any CFGChandler Carruth
2011-11-23X86: Use btq for bit tests if the immediate can't be encoded in 32 bits.Benjamin Kramer
2011-11-23test/CodeGen/X86/block-placement.ll: Add explicit -mtriple=i686-linux. X86 Wi...NAKAMURA Takumi
2011-11-23Relax an invariant that block placement was trying to assert a bitChandler Carruth
2011-11-23I added several lines in X86 code generator that allow to choose Elena Demikhovsky
2011-11-23Handle the case of a no-return invoke correctly. It actually still hasChandler Carruth
2011-11-23Enable stack protectors for all arrays, not just char arrays. rdar://5875909Bob Wilson
2011-11-23Fix PR11422.Jakob Stoklund Olesen
2011-11-23Fix a crash in block placement due to an inner loop that happened to beChandler Carruth
2011-11-22Fix a devilish miscompile exposed by block placement. TheChandler Carruth
2011-11-22Add triple to the test.Rafael Espindola
2011-11-22If a register is both an early clobber and part of a tied use, handle the useRafael Espindola
2011-11-21Lowering for v32i8 to VPUNPCKLBW/VPUNPCKHBW when AVX2 is enabled.Craig Topper
2011-11-21Test case for r145026Craig Topper
2011-11-21Make LowerSIGN_EXTEND_INREG split 256-bit vectors when AVX1 is enabled and us...Craig Topper
2011-11-20test/CodeGen/X86/block-placement.ll: Relax expressions for Win32.NAKAMURA Takumi
2011-11-20The logic for breaking the CFG in the presence of hot successors didn'tChandler Carruth
2011-11-20Add some comments to the latest test case I added here to document whatChandler Carruth
2011-11-20Add code for lowering v32i8 shifts by a splat to AVX2 immediate shift instruc...Craig Topper
2011-11-19Use 256-bit vcmpeqd for creating an all ones vector when AVX2 is enabled.Craig Topper
2011-11-19Move the handling of unanalyzable branches out of the loop-driven chainChandler Carruth
2011-11-19Test cases for SSSE3/AVX integer horizontal add/sub.Craig Topper
2011-11-19Extend VPBLENDVB and VPSIGN lowering to work for AVX2.Craig Topper
2011-11-18Add AVX2 vpbroadcast supportNadav Rotem
2011-11-17DISubrange supports unsigned lower/upper array bounds, so let's not fake it i...Devang Patel
2011-11-16Make sure to replace the chain properly when DAGCombining a LOAD+EXTRACT_VECT...Eli Friedman
2011-11-16Another missing X86ISD::MOVLPD pattern. rdar://10450317Evan Cheng
2011-11-16Disable expensive two-address optimizations at -O0. rdar://10453055Evan Cheng
2011-11-16Fix testcase.Eli Friedman
2011-11-16CONCAT_VECTORS can have more than two operands. PR11389.Eli Friedman
2011-11-15AVX: Add support for vbroadcast from BUILD_VECTOR and refactor some of the vb...Nadav Rotem
2011-11-15test/CodeGen/X86/dec-eflags-lower.ll: Relax expression for win32 x64.NAKAMURA Takumi
2011-11-15Added custom lowering for load->dec->store sequence in x86 when the EFLAGS re...Pete Cooper