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AgeCommit message (Expand)Author
2010-05-17Careful with reg_sequence coalescing to not to overwrite sub-register indices.Evan Cheng
2010-05-17Turn on -neon-reg-sequence by default.Evan Cheng
2010-05-17Avoid allocating the same physreg to multiple virtregs in one instruction.Jakob Stoklund Olesen
2010-05-15Some cheap DAG combine goodness for multiplication with a particular constant.Anton Korobeynikov
2010-05-15Allow TargetLowering::getRegClassFor() to be called on illegal types. AlsoEvan Cheng
2010-05-11Keep track of the last place a live virtreg was used.Jakob Stoklund Olesen
2010-05-11Select @llvm.trap to the special B with 1111 condition (i.e. trap) instruction.Evan Cheng
2010-05-07Correct some bogus target triples.Duncan Sands
2010-05-05fix copy/paste oops.Jim Grosbach
2010-05-05Add tests for ARMV7M divide instruction useJim Grosbach
2010-05-05remove unneeded underscores.Jim Grosbach
2010-05-05Convert to filecheckJim Grosbach
2010-05-03Fix tests to use fadd, fsub, and fmul, instead of add, sub, and mul,Dan Gohman
2010-05-03Fix a bug which prevented tail merging of return instructions inDan Gohman
2010-05-02Remove the -enable-sjlj-eh option, which doesn't do anything.Duncan Sands
2010-04-22Update ARM DAGtoDAG for matching UBFX instruction for unsigned bitfieldJim Grosbach
2010-04-20Fix tests for Neon load/store intrinsics to match the i8* types expected byBob Wilson
2010-04-17Fix declarations in a few more tests.Nick Lewycky
2010-04-17Start function numbering at 0.Dan Gohman
2010-04-15Fix PR6847. RegScavenger should ignore DebugValues.Jakob Stoklund Olesen
2010-04-15add a simple dag combine to replace trivial shl+lshr withChris Lattner
2010-04-14Don't custom lower bit converts to ARM VMOVDRRD or VMOVDRR when the operandBob Wilson
2010-04-13Handle a v2f64 formal parameter that is split between registers and memoryBob Wilson
2010-04-09Add a testcase for svn r100568.Bob Wilson
2010-04-07Split big test into multiple directories to cater toDale Johannesen
2010-03-25switch the flag for using NEON for SP floating point to a subtarget 'feature'.Jim Grosbach
2010-03-20pr6652: Use LDM to restore PC to the return address on ARMv4.Bob Wilson
2010-03-17Added sub-formats to the NeonI/NeonXI instructions to further refine the NEONFrmJohnny Chen
2010-03-16--- Reverse-merging r98637 into '.':Bob Wilson
2010-03-16Initial ARM/Thumb disassembler check-in. It consists of a tablgen backendJohnny Chen
2010-03-16Stop using the old pre-UAL syntax for LDM/STM instruction suffixes.Bob Wilson
2010-03-14Fix typoAnton Korobeynikov
2010-03-14Feature test for half precision FP.Anton Korobeynikov
2010-03-14fix AsmPrinter::GetBlockAddressSymbol to always return a uniqueChris Lattner
2010-03-10Enable machine cse pass.Evan Cheng
2010-03-06Initial bits of ARMv4-only support.Anton Korobeynikov
2010-03-04pr6478: The frame pointer spill frame index is only defined when there is aBob Wilson
2010-03-04pr6480: Don't try producing ld/st-multiple instructions when the address isBob Wilson
2010-02-24Check for comparisons of +/- zero when optimizing less-than-or-equal andBob Wilson
2010-02-18Use NEON vmin/vmax instructions for floating-point selects.Bob Wilson
2010-02-16Fix pr6111: Avoid using the LR register for the target address of an indirectBob Wilson
2010-02-12Reapply the new LoopStrengthReduction code, with compile time andDan Gohman
2010-02-10Delete dead PHI machine instructions. These can be created due to typeBob Wilson
2010-02-08convert to filecheck.Chris Lattner
2010-02-06Run codegen dce pass for all targets at all optimization levels. Previously it'sEvan Cheng
2010-01-30Fix a gross typo: ARMv6+ may or may not support unaligned memory operations.Anton Korobeynikov
2010-01-26emit jump table an alias ".set" directives through MCStreamer as Chris Lattner
2010-01-26Emit .comm alignment in bytes but .align in powers of 2 for ARM ELF.Rafael Espindola
2010-01-25Update test for darwin.Rafael Espindola
2010-01-25Fix PR6134.Rafael Espindola