llvm - http://llvm.org

Age	Commit message (Expand)	Author
2010-06-24	Replace a big gob of old coalescer logic with the new CoalescerPair class.	Jakob Stoklund Olesen
2010-06-24	Eliminate the other half of the BRCOND optimization, and update	Dan Gohman
2010-06-24	Revert "Replace a big gob of old coalescer logic with the new CoalescerPair c...	Jakob Stoklund Olesen
2010-06-24	Replace a big gob of old coalescer logic with the new CoalescerPair class.	Jakob Stoklund Olesen
2010-06-23	We are missing opportunites to use ldm. Take code like this:	Bill Wendling
2010-06-23	Reinstate correct test, remove the real invalidated test.	Dale Johannesen
2010-06-23	Remove tests invalidated by previous checkin.	Dale Johannesen
2010-06-22	Thumb1 functions using @llvm.returnaddress were not saving the incoming LR.	Bob Wilson
2010-06-21	Fix PR7421: bug in kill transferring logic. It was ignoring loads / stores wh...	Evan Cheng
2010-06-21	Add missing FileCheck call.	Dale Johannesen
2010-06-21	Fix PR 7433. Silly typo in non-Darwin ARM tail call	Dale Johannesen
2010-06-19	Disable sibcall optimization for Thumb1 for now since Thumb1RegisterInfo::emi...	Evan Cheng
2010-06-18	Allow ARM if-converter to be run after post allocation scheduling.	Evan Cheng
2010-06-18	Fix an inverted condition.	Evan Cheng
2010-06-18	When using ADDri to get the address of a stack object, 255 is a conservative	Jakob Stoklund Olesen
2010-06-18	Enable tail calls on ARM by default, with some	Dale Johannesen
2010-06-18	Treat the ARM inline asm {cc} constraint as a physreg (%CPSR), just like X86	Jakob Stoklund Olesen
2010-06-17	Remove arm_apcscc from the test files. It is the default and doing this	Rafael Espindola
2010-06-15	Remove the local register allocator.	Jakob Stoklund Olesen
2010-06-15	Set the mtriple in some tests so that they use AAPCS.	Rafael Espindola
2010-06-15	Remove the arm_aapcscc marker from the tests. It is the default	Rafael Espindola
2010-06-15	Generalize the pre-coalescing of extract_subregs feeding reg_sequences,	Bob Wilson
2010-06-11	Add a missing bitcast. This code used to only handle conversions between	Bob Wilson
2010-06-04	Re-apply 105308 with fix.	Evan Cheng
2010-06-04	More tail call removal.	Dale Johannesen
2010-06-04	Remove more tail calls.	Dale Johannesen
2010-06-04	Remove a tail call, and move some CHECKs to the	Dale Johannesen
2010-06-03	Revert 105308.	Bob Wilson
2010-06-02	Enable machine cse of instructions which define physical registers.	Evan Cheng
2010-05-28	Fix some latency computation bugs: if the use is not a machine opcode do not ...	Evan Cheng
2010-05-27	Add a -regalloc=default option that chooses a register allocator based on the -O	Jakob Stoklund Olesen
2010-05-27	llvm can't correctly support 'H', 'Q' and 'R' modifiers. Just mark it an error.	Evan Cheng
2010-05-24	LR is in GPR, not tGPR even in Thumb1 mode.	Evan Cheng
2010-05-22	Implement @llvm.returnaddress. rdar://8015977.	Evan Cheng
2010-05-22	Recognize more BUILD_VECTORs and VECTOR_SHUFFLEs that can be implemented by	Bob Wilson
2010-05-21	Change CodeGen/ARM/2009-11-02-NegativeLane.ll to use 16-bit vector elements	Bob Wilson
2010-05-21	Teach VirtRegRewriter to handle spilling in instructions that have multiple	Jakob Stoklund Olesen
2010-05-21	Change ARM scheduling default to list-hybrid if the target supports floating ...	Evan Cheng
2010-05-20	When canonicalizing icmp operand order to put the loop invariant	Dan Gohman
2010-05-20	Handle Neon v2f64 and v2i64 vector shuffles as register copies.	Bob Wilson
2010-05-19	Teach LSR how to cope better with unrolled loops on targets where	Dan Gohman
2010-05-19	TwoAddressInstructionPass doesn't really know how to merge live intervals when	Jakob Stoklund Olesen
2010-05-19	Testcase to go with 104141.	Bob Wilson
2010-05-19	Intrinsics which do a vector compare (results are all zero or all ones) are m...	Evan Cheng
2010-05-18	Remember to update VirtRegLastUse when spilling without killing before a call.	Jakob Stoklund Olesen
2010-05-18	Sink dag combine's post index load / store code that swap base ptr and index ...	Evan Cheng
2010-05-18	Fix PR7162: Use source register classes and sub-indices to determine the corr...	Evan Cheng
2010-05-18	FIX PR7158. SimplifyVBinOp was asserting when it fails to constant fold (op (...	Evan Cheng
2010-05-17	Fix PR7175. Insert copies of a REG_SEQUENCE source if it is used by other REG...	Evan Cheng
2010-05-17	Fix PR7156. If the sources of a REG_SEQUENCE are all IMPLICIT_DEF's. Replace ...	Evan Cheng