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AgeCommit message (Expand)Author
2011-12-07ARM: NEON SHLL instruction immediate operand range checking.Jim Grosbach
2011-12-07Add a few moreLocal/Global R_MIPS_GOT related fixups andBruno Cardoso Lopes
2011-12-07ARM: Parameterize the immediate operand type for NEON VSHLL.Jim Grosbach
2011-12-06Revert r145971: "Use conservative size estimate for tBR_JTr."Jakob Stoklund Olesen
2011-12-06Explicitly check for the different SUB instructions.Bill Wendling
2011-12-06First chunk of MachineInstr bundle support.Evan Cheng
2011-12-06Use conservative size estimate for tBR_JTr.Jakob Stoklund Olesen
2011-12-06Remove alignment from deserted constant islands.Jakob Stoklund Olesen
2011-12-06Encode the total stack if there isn't a frame.Bill Wendling
2011-12-06* Add a macro to remove a magic number.Bill Wendling
2011-12-06add RESTORE_CR and support CR unspillsHal Finkel
2011-12-06remove old FIXMEHal Finkel
2011-12-06Check the correct value for small stack sizes. Also modify some comments.Bill Wendling
2011-12-06For a small sized stack, we encode that value directly with no "stack adjust"...Bill Wendling
2011-12-06PTX: Continue to fix up the register mess.Justin Holewinski
2011-12-06PTX: Encode registers as unsigned values in the MC asm printer instead of usi...Justin Holewinski
2011-12-06Add X86ISD::HADD/HSUB to getTargetNodeNameCraig Topper
2011-12-06Fix a bunch of SSE/AVX patterns to use v2i64/v4i64 loads since all other inte...Craig Topper
2011-12-06Merge floating point and integer UNPCK X86ISD node types.Craig Topper
2011-12-06Clean up some of the shuffle decoding code for UNPCK instructions. Add instru...Craig Topper
2011-12-06ARM mode 'mul' operand ordering tweak.Jim Grosbach
2011-12-06Thumb2: MUL two-operand form encoding operand order fix.Jim Grosbach
2011-12-06Merge isSHUFPMask and isCommutedSHUFPMask into single function that can do bo...Craig Topper
2011-12-06Thumb2 encoding choice correction for PLD.Jim Grosbach
2011-12-06Use branches instead of jumps + variable cleanup. Testcase coming next. Patch...Bruno Cardoso Lopes
2011-12-06Add register HWR29 numbering. Patch by Jack CarterBruno Cardoso Lopes
2011-12-06Add a comment.Bill Wendling
2011-12-06Tidy up value checking.Jim Grosbach
2011-12-06MipsAsmBackend.cpp, PPCAsmBackend.cpp: Fix -Asserts build to appease msvc.NAKAMURA Takumi
2011-12-06[arm-fast-isel] Doublewords only require word-alignment.Chad Rosier
2011-12-06Align ARM constant pool islands via their basic block.Jakob Stoklund Olesen
2011-12-06Use logarithmic units for basic block alignment.Jakob Stoklund Olesen
2011-12-06The compact encoding of the registers are 3-bits each. Make sure we shift theBill Wendling
2011-12-06Fix ARM handling of tBcc branch relaxation.Jim Grosbach
2011-12-06Use an existing function.Jakob Stoklund Olesen
2011-12-06Move target-specific logic out of generic MCAssembler.Jim Grosbach
2011-12-05Simple branch relaxation for Thumb2 Bcc instructions.Jim Grosbach
2011-12-05Tweak ADDrr fix. Bad check for explicit .wJim Grosbach
2011-12-05Thumb2 prefer ADD register encoding T2 to T3 when possible.Jim Grosbach
2011-12-05Add definitions of 64-bit extract and insert instrucions and makeAkira Hatanaka
2011-12-05Split ExtIns into two base classes and have instructions EXT and INS derive fromAkira Hatanaka
2011-12-05Thumb2 prefer encoding T3 to T4 for ADD/SUB immediate instructions.Jim Grosbach
2011-12-05Have LowerJumpTable support Mips64. Modify 2010-07-20-Switch.ll to test N64 andAkira Hatanaka
2011-12-05ARM assembly parsing for the rest of the VMUL data type aliases.Jim Grosbach
2011-12-05Fix previous commit. Oops.Jim Grosbach
2011-12-05Tidy up. No functional change.Jim Grosbach
2011-12-05ARM assmebler parsing for two-operand VMUL instructions.Jim Grosbach
2011-12-05enable PPC register scavenging by default (update tests and remove some FIXMEs)Hal Finkel
2011-12-05don't include CR bit subregs in callee-saved listHal Finkel
2011-12-05add register pressure for CR regsHal Finkel
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