| Age | Commit message (Expand) | Author |
|---|
| 2012-07-18 | More replacing of target-dependent intrinsics with target-indepdent | Joel Jones |
| 2012-07-17 | Clean up Mips16InstrFormats.td and Mips16InstrInfo.td. | Akira Hatanaka |
| 2012-07-17 | Back out r160101 and instead implement a dag combine to recover from instcomb... | Evan Cheng |
| 2012-07-17 | Implement r160312 as target indepedenet dag combine. | Evan Cheng |
| 2012-07-17 | This is another case where instcombine demanded bits optimization created | Evan Cheng |
| 2012-07-16 | For something like | Evan Cheng |
| 2012-07-16 | Revert "AMDGPU: Add core backend files for R600/SI codegen v6" | Tom Stellard |
| 2012-07-16 | Revert "Build script changes for R600/SI Codegen v6" | Tom Stellard |
| 2012-07-16 | Revert "Target/AMDGPU/R600KernelParameters.cpp: Fix two includes, <llvm/IRBui... | Tom Stellard |
| 2012-07-16 | Revert "Target/AMDGPU: [CMake] Fix dependencies. 1) Add intrinsics_gen. Add A... | Tom Stellard |
| 2012-07-16 | Revert "Target/AMDGPU/R600KernelParameters.cpp: Don't use "and", "or" as cond... | Tom Stellard |
| 2012-07-16 | Revert "Target/AMDGPU/AMDILIntrinsicInfo.cpp: Use llvm_unreachable() in nonre... | Tom Stellard |
| 2012-07-16 | Revert "Target/AMDGPU: Fix includes, or msvc build failed." | Tom Stellard |
| 2012-07-16 | With r160248 in place this code is no longer needed. | Chad Rosier |
| 2012-07-16 | Target/AMDGPU: Fix includes, or msvc build failed. | NAKAMURA Takumi |
| 2012-07-16 | Target/AMDGPU/AMDILIntrinsicInfo.cpp: Use llvm_unreachable() in nonreturn fun... | NAKAMURA Takumi |
| 2012-07-16 | Target/AMDGPU/R600KernelParameters.cpp: Don't use "and", "or" as conditional ... | NAKAMURA Takumi |
| 2012-07-16 | Doubleword Shift Left Logical Plus 32 | Jack Carter |
| 2012-07-16 | Target/AMDGPU: [CMake] Fix dependencies. 1) Add intrinsics_gen. Add AMDGPUCom... | NAKAMURA Takumi |
| 2012-07-16 | Target/AMDGPU/R600KernelParameters.cpp: Fix two includes, <llvm/IRBuilder.h> ... | NAKAMURA Takumi |
| 2012-07-16 | Build script changes for R600/SI Codegen v6 | Tom Stellard |
| 2012-07-16 | AMDGPU: Add core backend files for R600/SI codegen v6 | Tom Stellard |
| 2012-07-16 | Fix a bug in the 3-address conversion of LEA when one of the operands is an | Nadav Rotem |
| 2012-07-16 | This CL changes the function prologue and epilogue emitted on X86 when stack ... | Alexey Samsonov |
| 2012-07-15 | Teach getTargetVShiftNode about TargetConstant nodes. | Nadav Rotem |
| 2012-07-15 | Rename VBROADCASTSDrm into VBROADCASTSDYrm to match the naming convention. | Nadav Rotem |
| 2012-07-14 | AVX: Fix a bug in getTargetVShiftNode. The shift amount has to be a 128bit ve... | Nadav Rotem |
| 2012-07-13 | This is one of the first steps at moving to replace target-dependent | Joel Jones |
| 2012-07-13 | Remove variable_ops from call instructions in most targets. | Jakob Stoklund Olesen |
| 2012-07-13 | Remove variable_ops from ARM call instructions. | Jakob Stoklund Olesen |
| 2012-07-13 | The Mips specific relocation R_MIPS_GOT_DISP | Jack Carter |
| 2012-07-13 | Make helper functions static. | Benjamin Kramer |
| 2012-07-13 | Mark VINSERTI128rm as MayLoad=1. Fixes PR13348. | Craig Topper |
| 2012-07-12 | Give the rdrand instructions a SideEffect flag and a chain so MachineCSE and ... | Benjamin Kramer |
| 2012-07-12 | Add intrinsics for Ivy Bridge's rdrand instruction. | Benjamin Kramer |
| 2012-07-12 | Update GATHER instructions to support 2 read-write operands. Patch from mysel... | Craig Topper |
| 2012-07-11 | ARM: fix typo in comments | Manman Ren |
| 2012-07-11 | ARM: Fix optimizeCompare to correctly check safe condition. | Manman Ren |
| 2012-07-11 | Patch for Mips direct object generation. | Jack Carter |
| 2012-07-11 | This change removes an "initialization" warning. | Jack Carter |
| 2012-07-11 | In register classes in MipsRegisterInfo.td, list the registers in ascending | Akira Hatanaka |
| 2012-07-11 | [x86 fast-isel] Per discussion with Eric, add all cases to switch with verbose | Chad Rosier |
| 2012-07-11 | X86: Update to peephole optimization to move Movr0 before (Sub, Cmp) pair. | Manman Ren |
| 2012-07-11 | Implement MipsTargetLowering::LowerSELECT_CC to custom lower SELECT_CC. | Akira Hatanaka |
| 2012-07-11 | [x86 fast-isel] Rather then call llvm_unreachable() have fast-isel fall back | Chad Rosier |
| 2012-07-11 | When ext-loading and trunc-storing vectors to memory, on x86 32bit systems, a... | Nadav Rotem |
| 2012-07-11 | Lower RETURNADDR node in Mips backend. | Akira Hatanaka |
| 2012-07-10 | Mips specific inline asm operand modifier 'L'. | Jack Carter |
| 2012-07-10 | Move [get|set]BasePtrStackAdjustment() from MachineFrameInfo to | Chad Rosier |
| 2012-07-10 | Add support for dynamic stack realignment in the presence of dynamic allocas on | Chad Rosier |
