diff options
author | Chad Rosier <mcrosier@apple.com> | 2012-07-11 19:58:38 +0000 |
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committer | Chad Rosier <mcrosier@apple.com> | 2012-07-11 19:58:38 +0000 |
commit | 36ec0caa0ba0378d0858e7baf5bd49a6161ccedc (patch) | |
tree | 36e95cbe08fba291b22ea3069a1044b481963e1b /lib/Target | |
parent | ce66afb22d8395233bcfd8b5c168079ea6f9a154 (diff) |
[x86 fast-isel] Per discussion with Eric, add all cases to switch with verbose
comments.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@160069 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/Target')
-rw-r--r-- | lib/Target/X86/X86FastISel.cpp | 9 |
1 files changed, 8 insertions, 1 deletions
diff --git a/lib/Target/X86/X86FastISel.cpp b/lib/Target/X86/X86FastISel.cpp index b410a6743d..d82b40d69f 100644 --- a/lib/Target/X86/X86FastISel.cpp +++ b/lib/Target/X86/X86FastISel.cpp @@ -1693,7 +1693,6 @@ bool X86FastISel::DoSelectCall(const Instruction *I, const char *MemIntName) { // Promote the value if needed. switch (VA.getLocInfo()) { - default: return false; case CCValAssign::Full: break; case CCValAssign::SExt: { assert(VA.getLocVT().isInteger() && !VA.getLocVT().isVector() && @@ -1737,6 +1736,14 @@ bool X86FastISel::DoSelectCall(const Instruction *I, const char *MemIntName) { ArgVT = VA.getLocVT(); break; } + case CCValAssign::VExt: + // VExt has not been implemented, so this should be impossible to reach + // for now. However, fallback to Selection DAG isel once implemented. + return false; + case CCValAssign::Indirect: + // FIXME: Indirect doesn't need extending, but fast-isel doesn't fully + // support this. + return false; } if (VA.isRegLoc()) { |