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Age	Commit message (Expand)	Author
2012-12-20	Undefine PPC harder.	Rafael Espindola
2012-12-20	This assert is overly restrictive and does not work for mips16.	Reed Kotler
2012-12-20	Turn on register scavenger for Mips 16	Reed Kotler
2012-12-20	[mips] Refactor SLT (set on less than) instructions. Separate encoding	Akira Hatanaka
2012-12-20	[mips] Refactor unconditional branch instruction. Separate encoding information	Akira Hatanaka
2012-12-20	[mips] Remove asm string parameter from pseudo instructions. Add InstrItinClass	Akira Hatanaka
2012-12-20	[mips] Delete definition of CPRESTORE instruction.	Akira Hatanaka
2012-12-20	[mips] Refactor conditional branch instructions with one register operand.	Akira Hatanaka
2012-12-20	[mips] Refactor conditional branch instructions with two register operands.	Akira Hatanaka
2012-12-20	fix most of remaining issues with large frames.	Reed Kotler
2012-12-20	[mips] Use "or $r0, $r1, $zero" instead of "addu $r0, $zero, $r1" to copy	Akira Hatanaka
2012-12-20	Fix use-before-construction of X86TargetLowering.	Richard Smith
2012-12-20	[mips] Change the order of template parameters. Move the default parameters to	Akira Hatanaka
2012-12-20	[mips] Refactor shift instructions with register operands. Separate encoding	Akira Hatanaka
2012-12-20	[mips] Refactor shift immediate instructions. Separate encoding information	Akira Hatanaka
2012-12-20	[mips] Refactor arithmetic and logic instructions with immediate operands.	Akira Hatanaka
2012-12-20	[mips] Refactor arithmetic and logic instructions. Separate encoding	Akira Hatanaka
2012-12-20	[mips] Delete ArithOverflowR and ArithOverflow and use ArithLogicR and	Akira Hatanaka
2012-12-20	Target/R600: Update MIB according to r170588.	NAKAMURA Takumi
2012-12-19	MC: Add MCInstrDesc::mayAffectControlFlow() method.	Jim Grosbach
2012-12-19	R600: Remove unecessary VREG alignment.	Tom Stellard
2012-12-19	R600: control flow optimization	Tom Stellard
2012-12-19	R600: New control flow for SI v2	Tom Stellard
2012-12-19	Remove the explicit MachineInstrBuilder(MI) constructor.	Jakob Stoklund Olesen
2012-12-19	LLVM sdisel normalize bit extraction of the form:	Evan Cheng
2012-12-19	Remove edis - the enhanced disassembler. Fixes PR14654.	Roman Divacky
2012-12-19	Transform (x&C)>V into (x&C)!=0 where possible	Paul Redmond
2012-12-19	PowerPC: Expand VSELECT nodes.	Benjamin Kramer
2012-12-19	Change TargetLowering::getTypeForExtArgOrReturn to take and return	Patrik Hagglund
2012-12-19	Change TargetLowering::RegisterTypeForVT to contain MVTs, instead of	Patrik Hagglund
2012-12-19	Change TargetLowering::findRepresentativeClass to take an MVT, instead	Patrik Hagglund
2012-12-19	X86ISelLowering.cpp: Fix warnings. [-Wlogical-op-parentheses]	NAKAMURA Takumi
2012-12-19	Optimized load + SIGN_EXTEND patterns in the X86 backend.	Elena Demikhovsky
2012-12-19	Rename the 'Attributes' class to 'Attribute'. It's going to represent a singl...	Bill Wendling
2012-12-19	Add some missing Defs and Uses.	Reed Kotler
2012-12-18	Reverse order of checking SSE level when calculating compare cost, so we check	Jakub Staszak
2012-12-18	Disable ARM partial flag dependency optimization at -Oz	Quentin Colombet
2012-12-18	Get rid of the pesky -Woverloaded-virtual warning. No change in functionality.	Eli Bendersky
2012-12-18	Repair bundles that were broken by removing and reinserting the first	Jakob Stoklund Olesen
2012-12-18	Extract a method, no functional change intended.	Jakob Stoklund Olesen
2012-12-17	[arm fast-isel] Minor cleanup. No functional change intended.	Chad Rosier
2012-12-17	[arm fast-isel] Fast-isel only handles simple VTs, so make sure the necessary	Chad Rosier
2012-12-17	Add instruction encodings / disassembly support for l2r instructions.	Richard Osborne
2012-12-17	R600: enable S_N2_ instructions	Tom Stellard
2012-12-17	R600: BB operand support for SI	Tom Stellard
2012-12-17	R600: remove nonsense setPrefLoopAlignment	Tom Stellard
2012-12-17	Revert/correct some FastISel changes in r170104 (EVT->MVT for	Patrik Hagglund
2012-12-17	Add instruction encodings for PEEK and ENDIN.	Richard Osborne
2012-12-17	Fix parameter name in prototypes in XCoreDisassembler.	Richard Osborne
2012-12-17	Add instruction encodings / disassembly support for rus instructions.	Richard Osborne