llvm - http://llvm.org

Age	Commit message (Expand)	Author
2012-12-30	Use the predicate methods off of AttributeSet instead of Attribute.	Bill Wendling
2012-12-30	Remove the Function::getRetAttributes method in favor of using the AttributeS...	Bill Wendling
2012-12-30	Remove Function::getParamAttributes and use the AttributeSet accessor methods...	Bill Wendling
2012-12-30	Remove the Function::getFnAttributes method in favor of using the AttributeSet	Bill Wendling
2012-12-30	s/hasAttribute/contains/g to be more consistent with other method names.	Bill Wendling
2012-12-29	Remove intrinsic specific instructions for (V)SQRTPS/PD. Instead lower to tar...	Craig Topper
2012-12-29	Merge similar functionality using a nested switch.	Craig Topper
2012-12-29	Remove intrinsic specific instructions for SSE/SSE2/AVX floating point max/mi...	Craig Topper
2012-12-29	Simplify code, no functionality change.	Jakub Staszak
2012-12-29	Delete executive bit on ./lib/Target/Hexagon/HexagonAsmPrinter.h.	Jakub Staszak
2012-12-28	CostModel: initial checkin for code that estimates the cost of special shuffles.	Nadav Rotem
2012-12-28	wrap 80-col lines.	Nadav Rotem
2012-12-28	AVX: Move the ZEXT/ANYEXT DAGCo optimizations to the lowering of these optimi...	Nadav Rotem
2012-12-27	Reverse the 'if' condition and reduce the indentation.	Nadav Rotem
2012-12-27	Merge basic_sse12_fp_binop_p_int and basic_sse12_fp_binop_p_y_int multiclasses.	Craig Topper
2012-12-27	AVX/AVX2: Move the SEXT lowering code from a target specific DAGco to a lower...	Nadav Rotem
2012-12-27	Merge basic_sse12_fp_binop_p and basic_sse12_fp_binop_p_y multiclasses.	Craig Topper
2012-12-27	On AVX/AVX2 the type v8i1 is legalized to v8i16, which is an XMM sized	Nadav Rotem
2012-12-27	AVX/AVX2: Move the code that lowers vector-trunc from a DAGCo-hook to custom ...	Nadav Rotem
2012-12-27	Add hasSideEffects=0 to some forms of ROUND, RCP, and RSQRT.	Craig Topper
2012-12-27	Move single letter 'P' prefix out of multiclass now that tablegen allows defm...	Craig Topper
2012-12-27	Add hasSideEffects=0 to some shift and rotate instructions. None of which are...	Craig Topper
2012-12-27	Mark the divide instructions as hasSideEffects=0.	Craig Topper
2012-12-27	Add hasSideEffects=0 to CMP*rr_REV.	Craig Topper
2012-12-27	Add mayLoad, mayStore, and hasSideEffects tags to BT/BTS/BTR/BTC instructions...	Craig Topper
2012-12-26	Fix operands and encoding form for ARPL instruction. Register form had and ...	Craig Topper
2012-12-26	Add hasSideEffects=0 to some atomic instructions.	Craig Topper
2012-12-26	Mark the AL/AX/EAX forms of the basic arithmetic operations has never having ...	Craig Topper
2012-12-26	Mark all the _REV instructions as not having side effects. They aren't really...	Craig Topper
2012-12-26	Remove a special conditional setting of neverHasSideEffects if the instructio...	Craig Topper
2012-12-26	Merge still more SSE/AVX instruction definitions.	Craig Topper
2012-12-26	Merge more SSE/AVX instruction definitions.	Craig Topper
2012-12-26	Fix 80 column violation.	Craig Topper
2012-12-26	Fix class name in comment.	Craig Topper
2012-12-26	Merge SSE/AVX PCMPEQ/PCMPGT instruction definitions.	Craig Topper
2012-12-26	Remove 'v' from mnemonic to fix asm matching failures.	Craig Topper
2012-12-26	Use an additional multiclass to merge the 128/256-bit SSE/AVX instruction def...	Craig Topper
2012-12-26	Reformat the docs.	Nadav Rotem
2012-12-26	Use an additional multiclass to merge the 128/256-bit SSE/AVX instruction def...	Craig Topper
2012-12-26	Merge an AVX/SSE 256-bit and 128-bit multiclass.	Craig Topper
2012-12-26	Mark VANDNPD/VANDNPDS as not commutable.	Craig Topper
2012-12-26	Remove alignment from a bunch more VEX encoded operations in the folding tables.	Craig Topper
2012-12-26	Remove alignment from folding table for VMOVUPD as an unaligned instruction i...	Craig Topper
2012-12-26	Remove alignment requirements from (V)EXTRACTPS. This instruction does 32-bit...	Craig Topper
2012-12-26	Remove alignment requirement from VCVTSS2SD in folding tables. Reverting r171...	Craig Topper
2012-12-25	Expand PPC64 atomic load and store	Hal Finkel
2012-12-25	X86: Shave off one shuffle from the pcmpeqq sequence for SSE2 by making use o...	Benjamin Kramer
2012-12-25	X86: Custom lower <2 x i64> eq and ne when SSE41 is not available.	Benjamin Kramer
2012-12-25	VCVTSS2SD requires a strict alignment. Thanks Elena.	Nadav Rotem
2012-12-24	Quiet gcc's -Wparenthesis warning. No functionality change.	Nick Lewycky