aboutsummaryrefslogtreecommitdiff
path: root/lib/Target/X86
AgeCommit message (Expand)Author
2011-10-24Merging r142841:Bill Wendling
2011-10-20Merging r142350:Bill Wendling
2011-10-19Merging r142550:Bill Wendling
2011-10-14A few 80-col violations.Evan Cheng
2011-10-14Add X86 ANDN instruction. Including instruction selection.Craig Topper
2011-10-14Add X86 TZCNT instruction and patterns to select it. Also added core-avx2 pro...Craig Topper
2011-10-14Ban rematerializable instructions with side effects.Jakob Stoklund Olesen
2011-10-14V_SET0 has no side effects.Jakob Stoklund Olesen
2011-10-13Simplify assertion, and avoid undefined shift. Based on patch by Ahmed Charles.Eli Friedman
2011-10-13More closely follow libgcc, which has code after the `ret' instruction toBill Wendling
2011-10-13Revert r141854 because it was causing failures:Bill Wendling
2011-10-13Should not add instructions to a BB after a return instruction. The machine i...Bill Wendling
2011-10-13Add X86 TZCNT instruction and patterns to select it. Also added core-avx2 pro...Craig Topper
2011-10-13Add 'implicit EFLAGS' to patterns for popcnt and lzcntCraig Topper
2011-10-12Fix indent in comment.Nick Lewycky
2011-10-11Add HasPOPCNT predicate to the POPCNT instructions. Also mark POPCNT as modif...Craig Topper
2011-10-11Make Ivy Bridge 16-bit floating point conversion instructions require AVX.Craig Topper
2011-10-11Add X86 LZCNT instruction. Including instruction selection support.Craig Topper
2011-10-11Fix disassembling of popcntw. Also remove some code that says it accounts for...Craig Topper
2011-10-11Fixed natural stack alignment for Linux x86-32. Thanks Eli.Lang Hames
2011-10-10Add a natural stack alignment field to TargetData, and prevent InstCombine fromLang Hames
2011-10-10Make sure the X86 backend doesn't explode on 128-bit shuffles in AVX mode. F...Eli Friedman
2011-10-10X86: Add a subtarget definition for core-avx-i, which is GCC's name for ivy b...Benjamin Kramer
2011-10-10Fix 10892 - When lowering SIGN_EXTEND_INREG do not lower v2i64 because theNadav Rotem
2011-10-10X86: Add patterns for the movbe instruction (mov + bswap, only available on a...Benjamin Kramer
2011-10-10Put a bunch of calls to ToggleFeature behind proper if statements.Craig Topper
2011-10-09Add Ivy Bridge 16-bit floating point conversion instructions for the X86 disa...Craig Topper
2011-10-08Prevent potential NOREX bug.Jakob Stoklund Olesen
2011-10-08Add TEST8ri_NOREX pseudo to constrain sub_8bit_hi copies.Jakob Stoklund Olesen
2011-10-07Constrain both operands on MOVZX32_NOREXrr8.Jakob Stoklund Olesen
2011-10-07High bits of movmskp{s|d} and pmovmskb are known zero. rdar://10247336Evan Cheng
2011-10-07Add X86 disassembler support for RDFSBASE, RDGSBASE, WRFSBASE, and WRGSBASE.Craig Topper
2011-10-07Add X86 disassembler support for XSAVE, XRSTOR, and XSAVEOPT.Craig Topper
2011-10-07Revert part of r141274. Only need to change encoding for xchg %eax, %eax in 6...Craig Topper
2011-10-06Fix assembling of xchg %eax, %eax to not use the NOP encoding of 0x90. This w...Craig Topper
2011-10-06Build system infrastructure for multiple tblgens.Peter Collingbourne
2011-10-05Override TRI::getSubClassWithSubReg for X86.Jakob Stoklund Olesen
2011-10-05Change C++ style comments to C style comments in X86 disassembler. Patch from...Craig Topper
2011-10-04Teach the MC to output code/data region marker labels in MachO and ELF modes....Owen Anderson
2011-10-04Add support in the disassembler for ignoring the L-bit on certain VEX instruc...Craig Topper
2011-10-03Add support for MOVBE and RDRAND instructions for the assembler and disassemb...Craig Topper
2011-10-03Treat VEX.vvvv as a 3-bit field outside of 64-bit mode. Prevents access to re...Craig Topper
2011-10-03Fix VEX disassembling to ignore REX.RXBW bits in 32-bit mode.Craig Topper
2011-10-02Fix some Intel syntax disassembly issues with instructions that implicitly us...Craig Topper
2011-10-02Special case disassembler handling of REX.B prefix on NOP instruction to deco...Craig Topper
2011-10-01Fix disassembling of INVEPT and INVVPID to take operandsCraig Topper
2011-10-01Fix disassembler handling of CRC32 which is an odd instruction that uses 0xf2...Craig Topper
2011-09-30Store sub-class lists as a bit vector.Jakob Stoklund Olesen
2011-09-29Expand the x86 V_SET0* pseudos right after register allocation.Jakob Stoklund Olesen
2011-09-28PR11033: Make sure we don't generate PCMPGTQ and PCMPEQQ if the target CPU do...Eli Friedman