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Author
2011-11-07
Merging r143712:
Bill Wendling
2011-11-07
Merging r143406:
Bill Wendling
2011-11-01
Merging r143290:
Bill Wendling
2011-10-26
Complete the missing parts of MIPS-JIT functionality. Patch by Petar Jovanovic.
Bill Wendling
2011-10-24
Merging r142841:
Bill Wendling
2011-10-24
In LLVM 2.9, the GHC calling convention is only supported on x86-32,
Bill Wendling
2011-10-24
Merging r142801:
Bill Wendling
2011-10-20
Merging r142350:
Bill Wendling
2011-10-19
Merging r142550:
Bill Wendling
2011-10-15
Mark tADDrSPi as having side effects again.
Jakob Stoklund Olesen
2011-10-15
Thumb1 does not support dynamic stack realignment.
Chad Rosier
2011-10-15
Mark registers as DEAD because they're really just clobbers.
Bill Wendling
2011-10-14
Add missing correctness check to ARMTargetLowering::ReconstructShuffle. Fixe...
Eli Friedman
2011-10-14
Make sure that the register is in the register class before adding it as a ma...
Bill Wendling
2011-10-14
Mark the invoke call instruction as implicitly defining the callee-saved regi...
Bill Wendling
2011-10-14
Fix a non-firing assert. Change:
Richard Trieu
2011-10-14
A few 80-col violations.
Evan Cheng
2011-10-14
Add an implementation of the CanLowerReturn function to the PPC backend
Hal Finkel
2011-10-14
Add f128 to datalayout string.
Akira Hatanaka
2011-10-14
initial test commit (remove whitespace)
Hal Finkel
2011-10-14
Revert r141932, r141936 and r141937.
Akira Hatanaka
2011-10-14
Add X86 ANDN instruction. Including instruction selection.
Craig Topper
2011-10-14
Add X86 TZCNT instruction and patterns to select it. Also added core-avx2 pro...
Craig Topper
2011-10-14
Definition of function getMipsRegisterNumbering.
Akira Hatanaka
2011-10-14
Add definition of class MipsELFWriterInfo.
Akira Hatanaka
2011-10-14
Add missing relocation types.
Akira Hatanaka
2011-10-14
Fixup enumerations.
Akira Hatanaka
2011-10-14
Add more Mips relocation types.
Akira Hatanaka
2011-10-14
Ban rematerializable instructions with side effects.
Jakob Stoklund Olesen
2011-10-14
V_SET0 has no side effects.
Jakob Stoklund Olesen
2011-10-13
Fix undefined shift. Patch by Ahmed Charles.
Eli Friedman
2011-10-13
Simplify assertion, and avoid undefined shift. Based on patch by Ahmed Charles.
Eli Friedman
2011-10-13
Fix undefined shifts and abs in Alpha backend. Based on patch by Ahmed Charles.
Eli Friedman
2011-10-13
Simplify and avoid undefined shift. Based on patch by Ahmed Charles.
Eli Friedman
2011-10-13
SETEND is not allowed in an IT block.
Owen Anderson
2011-10-13
Mark 'branch indirect' instruction as an indirect branch.
Kalle Raiskila
2011-10-13
More closely follow libgcc, which has code after the `ret' instruction to
Bill Wendling
2011-10-13
Revert r141854 because it was causing failures:
Bill Wendling
2011-10-13
Should not add instructions to a BB after a return instruction. The machine i...
Bill Wendling
2011-10-13
Add X86 TZCNT instruction and patterns to select it. Also added core-avx2 pro...
Craig Topper
2011-10-13
Add 'implicit EFLAGS' to patterns for popcnt and lzcnt
Craig Topper
2011-10-12
ARM addrmode5 represents the 'U' bit of the encoding backwards.
Jim Grosbach
2011-10-12
Thumb2 assembly parsing and encoding for LDC/STC.
Jim Grosbach
2011-10-12
addrmode2 is gone from these, so no need for the reg0 operand.
Jim Grosbach
2011-10-12
ARM parsing and encoding for the <option> form of LDC/STC instructions.
Jim Grosbach
2011-10-12
80 columns.
Jim Grosbach
2011-10-12
Tidy up. Formatting.
Jim Grosbach
2011-10-12
Define base class LogicNOR and make 32-bit and 64-bit NOR derive from it.
Akira Hatanaka
2011-10-12
Fix encoding of 32-bit integer instructions. Change names of operands and nodes.
Akira Hatanaka
2011-10-12
Fix indent in comment.
Nick Lewycky
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