llvm - http://llvm.org

Age	Commit message (Collapse)	Author
2004-08-17	PowerPCInstrInfo and PowerPCRegisterInfo have gone away; they are replaced	Misha Brukman
	by 32- and 64-bit customized files, named appropriately. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@15856 91177308-0d34-0410-b5e6-96231b3b80d8
2004-08-11	Set the is64bit flag and propagate it to PowerPCRegisterInfo	Misha Brukman
	git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@15671 91177308-0d34-0410-b5e6-96231b3b80d8
2004-08-10	Renamed PPC32 (namespace for regs, opcodes) to PPC to include 64-bit targets	Misha Brukman
	git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@15631 91177308-0d34-0410-b5e6-96231b3b80d8
2004-07-26	ADDI can take several forms, including:	Misha Brukman
	addi r1, r2, 0 addi r1, <frame index #n>, 0 so we must check for the second parameter being a register for this instruction to be considered a reg-to-reg copy. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@15244 91177308-0d34-0410-b5e6-96231b3b80d8
2004-07-26	assert() on MachineInstr properties instead of checking them dynamically	Misha Brukman
	git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@15243 91177308-0d34-0410-b5e6-96231b3b80d8
2004-07-26	* Recognize `addi r1, r2, 0' a move instruction	Misha Brukman
	* List formats of instructions currently recognized as moves git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@15242 91177308-0d34-0410-b5e6-96231b3b80d8
2004-07-16	Fix code formatting	Misha Brukman
	git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@14899 91177308-0d34-0410-b5e6-96231b3b80d8
2004-07-16	Implement PowerPCInstrInfo::isMoveInstr(), patch by Nate Begeman	Misha Brukman
	git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@14898 91177308-0d34-0410-b5e6-96231b3b80d8
2004-06-21	Initial revision	Misha Brukman
	git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@14283 91177308-0d34-0410-b5e6-96231b3b80d8