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path: root/lib/Target/PowerPC/PPCISelPattern.cpp
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2005-04-10Fix another fixme: factor out the constant fp generation code.Nate Begeman
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21207 91177308-0d34-0410-b5e6-96231b3b80d8
2005-04-10Fix 64 bit argument loading that straddles the args in regs / args on stackNate Begeman
boundary. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21206 91177308-0d34-0410-b5e6-96231b3b80d8
2005-04-10Make sure that BRCOND branches can be converted into long branches too.Nate Begeman
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21198 91177308-0d34-0410-b5e6-96231b3b80d8
2005-04-10Don't hand ISD::CALL nodes off to SelectExprFP. This fixes siod.Nate Begeman
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21197 91177308-0d34-0410-b5e6-96231b3b80d8
2005-04-09fix ISD::BRCONDTWOWAY codegen to not deference the end() iteratorNate Begeman
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21193 91177308-0d34-0410-b5e6-96231b3b80d8
2005-04-09do not set the root to null if an argument is deadChris Lattner
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21188 91177308-0d34-0410-b5e6-96231b3b80d8
2005-04-09Add rlwnm instruction for variable rotateNate Begeman
Generate rotate left/right immediate Generate code for brcondtwoway Use new livein/liveout functionality git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21187 91177308-0d34-0410-b5e6-96231b3b80d8
2005-04-09Optimize FSEL a bit for fneg arguments. This fixes the recently added testNate Begeman
case so that we emit _test_fneg_sel: .LBB_test_fneg_sel_0: ; fsel f1, f1, f3, f2 blr instead of: _test_fneg_sel: .LBB_test_fneg_sel_0: ; fneg f0, f1 fneg f0, f0 fsel f1, f0, f3, f2 blr git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21177 91177308-0d34-0410-b5e6-96231b3b80d8
2005-04-09This target does not yet support ISD::BRCONDTWOWAYChris Lattner
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21163 91177308-0d34-0410-b5e6-96231b3b80d8
2005-04-0964b: Expand S/UREMNate Begeman
32b: No longer pattern match fneg(fsub(fmul)) as fnmsub Pattern match fsub a, mul(b, c) as fnmsub Pattern match fadd a, mul(b, c) as fmadd Those changes speed up hydro2d by 2.5%, distray by 6%, and scimark by 8% git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21161 91177308-0d34-0410-b5e6-96231b3b80d8
2005-04-07Optimized code sequences for setcc reg, 0Nate Begeman
Optimized code sequence for (a < 0) ? b : 0 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21150 91177308-0d34-0410-b5e6-96231b3b80d8
2005-04-07PowerPC zero extends setcc resultsChris Lattner
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21147 91177308-0d34-0410-b5e6-96231b3b80d8
2005-04-06Pattern match bitfield insert, which helps shift long by immediate, amongNate Begeman
other things. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21127 91177308-0d34-0410-b5e6-96231b3b80d8
2005-04-06Fixed version of optimized integer divide is now fixed. Calculate theNate Begeman
quotient, not the remainder. Also, make sure to remove the old div operand from the ExprMap and let SelectExpr insert the new one. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21111 91177308-0d34-0410-b5e6-96231b3b80d8
2005-04-06Turn off the div -> mul optimization until it works correctly 100% of theNate Begeman
time. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21105 91177308-0d34-0410-b5e6-96231b3b80d8
2005-04-06Add support for MULHS and MULHU nodesNate Begeman
Have LegalizeDAG handle SREM and UREM for us Codegen SDIV and UDIV by constant as a multiply by magic constant instead of integer divide, which is very slow. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21104 91177308-0d34-0410-b5e6-96231b3b80d8
2005-04-05Back out the previous change to SelectBranchCC, since there are cases itNate Begeman
could miscompile. A correct solution will be found in the near future. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21095 91177308-0d34-0410-b5e6-96231b3b80d8
2005-04-05Rename canUseAsImmediateForOpcode to getImmediateForOpcode to betterNate Begeman
indicate that it is not a boolean function. Properly emit the pseudo instruction for conditional branch, so that we can fix up conditional branches whose displacements are too large. Reserve the right amount of opcode space for said pseudo instructions. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21094 91177308-0d34-0410-b5e6-96231b3b80d8
2005-04-05Implement SDIV by power of 2 as srawi/addze rather than load imm, divwNate Begeman
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21091 91177308-0d34-0410-b5e6-96231b3b80d8
2005-04-04Pattern match fp mul-add, mul-sub, neg-mul-add, and neg-mul-subNate Begeman
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21090 91177308-0d34-0410-b5e6-96231b3b80d8
2005-04-04Make sure that arg regs used by the call instruction are marked as such, soNate Begeman
that regalloc doesn't cleverly reuse early arg regs loading later arg regs. This fixes almost all outstanding failures in the pattern isel. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21086 91177308-0d34-0410-b5e6-96231b3b80d8
2005-04-04i1 loads should also be from the low byte of the argument word.Nate Begeman
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21077 91177308-0d34-0410-b5e6-96231b3b80d8
2005-04-04Fix i64 return, fix CopyFromRegNate Begeman
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21076 91177308-0d34-0410-b5e6-96231b3b80d8
2005-04-03Full varargs support. All of UnitTests now passesNate Begeman
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21070 91177308-0d34-0410-b5e6-96231b3b80d8
2005-04-03Pass the correct value for the chain to the storeNate Begeman
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21066 91177308-0d34-0410-b5e6-96231b3b80d8
2005-04-03Fix SHL_PARTSNate Begeman
Start implementation of integer varargs git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21065 91177308-0d34-0410-b5e6-96231b3b80d8
2005-04-03Keeping up with the Joneses.Nate Begeman
Implement not, nor, nand, and eqv git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21060 91177308-0d34-0410-b5e6-96231b3b80d8
2005-04-02Set shift amount to ExtendNate Begeman
Implement ISD::FABS and ISD::FNEG nodes Implement SHL_PARTS, SRL_PARTS, and SRA_PARTS Generate PowerPC 'fneg', 'fabs', and 'fnabs' instructions git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21018 91177308-0d34-0410-b5e6-96231b3b80d8
2005-04-02This target doesn't support fabs/fneg yet.Chris Lattner
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21010 91177308-0d34-0410-b5e6-96231b3b80d8
2005-04-02Fix i64 returnsNate Begeman
Generate PowerPC 'subfic' instruction when appropriate git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@20995 91177308-0d34-0410-b5e6-96231b3b80d8
2005-04-01Add ISD::UNDEF nodeNate Begeman
Teach the SelectionDAG code how to expand and promote it Have PPC32 LowerCallTo generate ISD::UNDEF for int arg regs used up by fp arguments, but not shadowing their value. This allows us to do the right thing with both fixed and vararg floating point arguments. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@20988 91177308-0d34-0410-b5e6-96231b3b80d8
2005-04-01Fix Olden/bh, CR0 was being set in the wrong orderNate Begeman
LowerCallTo and ISD::CALL are going to need to be modified, regs are being set in the wrong order. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@20981 91177308-0d34-0410-b5e6-96231b3b80d8
2005-04-01Also apply Chris's fix to FP select and SETCCNate Begeman
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@20979 91177308-0d34-0410-b5e6-96231b3b80d8
2005-04-01Move the selection of the arms of the select operation up to the conditionalChris Lattner
part to make sure we get the side effects and to avoid confusing the CFG. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@20977 91177308-0d34-0410-b5e6-96231b3b80d8
2005-04-01Fix stores to global addressesNate Begeman
Fix calls with no arguments git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@20975 91177308-0d34-0410-b5e6-96231b3b80d8
2005-04-01Support indexed loads and stores. This drops Shootout/matrix time fromNate Begeman
18.8 to 14.8 seconds. The Pattern ISel is now often faster than the Simple ISel, esp. on memory intensive code. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@20973 91177308-0d34-0410-b5e6-96231b3b80d8
2005-04-01Implement FP_TO_SINT and FP_TO_UINTNate Begeman
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@20972 91177308-0d34-0410-b5e6-96231b3b80d8
2005-04-01Add support for adding 0.0 and -0.0 to the constant pool, since we lie andNate Begeman
say that we support them, for the purposes of generating fsel instructions. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@20970 91177308-0d34-0410-b5e6-96231b3b80d8
2005-04-01Factor out common code, support FP comparison in folded SetCCNate Begeman
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@20969 91177308-0d34-0410-b5e6-96231b3b80d8
2005-03-31fsel generation for f32 and f64 selectNate Begeman
generate compare immediate for integer compare with constant fold setcc into branch fold setcc into select Code generation quality for Shootout is now on par with the Simple ISel git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@20968 91177308-0d34-0410-b5e6-96231b3b80d8
2005-03-31Pass the correct values to the chain argument for node construction duringNate Begeman
LowerCallTo. Handle ISD::ADD in SelectAddr, allowing us to have nonzero immediates for loads and stores, amazing! git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@20946 91177308-0d34-0410-b5e6-96231b3b80d8
2005-03-31Rewrite LowerCallTo and Select(ISD::CALL) to properly handle float varargsNate Begeman
Tell the SelectionDAG ISel to expand SEXTLOAD of i1 and i8, rather than complicate the code in ISD::SEXTLOAD to do it by hand Combine the FP and Int ISD::LOAD codegen Generate better code for constant pool loads As a result, all of Shootout, and likely many other programs are now working. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@20945 91177308-0d34-0410-b5e6-96231b3b80d8
2005-03-30Fix calls whose arguments fit entirely in registers to not break the Chain.Nate Begeman
Implement SINT_TO_FP and UINT_TO_FP Remove some dead code from the simple ISel git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@20944 91177308-0d34-0410-b5e6-96231b3b80d8
2005-03-30Fix frame index code to generate legal PowerPC instructions. About half ofNate Begeman
Shootout now works. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@20940 91177308-0d34-0410-b5e6-96231b3b80d8
2005-03-30Fix external symbol printing in the AsmPrinter. Tell the ISel that weNate Begeman
don't support things like memcpy directly. This allows a handful of the Shootout programs to work, yay! git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@20939 91177308-0d34-0410-b5e6-96231b3b80d8
2005-03-29Fix BranchCC (it's still dumb), and implement FP select (also dumb)Nate Begeman
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@20935 91177308-0d34-0410-b5e6-96231b3b80d8
2005-03-29Implement integer select and i1 sign extendNate Begeman
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@20934 91177308-0d34-0410-b5e6-96231b3b80d8
2005-03-29Implement SetCC, fix ZERO_EXTEND_INREGNate Begeman
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@20933 91177308-0d34-0410-b5e6-96231b3b80d8
2005-03-29fix a warning in the optimized buildChris Lattner
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@20920 91177308-0d34-0410-b5e6-96231b3b80d8
2005-03-29Implement div, rem, and frameindexNate Begeman
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@20907 91177308-0d34-0410-b5e6-96231b3b80d8
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