diff options
author | Nate Begeman <natebegeman@mac.com> | 2005-04-09 03:05:51 +0000 |
---|---|---|
committer | Nate Begeman <natebegeman@mac.com> | 2005-04-09 03:05:51 +0000 |
commit | e88aa5b4d16b05d530cd4ff2b79c05c4b519ef59 (patch) | |
tree | e433f1c8973067245599430cb42d5cf989976bef /lib/Target/PowerPC/PPCISelPattern.cpp | |
parent | 485df9b84b5753154d3762b2a176b8b6684f716f (diff) |
64b: Expand S/UREM
32b: No longer pattern match fneg(fsub(fmul)) as fnmsub
Pattern match fsub a, mul(b, c) as fnmsub
Pattern match fadd a, mul(b, c) as fmadd
Those changes speed up hydro2d by 2.5%, distray by 6%, and scimark by 8%
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21161 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/Target/PowerPC/PPCISelPattern.cpp')
-rw-r--r-- | lib/Target/PowerPC/PPCISelPattern.cpp | 34 |
1 files changed, 27 insertions, 7 deletions
diff --git a/lib/Target/PowerPC/PPCISelPattern.cpp b/lib/Target/PowerPC/PPCISelPattern.cpp index 046045ad4f..aea11e4b12 100644 --- a/lib/Target/PowerPC/PPCISelPattern.cpp +++ b/lib/Target/PowerPC/PPCISelPattern.cpp @@ -1117,15 +1117,15 @@ unsigned ISel::SelectExprFP(SDOperand N, unsigned Result) Opc = DestType == MVT::f64 ? PPC::FNMADD : PPC::FNMADDS; BuildMI(BB, Opc, 3, Result).addReg(Tmp1).addReg(Tmp2).addReg(Tmp3); } else if (!NoExcessFPPrecision && - ISD::SUB == N.getOperand(0).getOpcode() && + ISD::ADD == N.getOperand(0).getOpcode() && N.getOperand(0).Val->hasOneUse() && - ISD::MUL == N.getOperand(0).getOperand(0).getOpcode() && - N.getOperand(0).getOperand(0).Val->hasOneUse()) { + ISD::MUL == N.getOperand(0).getOperand(1).getOpcode() && + N.getOperand(0).getOperand(1).Val->hasOneUse()) { ++FusedFP; // Statistic - Tmp1 = SelectExpr(N.getOperand(0).getOperand(0).getOperand(0)); - Tmp2 = SelectExpr(N.getOperand(0).getOperand(0).getOperand(1)); - Tmp3 = SelectExpr(N.getOperand(0).getOperand(1)); - Opc = DestType == MVT::f64 ? PPC::FNMSUB : PPC::FNMSUBS; + Tmp1 = SelectExpr(N.getOperand(0).getOperand(1).getOperand(0)); + Tmp2 = SelectExpr(N.getOperand(0).getOperand(1).getOperand(1)); + Tmp3 = SelectExpr(N.getOperand(0).getOperand(0)); + Opc = DestType == MVT::f64 ? PPC::FNMADD : PPC::FNMADDS; BuildMI(BB, Opc, 3, Result).addReg(Tmp1).addReg(Tmp2).addReg(Tmp3); } else if (ISD::FABS == N.getOperand(0).getOpcode()) { Tmp1 = SelectExpr(N.getOperand(0).getOperand(0)); @@ -1181,6 +1181,16 @@ unsigned ISel::SelectExprFP(SDOperand N, unsigned Result) BuildMI(BB, Opc, 3, Result).addReg(Tmp1).addReg(Tmp2).addReg(Tmp3); return Result; } + if (!NoExcessFPPrecision && N.getOperand(1).getOpcode() == ISD::MUL && + N.getOperand(1).Val->hasOneUse()) { + ++FusedFP; // Statistic + Tmp1 = SelectExpr(N.getOperand(1).getOperand(0)); + Tmp2 = SelectExpr(N.getOperand(1).getOperand(1)); + Tmp3 = SelectExpr(N.getOperand(0)); + Opc = DestType == MVT::f64 ? PPC::FMADD : PPC::FMADDS; + BuildMI(BB, Opc, 3, Result).addReg(Tmp1).addReg(Tmp2).addReg(Tmp3); + return Result; + } Opc = DestType == MVT::f64 ? PPC::FADD : PPC::FADDS; Tmp1 = SelectExpr(N.getOperand(0)); Tmp2 = SelectExpr(N.getOperand(1)); @@ -1198,6 +1208,16 @@ unsigned ISel::SelectExprFP(SDOperand N, unsigned Result) BuildMI(BB, Opc, 3, Result).addReg(Tmp1).addReg(Tmp2).addReg(Tmp3); return Result; } + if (!NoExcessFPPrecision && N.getOperand(1).getOpcode() == ISD::MUL && + N.getOperand(1).Val->hasOneUse()) { + ++FusedFP; // Statistic + Tmp1 = SelectExpr(N.getOperand(1).getOperand(0)); + Tmp2 = SelectExpr(N.getOperand(1).getOperand(1)); + Tmp3 = SelectExpr(N.getOperand(0)); + Opc = DestType == MVT::f64 ? PPC::FNMSUB : PPC::FNMSUBS; + BuildMI(BB, Opc, 3, Result).addReg(Tmp1).addReg(Tmp2).addReg(Tmp3); + return Result; + } Opc = DestType == MVT::f64 ? PPC::FSUB : PPC::FSUBS; Tmp1 = SelectExpr(N.getOperand(0)); Tmp2 = SelectExpr(N.getOperand(1)); |