| Age | Commit message (Expand) | Author |
|---|
| 2013-03-28 | Hexagon: Use multiclass for gp-relative instructions. | Jyotsna Verma |
| 2013-03-27 | Switch to LLVM support function abs64 to keep VS2008 happy. | Tim Northover |
| 2013-03-27 | Hexagon: Disable optimizations at O0. | Jyotsna Verma |
| 2013-03-26 | Hexagon: Use multiclass for aslh, asrh, sxtb, sxth, zxtb and zxth. | Jyotsna Verma |
| 2013-03-26 | Hexagon: Remove HexagonMCInst.h file. It has been replaced with MCTargetDesc/... | Jyotsna Verma |
| 2013-03-22 | Hexagon: Add and enable memops setbit, clrbit, &,|,+,- for byte, short, and w... | Jyotsna Verma |
| 2013-03-14 | Hexagon: Removed asserts regarding alignment and offset. | Jyotsna Verma |
| 2013-03-10 | Cleanup #includes. | Jakub Staszak |
| 2013-03-08 | DAGCombiner: Use correct value type for checking legality of BR_CC v3 | Tom Stellard |
| 2013-03-08 | Hexagon: Add patterns for zero extended loads from i1->i64. | Jyotsna Verma |
| 2013-03-07 | Hexagon: Handle i8, i16 and i1 Var Args. | Jyotsna Verma |
| 2013-03-07 | Hexagon: Add support to lower block address. | Jyotsna Verma |
| 2013-03-05 | reverting patch 176508. | Jyotsna Verma |
| 2013-03-05 | Hexagon: Add support for lowering block address. | Jyotsna Verma |
| 2013-03-05 | Hexagon: Expand addc, adde, subc and sube. | Jyotsna Verma |
| 2013-03-05 | Hexagon: Use MO operand flags to mark constant extended instructions. | Jyotsna Verma |
| 2013-03-05 | Hexagon: Add encoding bits to the TFR64 instructions. | Jyotsna Verma |
| 2013-03-02 | Added FIXME for future Hexagon cleanup. | Andrew Trick |
| 2013-03-01 | Hexagon: Add constant extender support framework. | Jyotsna Verma |
| 2013-02-22 | Remove code copied from GenRegisterInfo.inc. | Andrew Trick |
| 2013-02-21 | Move the eliminateCallFramePseudoInstr method from TargetRegisterInfo | Eli Bendersky |
| 2013-02-21 | Hexagon: Expand cttz, ctlz, and ctpop for now. | Anshuman Dasgupta |
| 2013-02-20 | Update TargetLowering ivars for name policy. | Jim Grosbach |
| 2013-02-20 | Hexagon: Move HexagonMCInst.h to MCTargetDesc/HexagonMCInst.h. | Jyotsna Verma |
| 2013-02-19 | Hexagon: Sync TSFlags in MCTargetDesc/HexagonBaseInfo.h with | Jyotsna Verma |
| 2013-02-15 | Hexagon: Set appropriate TSFlags to the loads/stores with global address to | Jyotsna Verma |
| 2013-02-14 | Hexagon: Change insn class to support instruction encoding. | Jyotsna Verma |
| 2013-02-14 | Hexagon: Use multiclass for absolute addressing mode loads. | Jyotsna Verma |
| 2013-02-13 | Hexagon: add support for predicate-GPR copies. | Anshuman Dasgupta |
| 2013-02-13 | Hexagon: Use absolute addressing mode loads/stores for global+offset | Jyotsna Verma |
| 2013-02-13 | MIsched: HazardRecognizers are created for each DAG. Free them. | Andrew Trick |
| 2013-02-12 | Hexagon: Add support to generate predicated absolute addressing mode | Jyotsna Verma |
| 2013-02-11 | Extend Hexagon hardware loop generation to handle various additional cases: | Krzysztof Parzyszek |
| 2013-02-11 | Implement HexagonInstrInfo::analyzeCompare. | Krzysztof Parzyszek |
| 2013-02-05 | Hexagon: Use TFR_cond with cmpb.[eq,gt,gtu] to handle | Jyotsna Verma |
| 2013-02-05 | Hexagon: Use multiclass for absolute addressing mode stores. | Jyotsna Verma |
| 2013-02-05 | Move MRI liveouts to Hexagon return instructions. | Jakob Stoklund Olesen |
| 2013-02-05 | Hexagon: Add V4 compare instructions. Enable relationship mapping | Jyotsna Verma |
| 2013-02-04 | Hexagon: Add V4 combine instructions and some more Def Pats for V2. | Jyotsna Verma |
| 2013-02-01 | Replace LDriu*[bhdw]_indexed_V4 instructions with "def Pats". | Jyotsna Verma |
| 2013-02-01 | Add appropriate TSFlags to the instructions that must be always extended. | Jyotsna Verma |
| 2013-01-31 | [PEI] Pass the frame index operand number to the eliminateFrameIndex function. | Chad Rosier |
| 2013-01-29 | Use multiclass for post-increment store instructions. | Jyotsna Verma |
| 2013-01-29 | Add constant extender support for MInst type instructions. | Jyotsna Verma |
| 2013-01-29 | Teach SDISel to combine fsin / fcos into a fsincos node if the following | Evan Cheng |
| 2013-01-25 | MIsched: Improve the interface to SchedDFS analysis (subtrees). | Andrew Trick |
| 2013-01-17 | Add indexed load/store instructions for offset validation check. | Jyotsna Verma |
| 2013-01-14 | Improve r172468: const_cast is not needed here | Dmitri Gribenko |
| 2013-01-14 | Fix Another Cast | David Greene |
| 2013-01-07 | Remove more unnecessary # operators with nothing to paste proceeding them. | Craig Topper |
