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AgeCommit message (Expand)Author
2010-09-16When expanding ARM pseudo registers, copy the existing predicate operandsBob Wilson
2010-09-16store MC FP immediates as a double instead of as an APFloat, thus avoiding anJim Grosbach
2010-09-16Add missing break.Bob Wilson
2010-09-16Change VLDMQ and VSTMQ to be pseudo instructions. They are expanded afterBob Wilson
2010-09-15Add support for the 'lane' modifier on vdup operandsJim Grosbach
2010-09-15Remember VLDMQ.Jakob Stoklund Olesen
2010-09-15Add missing break.Jakob Stoklund Olesen
2010-09-15Teach the MC disassembler to handle vmov.f32 and vmov.f64 immediate to registerJim Grosbach
2010-09-15move getRegisterNumbering() to out of ARMBaseRegisterInfo into the helperJim Grosbach
2010-09-15simplify getRegisterNumbering(). Remove the unused isSPVFP argument andJim Grosbach
2010-09-15Refactor uses of getRegisterNumbering() to not need the isSPVFP argument. CheckJim Grosbach
2010-09-15Reduce dependencies in the ARM MC instruction printer.Jim Grosbach
2010-09-15Fix spelling typo.Jim Grosbach
2010-09-15Factor out basic enums and hleper functions from ARM.h for cleaner sharingJim Grosbach
2010-09-15Add support for floating point immediates to MC instruction printing. ARMJim Grosbach
2010-09-15Recognize VST1q64Pseudo and VSTMQ as stack slot stores.Jakob Stoklund Olesen
2010-09-15Reapply Gabor's 113839, 113840, and 113876 with a fix for a problemBob Wilson
2010-09-15the darwin9-powerpc buildbot keeps consistently crashing,Gabor Greif
2010-09-15Move ARM is{LoadFrom,StoreTo}StackSlot closer to their siblings so they won't beJakob Stoklund Olesen
2010-09-15Spelling fix.Bob Wilson
2010-09-15Use VLD1/VST1 pseudo instructions for loadRegFromStackSlot andBob Wilson
2010-09-14Reapply r113875 with additional cleanups.Jim Grosbach
2010-09-14Emit libcalls for SDIV, this requires some call infrastructureEric Christopher
2010-09-14revert 113875 momentarilly. Need to fix the MC disassembler to handle theJim Grosbach
2010-09-14trailing whitespace cleanupJim Grosbach
2010-09-14an attempt to salvage the darwin9-powerpc buildbot, which could be miscompili...Gabor Greif
2010-09-14The register specified for a dregpair is the corresponding Q register, so toJim Grosbach
2010-09-14set isCompare for another three Thumb1 instructionsGabor Greif
2010-09-14Add predicate and 's' bit operands to PICADD instruction lowering.Jim Grosbach
2010-09-14Avoid warnings.Bob Wilson
2010-09-14fix comment typoJim Grosbach
2010-09-14Make NEON ld/st pseudo instruction classes take the instruction itinerary asBob Wilson
2010-09-14set comparable for a bunch of Thumb instructionsGabor Greif
2010-09-14Don't ignore the CPSR implicit def when lowering a MachineInstruction to an M...Jim Grosbach
2010-09-14Clarify commentJim Grosbach
2010-09-14Eliminate a 'tst' that immediately follows an 'and'Gabor Greif
2010-09-14Fix QOpcode assignment to Opc.Eric Christopher
2010-09-13Revert "CMake: Get rid of LLVMLibDeps.cmake and export the libraries normally."Michael J. Spencer
2010-09-13Convert some VTBL and VTBX instructions to use pseudo instructions prior toBob Wilson
2010-09-13Switch all the NEON vld-lane and vst-lane instructions over to the newBob Wilson
2010-09-13trailing whitespaceJim Grosbach
2010-09-11fix the asmparser so that the target is responsible for skipping toChris Lattner
2010-09-11Rename ConvertToSetZeroFlag to something more general.Bill Wendling
2010-09-10No need to recompute the SrcReg and CmpValue.Bill Wendling
2010-09-10Move some of the decision logic for converting an instruction into one that setsBill Wendling
2010-09-10Start sketching out ARM fast-isel calls.Eric Christopher
2010-09-10For consistency.Eric Christopher
2010-09-10Newline at end of file.Eric Christopher
2010-09-10Split out some of the calling convention bits so that they can beEric Christopher
2010-09-10Modify the comparison optimizations in the peephole optimizer to update theBill Wendling