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authorGabor Greif <ggreif@gmail.com>2010-09-14 22:25:16 +0000
committerGabor Greif <ggreif@gmail.com>2010-09-14 22:25:16 +0000
commit308f64a7c847821a4260da673089e7b4af74e56c (patch)
tree4237e1a3faeef4ac085e1e04eae8950e6c11c41c /lib/Target/ARM
parentfe125557dd8ef191b572edb4b6fd4b2a4a2f2f9e (diff)
an attempt to salvage the darwin9-powerpc buildbot, which could be miscompiling this line
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@113876 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/Target/ARM')
-rw-r--r--lib/Target/ARM/ARMBaseInstrInfo.cpp3
1 files changed, 2 insertions, 1 deletions
diff --git a/lib/Target/ARM/ARMBaseInstrInfo.cpp b/lib/Target/ARM/ARMBaseInstrInfo.cpp
index 05870b800c..80c914342c 100644
--- a/lib/Target/ARM/ARMBaseInstrInfo.cpp
+++ b/lib/Target/ARM/ARMBaseInstrInfo.cpp
@@ -1373,7 +1373,7 @@ AnalyzeCompare(const MachineInstr *MI, unsigned &SrcReg, int &CmpValue) const {
CmpValue = MI->getOperand(1).getImm();
return true;
case ARM::TSTri: {
- if (MI->getParent()->begin() == MachineBasicBlock::const_iterator(MI))
+ if (&*MI->getParent()->begin() == MI)
return false;
const MachineInstr *AND = llvm::prior(MI);
if (AND->getOpcode() != ARM::ANDri)
@@ -1385,6 +1385,7 @@ AnalyzeCompare(const MachineInstr *MI, unsigned &SrcReg, int &CmpValue) const {
return true;
}
}
+ break;
}
return false;