aboutsummaryrefslogtreecommitdiff
path: root/lib/Target/ARM
AgeCommit message (Expand)Author
2010-10-11More ARM scheduling itinerary fixes.Evan Cheng
2010-10-11MC machine encoding for simple aritmetic instructions that use a shiftedJim Grosbach
2010-10-11Second set of ARM/MC/ELF changes.Jason W Kim
2010-10-11Proper VST scheduling itineraries.Evan Cheng
2010-10-11Use a sane mechanism for that assert.Eric Christopher
2010-10-11We're not going to handle dynamic allocas anywhere else.Eric Christopher
2010-10-11Make sure that the call stack adjustments have default operands. AlsoEric Christopher
2010-10-11Found a bug turning this on by default. Disable again for now.Eric Christopher
2010-10-11Fix help text.Eric Christopher
2010-10-11Change flag from Enable to Disable since we're enabled by default.Eric Christopher
2010-10-11More binary encoding stuff, taking advantage of the new "by name" operandJim Grosbach
2010-10-11Turn on arm fast isel by default.Eric Christopher
2010-10-11MSVC hangs on compilation of ARMDisassembler.cpp. PR6866 applied to ARM target.Francois Pichet
2010-10-11Copy and pasteo.Eric Christopher
2010-10-11Whitespace cleanup in ARM fast isel.Eric Christopher
2010-10-11Add srem libcall support to ARM fast isel.Eric Christopher
2010-10-11Add i8 sdiv support for ARM fast isel.Eric Christopher
2010-10-11Implement select handling for ARM fast-isel.Eric Christopher
2010-10-09Add VLD4 scheduling itineraries.Evan Cheng
2010-10-09Finish vld3 and vld4.Evan Cheng
2010-10-09Complete vld2 instruction itineries.Evan Cheng
2010-10-09Multiply instructions are issued on pipeline 0. They do not need to reserve p...Evan Cheng
2010-10-09Correct some load / store instruction itinerary mistakes:Evan Cheng
2010-10-09Check to make sure that the iterator isn't at the beginning of the basic blockBill Wendling
2010-10-08Fix the store part of this as well. Fixes smg2000.Eric Christopher
2010-10-08Implement a few more binary encoding bits. Still very early stage proof-of-Jim Grosbach
2010-10-08Reapply 116059, this time without the fatfingered pasto at the top.Jim Grosbach
2010-10-08Reverting 116059. Bots are unhappy with it.Jim Grosbach
2010-10-08'const'ify getMachineOpValue() and associated helpers.Jim Grosbach
2010-10-08Change register allocation order for ARM VFP and NEON registers to put theBob Wilson
2010-10-08Move to thumb2 loads, fixes a problem with incoming registersEric Christopher
2010-10-08Enable binary encoding of some simple instructions.Jim Grosbach
2010-10-08Make <target>CodeEmitter::getBinaryCodeForInstr() a const method.Jim Grosbach
2010-10-07Code refactoring.Evan Cheng
2010-10-07Trivial MC code emitter shell. No instruction forms actually handled yet.Jim Grosbach
2010-10-07Include the auto-generated bits for machine encoding.Jim Grosbach
2010-10-07Remember to promote load/store types for stack to register size.Eric Christopher
2010-10-07ARM instruction don't have instruction prefixes, so remove the helper functionsJim Grosbach
2010-10-07Use the correct register class for load instructions - fixesEric Christopher
2010-10-07Use the correct register class here.Eric Christopher
2010-10-07Use the thumb2 conditional move instruction.Eric Christopher
2010-10-07Remove in-progress assertion, add TODO.Eric Christopher
2010-10-07Model operand cycles of vldm / vstm; also fixes scheduling itineraries of vld...Evan Cheng
2010-10-07Allow use of the 16-bit literal move instruction in CMOVs for Thumb2 mode.Jim Grosbach
2010-10-07Allow use of the 16-bit literal move instruction in CMOVs for ARM mode.Jim Grosbach
2010-10-06remove trailing whitespaceJim Grosbach
2010-10-06First in a sequence of ARM/MC/*ELF* specific work.Jason W Kim
2010-10-06Clean up MOVi32imm and t2MOVi32imm pseudo instruction definitions.Jim Grosbach
2010-10-06Kill of the vestiges of the 'call' Modifier (no longer needed for PLT).Jim Grosbach
2010-10-06Now that VDUPfqf and VDUPfdfare properly pseudos, kill the no-longer-neededJim Grosbach
generated by cgit v1.2.3-70-g09d2 (git 2.46.0) at 2026-03-01 13:43:05 +0000