llvm - http://llvm.org

Age	Commit message (Expand)	Author
2010-10-14	Refactor the MOVsr[al]_flag and RRX pseudo-instructions to really be pseudos	Jim Grosbach
2010-10-14	Tweak the ARM backend to use the RRX mnemonic instead of the 'mov a, b, rrx'	Jim Grosbach
2010-10-14	MOVi16 and MOVT ARM mode encodings.	Jim Grosbach
2010-10-14	Simplify encoding information and add 'dst' operand info for TAILJMP.	Jim Grosbach
2010-10-14	Remove explicit dependency of LLVMARMCodeGen on LLVMARMAsmPrinter. It	Oscar Fuentes
2010-10-14	Handle more complex GEP based loads and add a few TODOs to deal with	Eric Christopher
2010-10-14	Add support for vmov.f64/.f32 encoding. There's a bit of a hack going on	Bill Wendling
2010-10-14	Add encoding for 'fmstat'.	Bill Wendling
2010-10-14	- Add encodings for multiply add/subtract instructions in all their glory.	Bill Wendling
2010-10-14	Regenerate. No functional change, just cleanup.	Jim Grosbach
2010-10-13	Detabify and clean up 80 column violations.	Jim Grosbach
2010-10-13	A few 80 column fixes.	Jim Grosbach
2010-10-13	trailing whitespace	Jim Grosbach
2010-10-13	Add a FIXME.	Jim Grosbach
2010-10-13	Add operand encoding bits for SMC and SVC in ARM mode.	Jim Grosbach
2010-10-13	More encoding cleanup. Also add register Rd operands for indirect branches.	Jim Grosbach
2010-10-13	Simplify some ARM encoding information.	Jim Grosbach
2010-10-13	Update comment.	Eric Christopher
2010-10-13	Add a FIXME. The ADR instruction is a bit odd.	Jim Grosbach
2010-10-13	Refactor the ARM 'setend' instruction pattern. Use a single instruction pattern	Jim Grosbach
2010-10-13	Add MC encodings for VCVT* instrunctions.	Bill Wendling
2010-10-13	Add a FIXME.	Jim Grosbach
2010-10-13	Make a few more bits of some simple instructions explicit. nop, yield, wfe,	Jim Grosbach
2010-10-13	Add ARM mode encoding for [SU]XT[BH] and [SU]XTA[BH] instructions.	Jim Grosbach
2010-10-13	Fix encoding for compares. No Rd register.	Jim Grosbach
2010-10-13	Add ARM mode operand encoding information for ADDE/SUBE instructions.	Jim Grosbach
2010-10-13	Start handling more global variables.	Eric Christopher
2010-10-13	Limit load / store issues (at least until we have a true multi-issue aware sc...	Evan Cheng
2010-10-13	Add encodings for VNEG and VSQRT. Also add encodings for VMOV, but not a test	Bill Wendling
2010-10-13	Add encodings for VCVT instructions.	Bill Wendling
2010-10-13	Add ARM encoding information for comparisons, forced-cc-out arithmetics, and	Jim Grosbach
2010-10-13	Add VCMPZ and VABS.	Bill Wendling
2010-10-13	Refactor VCMP instructions.	Bill Wendling
2010-10-12	Add the rest of the ARM so_reg encoding options (register shifted register)	Jim Grosbach
2010-10-12	Add encodings for VNMUL[SD].	Bill Wendling
2010-10-12	Add encodings for VDIV and VMUL.	Bill Wendling
2010-10-12	Move the ARM so_imm encoding into a custom operand encoder and remove the	Jim Grosbach
2010-10-12	Refactor some of the encoding logic into a base class. This keeps us from having	Bill Wendling
2010-10-12	Add custom encoder for the 's' bit denoting whether an ARM arithmetic	Jim Grosbach
2010-10-12	Add encoding for VSUB and VCMP.	Bill Wendling
2010-10-12	Encoding for VADDD. Plus a test for the VFP instructions.	Bill Wendling
2010-10-12	Split out the "size" field from the encoding. The newer documentation has it as	Bill Wendling
2010-10-12	Fix thinko in arm fast isel alloca rewrite.	Eric Christopher
2010-10-12	Encoding for ARM-mode VADD.F32 instruction.	Jim Grosbach
2010-10-12	Add MOVi ARM encoding.	Jim Grosbach
2010-10-12	Nuke unused wrapper function.	Jim Grosbach
2010-10-12	Add encoding information for the remainder of the generic arithmetic	Jim Grosbach
2010-10-12	PR8359: The ARM backend may end up allocating registers D16 to D31 when	Bob Wilson
2010-10-12	Rework alloca handling so that we can load or store from casted	Eric Christopher
2010-10-12	Handle a wider arrangement of loads.	Eric Christopher