| Age | Commit message (Expand) | Author |
|---|
| 2011-04-12 | Split a store of a VMOVDRR into two integer stores to avoid mixing NEON and ARM | Cameron Zwarich |
| 2011-04-12 | A8.6.16 B | Johnny Chen |
| 2011-04-11 | Thumb disassembler was erroneously rejecting "blx sp" instruction. | Johnny Chen |
| 2011-04-11 | Fix the bug where the immediate shift amount for Thumb logical shift instruct... | Johnny Chen |
| 2011-04-11 | Fix another using-CPSR-twice bug in my ADCS/SBCS cleanups, and make proper us... | Owen Anderson |
| 2011-04-11 | Trivial comment fix. | Johnny Chen |
| 2011-04-11 | Check invalid register encodings for LdFrm/StFrm ARM instructions and flag th... | Johnny Chen |
| 2011-04-11 | Adding support for printing operands symbolically to llvm's public 'C' | Kevin Enderby |
| 2011-04-11 | Don't include Operator.h from InstrTypes.h. | Jay Foad |
| 2011-04-08 | Fix an apparent typo that made GCC complain | Matt Beaumont-Gay |
| 2011-04-08 | Change -arm-trap-func= into a non-arm specific option. Now Intrinsic::trap is... | Evan Cheng |
| 2011-04-08 | Check opcoe (dmb, dsb) instead of bitfields matching. | Johnny Chen |
| 2011-04-08 | Hanlde the checking of bad regs for SMMLAR properly, instead of asserting. | Johnny Chen |
| 2011-04-08 | Sanity check the option operand for DMB/DSB. | Johnny Chen |
| 2011-04-08 | Mark hasExtraDefRegAllocReq=1 on LDRD. | Jim Grosbach |
| 2011-04-08 | Add sanity checking for bad register specifier(s) for the DPFrm instructions. | Johnny Chen |
| 2011-04-07 | Add option to emit @llvm.trap as a function call instead of a trap instructio... | Evan Cheng |
| 2011-04-07 | Fixed encoding for VEXTqf | Mon P Wang |
| 2011-04-07 | Add sanity checking for invalid register encodings for signed/unsigned extend... | Johnny Chen |
| 2011-04-07 | Add sanity checking for invalid register encodings for saturating instructions. | Johnny Chen |
| 2011-04-07 | Add some more comments about checkings of invalid register numbers. | Johnny Chen |
| 2011-04-07 | Prevent ARM DAG Combiner from doing an AND or OR combine on an illegal vector... | Tanya Lattner |
| 2011-04-07 | Sanity check MSRi for invalid mask values and reject it as invalid. | Johnny Chen |
| 2011-04-07 | The ARM disassembler was not recognizing USADA8 instruction. Need to add che... | Johnny Chen |
| 2011-04-07 | Change -arm-divmod-libcall to a target neutral option. | Evan Cheng |
| 2011-04-07 | Should also check SMLAD for invalid register values. | Johnny Chen |
| 2011-04-06 | Teach the ARM peephole optimizer that RSB, RSC, ADC, and SBC can be used for ... | Owen Anderson |
| 2011-04-06 | Cleanups from Jim: remove redundant constraints and a dead FIXME. | Owen Anderson |
| 2011-04-06 | Tidy up. | Jim Grosbach |
| 2011-04-06 | A8.6.393 | Johnny Chen |
| 2011-04-06 | A8.6.92 MCR (Encoding A1): if coproc == '101x' then SEE "Advanced SIMD and VFP" | Johnny Chen |
| 2011-04-06 | Fix a bug in the disassembly of VGETLNs8 where the lane index was wrong. | Johnny Chen |
| 2011-04-06 | Add a missing opcode (SMLSLDX) to BadRegsMulFrm() function. | Johnny Chen |
| 2011-04-05 | Reapply r128946 (pseudoization of various instructions), and fix the extra im... | Owen Anderson |
| 2011-04-05 | Fix a typo in the handling of PKHTB opcode, plus add sanity check for illegal... | Johnny Chen |
| 2011-04-05 | Clean up some code for clarity. | Bob Wilson |
| 2011-04-05 | Revert r128946 while I figure out why it broke the buildbots. | Owen Anderson |
| 2011-04-05 | A7.3 register encoding | Johnny Chen |
| 2011-04-05 | Give RSBS and RSCS the pseudo treatment. | Owen Anderson |
| 2011-04-05 | ARM disassembler was erroneously accepting an invalid RSC instruction. | Johnny Chen |
| 2011-04-05 | ARM disassembler was erroneously accepting an invalid LSL instruction. | Johnny Chen |
| 2011-04-05 | Fix bugs in the pseuo-ization of ADCS/SBCS pointed out by Jim, as well as doi... | Owen Anderson |
| 2011-04-05 | The r128085 checkin modified the operand ordering for MRC/MRC2 instructions. | Johnny Chen |
| 2011-04-05 | ARM disassembler should flag (rGPRRegClassID, r13|r15) as an error. | Johnny Chen |
| 2011-04-05 | Make second source operand of LDRD pre/post explicit. | Jim Grosbach |
| 2011-04-05 | Constants with multiple encodings (ARM): | Johnny Chen |
| 2011-04-05 | Check for invalid register encodings for UMAAL and friends where: | Johnny Chen |
| 2011-04-05 | Convert ADCS and SBCS instructions into pseudos that are expanded to the ADC/... | Owen Anderson |
| 2011-04-05 | Revamp the SjLj "dispatch setup" intrinsic. | Bill Wendling |
| 2011-04-05 | Just use BL all the time. It's safer that way. | Eric Christopher |
