| Age | Commit message (Expand) | Author |
|---|
| 2010-09-09 | Approved by Evan: | Bill Wendling |
| 2010-09-03 | Finish converting the rest of the NEON VLD instructions to use pseudo- | Bob Wilson |
| 2010-09-03 | Replace NEON vabdl, vaba, and vabal intrinsics with combinations of the | Bob Wilson |
| 2010-09-02 | Convert VLD1 and VLD2 instructions to use pseudo-instructions until | Bob Wilson |
| 2010-09-01 | Remove NEON vmull, vmlal, and vmlsl intrinsics, replacing them with multiply, | Bob Wilson |
| 2010-08-30 | Remove NEON vmovn intrinsic, replacing it with vector truncate operations. | Bob Wilson |
| 2010-08-29 | Remove NEON vaddl, vaddw, vsubl, and vsubw intrinsics. Instead, use llvm | Bob Wilson |
| 2010-08-28 | Use pseudo instructions for VST1 and VST2. | Bob Wilson |
| 2010-08-28 | We don't need to custom-select VLDMQ and VSTMQ anymore. | Bob Wilson |
| 2010-08-27 | Change ARM VFP VLDM/VSTM instructions to use addressing mode #4, just like | Bob Wilson |
| 2010-08-26 | Use pseudo instructions for VST3. | Bob Wilson |
| 2010-08-26 | Use pseudo instructions for VST1d64Q. | Bob Wilson |
| 2010-08-25 | Start converting NEON load/stores to use pseudo instructions, beginning here | Bob Wilson |
| 2010-08-20 | Replace the arm.neon.vmovls and vmovlu intrinsics with vector sign-extend and | Bob Wilson |
| 2010-07-31 | Silence some -Asserts uninitialized variable warnings. | Daniel Dunbar |
| 2010-07-14 | Add support for NEON VMVN immediate instructions. | Bob Wilson |
| 2010-07-14 | The bits in the cmode field of 32-bit VMOV immediate instructions all depend | Bob Wilson |
| 2010-07-13 | Use a target-specific VMOVIMM DAG node instead of BUILD_VECTOR to represent | Bob Wilson |
| 2010-07-07 | Also use REG_SEQUENCE for VTBX instructions. | Bob Wilson |
| 2010-07-06 | Use REG_SEQUENCE nodes to make the table registers for VTBL instructions be | Bob Wilson |
| 2010-06-25 | Fix indentation. | Bob Wilson |
| 2010-06-19 | Remove a fixme comment that is no longer relevant. | Bob Wilson |
| 2010-06-15 | Add basic support for NEON modified immediates besides VMOV. | Bob Wilson |
| 2010-06-14 | Rename functions referring to VMOV immediates to refer to NEON "modified | Bob Wilson |
| 2010-06-11 | Add instruction encoding for the Neon VMOV immediate instruction. This changes | Bob Wilson |
| 2010-06-07 | Further changes for Neon vector shuffles: | Bob Wilson |
| 2010-05-24 | Fix a few places that depended on the numeric value of subreg indices. | Jakob Stoklund Olesen |
| 2010-05-24 | Switch ARMRegisterInfo.td to use SubRegIndex and eliminate the parallel enums | Jakob Stoklund Olesen |
| 2010-05-19 | Mark pattern-less mayLoad / mayStore instructions neverHasSideEffects. These ... | Evan Cheng |
| 2010-05-17 | vmov of immediates are trivially re-materializable. | Evan Cheng |
| 2010-05-16 | Chris said that the comment char should be escaped. Fix all the occurences of... | Anton Korobeynikov |
| 2010-05-14 | Added a QQQQ register file to model 4-consecutive Q registers. | Evan Cheng |
| 2010-05-13 | Bring back VLD1q and VST1q and use them for reloading / spilling Q registers.... | Evan Cheng |
| 2010-05-13 | Mark some pattern-less instructions as neverHasSideEffects. | Evan Cheng |
| 2010-05-07 | Use VLD2q32 / VST2q32 to reload / spill QQ (pair of Q) registers when stack s... | Evan Cheng |
| 2010-05-07 | Remove VLD1q and VST1q for reloading and spilling Q registers. Just use VLD1q... | Evan Cheng |
| 2010-05-06 | Re-apply 103156 and 103157. 103156 didn't break anything. 10315 exposed a coa... | Evan Cheng |
| 2010-05-06 | Revert r103156 since it was breaking the build bots. | Eric Christopher |
| 2010-05-06 | Adding pseudo 256-bit registers QQ0 . . . QQ7 to represent pairs of Q registe... | Evan Cheng |
| 2010-04-07 | More fixes for itins | Anton Korobeynikov |
| 2010-04-07 | Fix invalid itins for 32-bit varians of VMLAL and friends | Anton Korobeynikov |
| 2010-04-07 | Fix itins for VABA | Anton Korobeynikov |
| 2010-04-07 | Correct VMVN itinerary: operand is read in the second cycle, not in the first. | Anton Korobeynikov |
| 2010-04-07 | More A9 itineraries | Anton Korobeynikov |
| 2010-04-07 | Correct itinerary class for VPADD | Anton Korobeynikov |
| 2010-04-07 | VP{MAX, MIN} are of IIC_VSUBi4D itin class as well. | Anton Korobeynikov |
| 2010-04-07 | VHADD differs from VHSUB at least on A9 - the former reads both operands in t... | Anton Korobeynikov |
| 2010-03-29 | Add NVTBLFrm to represent A8.6.406 VTBL, VTBX Vector Table Lookup Instructions. | Johnny Chen |
| 2010-03-28 | fix integer negates to use the proper type for the zero vectors, | Chris Lattner |
| 2010-03-28 | fix vnot matching to explicitly specify the type of the | Chris Lattner |
