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AgeCommit message (Expand)Author
2010-09-29Merge in r114506.Bill Wendling
2010-09-10Approved by Evan:Bill Wendling
2010-09-10Approved by Evan.Bill Wendling
2010-09-09Approved by Evan:Bill Wendling
2010-09-08$ svn merge -c 113255 https://llvm.org/svn/llvm-project/llvm/trunkBill Wendling
2010-09-03Re-apply r112883:Jim Grosbach
2010-09-03Check the local frame alignment for determining whether dynamic stackJim Grosbach
2010-09-03Finish converting the rest of the NEON VLD instructions to use pseudo-Bob Wilson
2010-09-03Revert "For ARM stack frames that utilize variable sized objects and have eit...Daniel Dunbar
2010-09-03Replace NEON vabdl, vaba, and vabal intrinsics with combinations of theBob Wilson
2010-09-03Simple branch instruction support.Eric Christopher
2010-09-02Add basic support for materializing constants (including fp) andEric Christopher
2010-09-02For ARM stack frames that utilize variable sized objects and have eitherJim Grosbach
2010-09-02trailing whitespaceJim Grosbach
2010-09-02Now that register allocation properly considers reserved regs, simplify theJim Grosbach
2010-09-02Fill in a missing comment.Bob Wilson
2010-09-02Convert VLD1 and VLD2 instructions to use pseudo-instructions untilBob Wilson
2010-09-02Clang's -ccc-host-triple was ignoring the arch specifier on my triple,Eric Christopher
2010-09-02This should be TargetMaterializeConstant instead.Eric Christopher
2010-09-02One definition of isThumb is plenty, thanks.Eric Christopher
2010-09-02Remove trailing whitespaceJim Grosbach
2010-09-02Rework arm fast-isel load and store handling. Move offset computationEric Christopher
2010-09-02trivial cleanupJim Grosbach
2010-09-01Simplify the tGPR register class now that the register allocators know notJim Grosbach
2010-09-01Remove NEON vmull, vmlal, and vmlsl intrinsics, replacing them with multiply,Bob Wilson
2010-09-01Some basic store support.Eric Christopher
2010-09-01Add some more load types in.Eric Christopher
2010-09-01zap dead code.Chris Lattner
2010-09-01temporarily revert r112664, it is causing a decoding conflict, and Chris Lattner
2010-08-31We have a chance for an optimization. Consider this code:Bill Wendling
2010-08-31And ANDS pattern to match the t2ANDS pattern.Bill Wendling
2010-08-31SP relative offsets need to be adjusted by the local allocation size whenJim Grosbach
2010-08-31this assert should just be a condition, since this function is just asking ifJim Grosbach
2010-08-31- Cleanup some whitespaces.Bill Wendling
2010-08-31Rewrite slightly so we can expand for floating point types easier.Eric Christopher
2010-08-30If we have an unhandled type then assert, we shouldn't get here forEric Christopher
2010-08-30Expand MOVi32imm in ARM mode after regalloc. This providesAnton Korobeynikov
2010-08-30Use the existing T2I_bin_s_irs pattern instead of creating T2I_bin_sw_irs, whichBill Wendling
2010-08-30Remember to clear the shadow kill flag at the same time as clearing the realJakob Stoklund Olesen
2010-08-30Remove NEON vmovn intrinsic, replacing it with vector truncate operations.Bob Wilson
2010-08-30Make ARM add rN, sp, #imm instructions rematerializable. That's how the addre...Jim Grosbach
2010-08-30When expanding NEON VST pseudo instructions, if the original super-registerBob Wilson
2010-08-30Create Thumb2sI_cpsr and T2sI_cpsr. These new classes indicate that CPSR is theBill Wendling
2010-08-29Fix whitespaces. No functionality changes.Bill Wendling
2010-08-29Remove NEON vaddl, vaddw, vsubl, and vsubw intrinsics. Instead, use llvmBob Wilson
2010-08-29- Add a parameter to T2I_bin_irs for those patterns which set the S bit.Bill Wendling
2010-08-29Name ANDflag to ANDS, which is less stupid.Bill Wendling
2010-08-29File missing from last commit.Bill Wendling
2010-08-29Create an ARMISD::AND node. This node is exactly like the "ARM::AND" node, butBill Wendling
2010-08-28Use pseudo instructions for VST1 and VST2.Bob Wilson