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path: root/lib/Target/ARM/ARMFastISel.cpp
AgeCommit message (Expand)Author
2010-11-19Remove hard tabs.Jim Grosbach
2010-11-15Recommit this change and remove the failing part of the test - it didn'tEric Christopher
2010-11-12Temporarily revert this.Eric Christopher
2010-11-12Make this happen for ARM like x86. Don't entirely bail out whenEric Christopher
2010-11-12Fix up a few more spots of addrmode2 (or not) changes that wereEric Christopher
2010-11-09Trailing whitespace.Jim Grosbach
2010-11-06Make sure we have movw on the target before using it.Eric Christopher
2010-11-04In the calling convention logic, ValVT is always a legal type,Duncan Sands
2010-11-03Optimize generated code for integer materialization a bit.Eric Christopher
2010-11-03Simplify uses of MVT and EVT. An MVT can be compared directlyDuncan Sands
2010-11-03Inside the calling convention logic LocVT is always a simpleDuncan Sands
2010-11-03Invert these branches by default, it makes assembly comparisons a littleEric Christopher
2010-11-02Make sure we're only storing a single bit here.Eric Christopher
2010-11-02Remove an assert - it's possible to be hit, and we just want to avoidEric Christopher
2010-11-02WhitespeaceEric Christopher
2010-11-02No really, no thumb1 for arm fast isel. Also add an informative comment asEric Christopher
2010-10-30Make sure we have a legal type (and simple) before continuing.Eric Christopher
2010-10-29Handle comparison values we already have - this fixes the consumer-typesetEric Christopher
2010-10-27Refactor ARM STR/STRB instruction patterns into STR{B}i12 and STR{B}rs, likeJim Grosbach
2010-10-27Trailing whitespaceJim Grosbach
2010-10-27Split ARM::LDRB into LDRBi12 and LDRBrs. Adjust accordingly. Continuing onJim Grosbach
2010-10-26First part of refactoring ARM addrmode2 (load/store) instructions to be moreJim Grosbach
2010-10-23Move rejection of NEON parameters earlier in fast isel call processing,Eric Christopher
2010-10-22Silence compiler warnings.Evan Cheng
2010-10-22Add some basic ret instruction support to arm fast-isel.Eric Christopher
2010-10-21These don't need to be virtual.Eric Christopher
2010-10-21Handle storing args to the stack for calls.Eric Christopher
2010-10-21More load/store refactoring, call reg+offset simplification from withinEric Christopher
2010-10-21Custom lower f64 args passed in integer registers.Eric Christopher
2010-10-20Fix a TODO by removing some unnecesary copies.Eric Christopher
2010-10-18Revert r116220 - thus turning arm fast isel back on by default.Eric Christopher
2010-10-18Remove the check for invalid calling conventions. Testing shows that they'reEric Christopher
2010-10-18Lift arg promotion from the X86 backend. This should be unified at some point.Eric Christopher
2010-10-17Now that we handle all allocas via a non-SP reg offset remove all of theEric Christopher
2010-10-17Allow more load types to be materialized through the allocas.Eric Christopher
2010-10-17Optimize GEP off of intermediate allocas.Eric Christopher
2010-10-17Fix comment.Eric Christopher
2010-10-17Turn on AddOperator folding in GEP.Eric Christopher
2010-10-17Use the i12 immediate versions of the load instructions - they're handledEric Christopher
2010-10-16Fix some funky formatting that got through.Eric Christopher
2010-10-15Make sure offset is 0 for load/store register to the stack call.Eric Christopher
2010-10-15Fix else if -> if in store machinery.Eric Christopher
2010-10-15Refactor ARM fast-isel reg + offset to be a base + offset.Eric Christopher
2010-10-15Expand GEP handling for constant offsets.Eric Christopher
2010-10-14Handle more complex GEP based loads and add a few TODOs to deal withEric Christopher
2010-10-13A few 80 column fixes.Jim Grosbach
2010-10-13Update comment.Eric Christopher
2010-10-13Start handling more global variables.Eric Christopher
2010-10-12Fix thinko in arm fast isel alloca rewrite.Eric Christopher
2010-10-12Rework alloca handling so that we can load or store from castedEric Christopher
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