diff options
| author | Jim Grosbach <grosbach@apple.com> | 2010-10-27 00:19:44 +0000 |
|---|---|---|
| committer | Jim Grosbach <grosbach@apple.com> | 2010-10-27 00:19:44 +0000 |
| commit | c1d30212e911d1e55ff6b25bffefb503708883c3 (patch) | |
| tree | de38cc3a1c143ca135f8deaefcfaad5d3ae6c0b5 /lib/Target/ARM/ARMFastISel.cpp | |
| parent | 28e3fe961f2c4d6ce5317770f660c56cae3d2ec6 (diff) | |
Split ARM::LDRB into LDRBi12 and LDRBrs. Adjust accordingly. Continuing on
rdar://8477752.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117419 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/Target/ARM/ARMFastISel.cpp')
| -rw-r--r-- | lib/Target/ARM/ARMFastISel.cpp | 4 |
1 files changed, 1 insertions, 3 deletions
diff --git a/lib/Target/ARM/ARMFastISel.cpp b/lib/Target/ARM/ARMFastISel.cpp index 7cf7ec0355..3b72285d31 100644 --- a/lib/Target/ARM/ARMFastISel.cpp +++ b/lib/Target/ARM/ARMFastISel.cpp @@ -746,7 +746,7 @@ bool ARMFastISel::ARMEmitLoad(EVT VT, unsigned &ResultReg, RC = ARM::GPRRegisterClass; break; case MVT::i8: - Opc = isThumb ? ARM::t2LDRBi12 : ARM::LDRB; + Opc = isThumb ? ARM::t2LDRBi12 : ARM::LDRBi12; RC = ARM::GPRRegisterClass; break; case MVT::i32: @@ -774,8 +774,6 @@ bool ARMFastISel::ARMEmitLoad(EVT VT, unsigned &ResultReg, if (isFloat) Offset /= 4; - // The thumb and floating point instructions both take 2 operands, ARM takes - // another register. AddOptionalDefs(BuildMI(*FuncInfo.MBB, FuncInfo.InsertPt, DL, TII.get(Opc), ResultReg) .addReg(Base).addImm(Offset)); |